diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-07 14:08:56 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-07 14:08:56 -0400 |
commit | 5a89770daad83df74d77a8d34a1ffaedae565ce9 (patch) | |
tree | 0d8ef70293a6ef969ba8b7718e59608337643d40 /arch/arm/mach-pxa/pxa25x.c | |
parent | c46c948260f41af18b277c1eb1895d788d3605dc (diff) | |
parent | af7c951d76708c61b862463d579d76be757130bf (diff) |
Merge branches 'pxa-core' and 'pxa-machines' into pxa-all
Conflicts:
arch/arm/mach-pxa/Kconfig
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa27x.c
Diffstat (limited to 'arch/arm/mach-pxa/pxa25x.c')
-rw-r--r-- | arch/arm/mach-pxa/pxa25x.c | 28 |
1 files changed, 3 insertions, 25 deletions
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 3caa74a10d13..25d17a1dab78 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -209,45 +209,21 @@ static struct clk pxa25x_clks[] = { | |||
209 | * More ones like CP and general purpose register values are preserved | 209 | * More ones like CP and general purpose register values are preserved |
210 | * with the stack pointer in sleep.S. | 210 | * with the stack pointer in sleep.S. |
211 | */ | 211 | */ |
212 | enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, | 212 | enum { |
213 | |||
214 | SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, | ||
215 | SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, | ||
216 | SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, | ||
217 | |||
218 | SLEEP_SAVE_PSTR, | 213 | SLEEP_SAVE_PSTR, |
219 | |||
220 | SLEEP_SAVE_CKEN, | 214 | SLEEP_SAVE_CKEN, |
221 | |||
222 | SLEEP_SAVE_COUNT | 215 | SLEEP_SAVE_COUNT |
223 | }; | 216 | }; |
224 | 217 | ||
225 | 218 | ||
226 | static void pxa25x_cpu_pm_save(unsigned long *sleep_save) | 219 | static void pxa25x_cpu_pm_save(unsigned long *sleep_save) |
227 | { | 220 | { |
228 | SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); | ||
229 | |||
230 | SAVE(GAFR0_L); SAVE(GAFR0_U); | ||
231 | SAVE(GAFR1_L); SAVE(GAFR1_U); | ||
232 | SAVE(GAFR2_L); SAVE(GAFR2_U); | ||
233 | |||
234 | SAVE(CKEN); | 221 | SAVE(CKEN); |
235 | SAVE(PSTR); | 222 | SAVE(PSTR); |
236 | |||
237 | /* Clear GPIO transition detect bits */ | ||
238 | GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; | ||
239 | } | 223 | } |
240 | 224 | ||
241 | static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) | 225 | static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) |
242 | { | 226 | { |
243 | /* restore registers */ | ||
244 | RESTORE(GAFR0_L); RESTORE(GAFR0_U); | ||
245 | RESTORE(GAFR1_L); RESTORE(GAFR1_U); | ||
246 | RESTORE(GAFR2_L); RESTORE(GAFR2_U); | ||
247 | RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); | ||
248 | |||
249 | PSSR = PSSR_RDH | PSSR_PH; | ||
250 | |||
251 | RESTORE(CKEN); | 227 | RESTORE(CKEN); |
252 | RESTORE(PSTR); | 228 | RESTORE(PSTR); |
253 | } | 229 | } |
@@ -346,6 +322,8 @@ static struct sys_device pxa25x_sysdev[] = { | |||
346 | { | 322 | { |
347 | .cls = &pxa_irq_sysclass, | 323 | .cls = &pxa_irq_sysclass, |
348 | }, { | 324 | }, { |
325 | .cls = &pxa2xx_mfp_sysclass, | ||
326 | }, { | ||
349 | .cls = &pxa_gpio_sysclass, | 327 | .cls = &pxa_gpio_sysclass, |
350 | }, | 328 | }, |
351 | }; | 329 | }; |