Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel

8 files changed, 269 insertions, 88 deletions

diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
new file mode 100644
index 000000000000..9eaeed1f87f1
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -0,0 +1,131 @@
+/*
+ * GPIO and IRQ definitions for HP iPAQ hx4700
+ *
+ * Copyright (c) 2008 Philipp Zabel
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _HX4700_H_
+#define _HX4700_H_
+
+#include <linux/gpio.h>
+#include <linux/mfd/asic3.h>
+
+#define HX4700_ASIC3_GPIO_BASE  NR_BUILTIN_GPIO
+#define HX4700_EGPIO_BASE       (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
+
+/*
+ * PXA GPIOs
+ */
+
+#define GPIO0_HX4700_nKEY_POWER                 0
+#define GPIO12_HX4700_ASIC3_IRQ                 12
+#define GPIO13_HX4700_W3220_IRQ                 13
+#define GPIO14_HX4700_nWLAN_IRQ                 14
+#define GPIO18_HX4700_RDY                       18
+#define GPIO22_HX4700_LCD_RL                    22
+#define GPIO27_HX4700_CODEC_ON                  27
+#define GPIO32_HX4700_RS232_ON                  32
+#define GPIO52_HX4700_CPU_nBATT_FAULT           52
+#define GPIO58_HX4700_TSC2046_nPENIRQ           58
+#define GPIO59_HX4700_LCD_PC1                   59
+#define GPIO60_HX4700_CF_RNB                    60
+#define GPIO61_HX4700_W3220_nRESET              61
+#define GPIO62_HX4700_LCD_nRESET                62
+#define GPIO63_HX4700_CPU_SS_nRESET             63
+#define GPIO65_HX4700_TSC2046_PEN_PU            65
+#define GPIO66_HX4700_ASIC3_nSDIO_IRQ           66
+#define GPIO67_HX4700_EUART_PS                  67
+#define GPIO70_HX4700_LCD_SLIN1                 70
+#define GPIO71_HX4700_ASIC3_nRESET              71
+#define GPIO72_HX4700_BQ24022_nCHARGE_EN        72
+#define GPIO73_HX4700_LCD_UD_1                  73
+#define GPIO75_HX4700_EARPHONE_nDET             75
+#define GPIO76_HX4700_USBC_PUEN                 76
+#define GPIO81_HX4700_CPU_GP_nRESET             81
+#define GPIO82_HX4700_EUART_RESET               82
+#define GPIO83_HX4700_WLAN_nRESET               83
+#define GPIO84_HX4700_LCD_SQN                   84
+#define GPIO85_HX4700_nPCE1                     85
+#define GPIO88_HX4700_TSC2046_CS                88
+#define GPIO91_HX4700_FLASH_VPEN                91
+#define GPIO92_HX4700_HP_DRIVER                 92
+#define GPIO93_HX4700_EUART_INT                 93
+#define GPIO94_HX4700_KEY_MAIL                  94
+#define GPIO95_HX4700_BATT_OFF                  95
+#define GPIO96_HX4700_BQ24022_ISET2             96
+#define GPIO97_HX4700_nBL_DETECT                97
+#define GPIO99_HX4700_KEY_CONTACTS              99
+#define GPIO100_HX4700_AUTO_SENSE               100 /* BL auto brightness */
+#define GPIO102_HX4700_SYNAPTICS_POWER_ON       102
+#define GPIO103_HX4700_SYNAPTICS_INT            103
+#define GPIO105_HX4700_nIR_ON                   105
+#define GPIO106_HX4700_CPU_BT_nRESET            106
+#define GPIO107_HX4700_SPK_nSD                  107
+#define GPIO109_HX4700_CODEC_nPDN               109
+#define GPIO110_HX4700_LCD_LVDD_3V3_ON          110
+#define GPIO111_HX4700_LCD_AVDD_3V3_ON          111
+#define GPIO112_HX4700_LCD_N2V7_7V3_ON          112
+#define GPIO114_HX4700_CF_RESET                 114
+#define GPIO116_HX4700_CPU_HW_nRESET            116
+
+/*
+ * ASIC3 GPIOs
+ */
+
+#define GPIOC_BASE              (HX4700_ASIC3_GPIO_BASE + 32)
+#define GPIOD_BASE              (HX4700_ASIC3_GPIO_BASE + 48)
+
+#define GPIOC0_LED_RED          (GPIOC_BASE + 0)
+#define GPIOC1_LED_GREEN        (GPIOC_BASE + 1)
+#define GPIOC2_LED_BLUE         (GPIOC_BASE + 2)
+#define GPIOC3_nSD_CS           (GPIOC_BASE + 3)
+#define GPIOC4_CF_nCD           (GPIOC_BASE + 4)        /* Input */
+#define GPIOC5_nCIOW            (GPIOC_BASE + 5)        /* Output, to CF */
+#define GPIOC6_nCIOR            (GPIOC_BASE + 6)        /* Output, to CF */
+#define GPIOC7_nPCE1            (GPIOC_BASE + 7)        /* Input, from CPU */
+#define GPIOC8_nPCE2            (GPIOC_BASE + 8)        /* Input, from CPU */
+#define GPIOC9_nPOE             (GPIOC_BASE + 9)        /* Input, from CPU */
+#define GPIOC10_CF_nPWE         (GPIOC_BASE + 10)       /* Input */
+#define GPIOC11_PSKTSEL         (GPIOC_BASE + 11)       /* Input, from CPU */
+#define GPIOC12_nPREG           (GPIOC_BASE + 12)       /* Input, from CPU */
+#define GPIOC13_nPWAIT          (GPIOC_BASE + 13)       /* Output, to CPU */
+#define GPIOC14_nPIOIS16        (GPIOC_BASE + 14)       /* Output, to CPU */
+#define GPIOC15_nPIOR           (GPIOC_BASE + 15)       /* Input, from CPU */
+
+#define GPIOD0_CPU_SS_INT       (GPIOD_BASE + 0)        /* Input */
+#define GPIOD1_nKEY_CALENDAR    (GPIOD_BASE + 1)
+#define GPIOD2_BLUETOOTH_WAKEUP (GPIOD_BASE + 2)
+#define GPIOD3_nKEY_HOME        (GPIOD_BASE + 3)
+#define GPIOD4_CF_nCD           (GPIOD_BASE + 4)        /* Input, from CF */
+#define GPIOD5_nPIO             (GPIOD_BASE + 5)        /* Input */
+#define GPIOD6_nKEY_RECORD      (GPIOD_BASE + 6)
+#define GPIOD7_nSDIO_DETECT     (GPIOD_BASE + 7)
+#define GPIOD8_COM_DCD          (GPIOD_BASE + 8)        /* Input */
+#define GPIOD9_nAC_IN           (GPIOD_BASE + 9)
+#define GPIOD10_nSDIO_IRQ       (GPIOD_BASE + 10)       /* Input */
+#define GPIOD11_nCIOIS16        (GPIOD_BASE + 11)       /* Input, from CF */
+#define GPIOD12_nCWAIT          (GPIOD_BASE + 12)       /* Input, from CF */
+#define GPIOD13_CF_RNB          (GPIOD_BASE + 13)       /* Input */
+#define GPIOD14_nUSBC_DETECT    (GPIOD_BASE + 14)
+#define GPIOD15_nPIOW           (GPIOD_BASE + 15)       /* Input, from CPU */
+
+/*
+ * EGPIOs
+ */
+
+#define EGPIO0_VCC_3V3_EN       (HX4700_EGPIO_BASE + 0) /* WLAN support chip */
+#define EGPIO1_WL_VREG_EN       (HX4700_EGPIO_BASE + 1) /* WLAN power */
+#define EGPIO2_VCC_2V1_WL_EN    (HX4700_EGPIO_BASE + 2) /* unused */
+#define EGPIO3_SS_PWR_ON        (HX4700_EGPIO_BASE + 3) /* smart slot power */
+#define EGPIO4_CF_3V3_ON        (HX4700_EGPIO_BASE + 4) /* CF 3.3V enable */
+#define EGPIO5_BT_3V3_ON        (HX4700_EGPIO_BASE + 5) /* BT 3.3V enable */
+#define EGPIO6_WL1V8_EN         (HX4700_EGPIO_BASE + 6) /* WLAN 1.8V enable */
+#define EGPIO7_VCC_3V3_WL_EN    (HX4700_EGPIO_BASE + 7) /* WLAN 3.3V enable */
+#define EGPIO8_USB_3V3_ON       (HX4700_EGPIO_BASE + 8) /* unused */
+
+#endif /* _HX4700_H_ */
diff --git a/arch/arm/mach-pxa/include/mach/i2c.h b/arch/arm/mach-pxa/include/mach/i2c.h
deleted file mode 100644
index 1a9f65e6ec0f..000000000000
--- a/arch/arm/mach-pxa/include/mach/i2c.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- *  i2c_pxa.h
- *
- *  Copyright (C) 2002 Intrinsyc Software Inc.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- *
- */
-#ifndef _I2C_PXA_H_
-#define _I2C_PXA_H_
-
-#if 0
-#define DEF_TIMEOUT             3
-#else
-/* need a longer timeout if we're dealing with the fact we may well be
- * looking at a multi-master environment
-*/
-#define DEF_TIMEOUT             32
-#endif
-
-#define BUS_ERROR               (-EREMOTEIO)
-#define XFER_NAKED              (-ECONNREFUSED)
-#define I2C_RETRY               (-2000) /* an error has occurred retry transmit */
-
-/* ICR initialize bit values
-*
-*  15. FM       0 (100 Khz operation)
-*  14. UR       0 (No unit reset)
-*  13. SADIE    0 (Disables the unit from interrupting on slave addresses
-*                                       matching its slave address)
-*  12. ALDIE    0 (Disables the unit from interrupt when it loses arbitration
-*                                       in master mode)
-*  11. SSDIE    0 (Disables interrupts from a slave stop detected, in slave mode)
-*  10. BEIE     1 (Enable interrupts from detected bus errors, no ACK sent)
-*  9.  IRFIE    1 (Enable interrupts from full buffer received)
-*  8.  ITEIE    1 (Enables the I2C unit to interrupt when transmit buffer empty)
-*  7.  GCD      1 (Disables i2c unit response to general call messages as a slave)
-*  6.  IUE      0 (Disable unit until we change settings)
-*  5.  SCLE     1 (Enables the i2c clock output for master mode (drives SCL)
-*  4.  MA       0 (Only send stop with the ICR stop bit)
-*  3.  TB       0 (We are not transmitting a byte initially)
-*  2.  ACKNAK   0 (Send an ACK after the unit receives a byte)
-*  1.  STOP     0 (Do not send a STOP)
-*  0.  START    0 (Do not send a START)
-*
-*/
-#define I2C_ICR_INIT    (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
-
-/* I2C status register init values
- *
- * 10. BED      1 (Clear bus error detected)
- * 9.  SAD      1 (Clear slave address detected)
- * 7.  IRF      1 (Clear IDBR Receive Full)
- * 6.  ITE      1 (Clear IDBR Transmit Empty)
- * 5.  ALD      1 (Clear Arbitration Loss Detected)
- * 4.  SSD      1 (Clear Slave Stop Detected)
- */
-#define I2C_ISR_INIT    0x7FF  /* status register init */
-
-struct i2c_slave_client;
-
-struct i2c_pxa_platform_data {
-        unsigned int            slave_addr;
-        struct i2c_slave_client *slave;
-        unsigned int            class;
-        unsigned int            use_pio :1;
-        unsigned int            fast_mode :1;
-};
-
-extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
-
-#ifdef CONFIG_PXA27x
-extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
-#endif
-
-#ifdef CONFIG_PXA3xx
-extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
-#endif
-
-#endif
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 32bb4a2eb7f1..6a1d95993342 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -91,13 +91,23 @@
 #define IRQ_TO_GPIO(i)  (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
 
 /*
- * The next 16 interrupts are for board specific purposes.  Since
+ * The following interrupts are for board specific purposes. Since
  * the kernel can only run on one machine at a time, we can re-use
- * these.  If you need more, increase IRQ_BOARD_END, but keep it
- * within sensible limits.
+ * these.  There will be 16 IRQs by default.  If it is not enough,
+ * IRQ_BOARD_END is allowed be customized for each board, but keep
+ * the numbers within sensible limits and in descending order, so
+ * when multiple config options are selected, the maximum will be
+ * used.
  */
 #define IRQ_BOARD_START         (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
+
+#if defined(CONFIG_MACH_H4700)
+#define IRQ_BOARD_END           (IRQ_BOARD_START + 70)
+#elif defined(CONFIG_MACH_ZYLONITE)
+#define IRQ_BOARD_END           (IRQ_BOARD_START + 32)
+#else
 #define IRQ_BOARD_END           (IRQ_BOARD_START + 16)
+#endif
 
 #define IRQ_SA1111_START        (IRQ_BOARD_END)
 #define IRQ_GPAIN0              (IRQ_BOARD_END + 0)
@@ -188,8 +198,6 @@
 #define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
 #elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
 #define NR_IRQS                 (IRQ_BOARD_END)
-#elif defined(CONFIG_MACH_ZYLONITE)
-#define NR_IRQS                 (IRQ_BOARD_START + 32)
 #else
 #define NR_IRQS                 (IRQ_BOARD_START)
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
index 07897e61d05a..3ce4682eabb6 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
@@ -283,6 +283,9 @@
 #define GPIO41_UART1_TXD        MFP_CFG_LPM(GPIO41, AF4, FLOAT)
 #define GPIO42_UART1_RXD        MFP_CFG_LPM(GPIO42, AF4, FLOAT)
 #define GPIO42_UART1_TXD        MFP_CFG_LPM(GPIO42, AF2, FLOAT)
+#define GPIO75_UART1_RXD        MFP_CFG_LPM(GPIO75, AF1, FLOAT)
+#define GPIO76_UART1_RXD        MFP_CFG_LPM(GPIO76, AF3, FLOAT)
+#define GPIO76_UART1_TXD        MFP_CFG_LPM(GPIO76, AF1, FLOAT)
 #define GPIO97_UART1_RXD        MFP_CFG_LPM(GPIO97, AF1, FLOAT)
 #define GPIO97_UART1_TXD        MFP_CFG_LPM(GPIO97, AF6, FLOAT)
 #define GPIO98_UART1_RXD        MFP_CFG_LPM(GPIO98, AF6, FLOAT)
@@ -291,6 +294,9 @@
 #define GPIO43_UART1_RTS        MFP_CFG_LPM(GPIO43, AF4, FLOAT)
 #define GPIO48_UART1_CTS        MFP_CFG_LPM(GPIO48, AF4, FLOAT)
 #define GPIO48_UART1_RTS        MFP_CFG_LPM(GPIO48, AF2, FLOAT)
+#define GPIO77_UART1_CTS        MFP_CFG_LPM(GPIO77, AF1, FLOAT)
+#define GPIO82_UART1_RTS        MFP_CFG_LPM(GPIO82, AF1, FLOAT)
+#define GPIO82_UART1_CTS        MFP_CFG_LPM(GPIO82, AF3, FLOAT)
 #define GPIO99_UART1_CTS        MFP_CFG_LPM(GPIO99, AF1, FLOAT)
 #define GPIO99_UART1_RTS        MFP_CFG_LPM(GPIO99, AF6, FLOAT)
 #define GPIO104_UART1_CTS       MFP_CFG_LPM(GPIO104, AF6, FLOAT)
@@ -299,13 +305,18 @@
 #define GPIO45_UART1_DSR        MFP_CFG_LPM(GPIO45, AF2, FLOAT)
 #define GPIO47_UART1_DTR        MFP_CFG_LPM(GPIO47, AF2, FLOAT)
 #define GPIO47_UART1_DSR        MFP_CFG_LPM(GPIO47, AF4, FLOAT)
+#define GPIO79_UART1_DSR        MFP_CFG_LPM(GPIO79, AF1, FLOAT)
+#define GPIO81_UART1_DTR        MFP_CFG_LPM(GPIO81, AF1, FLOAT)
+#define GPIO81_UART1_DSR        MFP_CFG_LPM(GPIO81, AF3, FLOAT)
 #define GPIO101_UART1_DTR       MFP_CFG_LPM(GPIO101, AF6, FLOAT)
 #define GPIO101_UART1_DSR       MFP_CFG_LPM(GPIO101, AF1, FLOAT)
 #define GPIO103_UART1_DTR       MFP_CFG_LPM(GPIO103, AF1, FLOAT)
 #define GPIO103_UART1_DSR       MFP_CFG_LPM(GPIO103, AF6, FLOAT)
 #define GPIO44_UART1_DCD        MFP_CFG_LPM(GPIO44, AF2, FLOAT)
+#define GPIO78_UART1_DCD        MFP_CFG_LPM(GPIO78, AF1, FLOAT)
 #define GPIO100_UART1_DCD       MFP_CFG_LPM(GPIO100, AF1, FLOAT)
 #define GPIO46_UART1_RI         MFP_CFG_LPM(GPIO46, AF2, FLOAT)
+#define GPIO80_UART1_RI         MFP_CFG_LPM(GPIO80, AF1, FLOAT)
 #define GPIO102_UART1_RI        MFP_CFG_LPM(GPIO102, AF1, FLOAT)
 
 /* UART2 */
@@ -438,6 +449,9 @@
 
 #define GPIO2_RDY               MFP_CFG(GPIO2, AF1)
 #define GPIO5_NPIOR             MFP_CFG(GPIO5, AF3)
+#define GPIO6_NPIOW             MFP_CFG(GPIO6, AF3)
+#define GPIO7_NPIOS16           MFP_CFG(GPIO7, AF3)
+#define GPIO8_NPWAIT            MFP_CFG(GPIO8, AF3)
 
 #define GPIO11_PWM0_OUT         MFP_CFG(GPIO11, AF1)
 #define GPIO12_PWM1_OUT         MFP_CFG(GPIO12, AF1)
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h
index a6eeef8a075f..fd8360c6839d 100644
--- a/arch/arm/mach-pxa/include/mach/pm.h
+++ b/arch/arm/mach-pxa/include/mach/pm.h
@@ -27,6 +27,8 @@ extern void pxa27x_cpu_suspend(unsigned int);
 extern void pxa_cpu_resume(void);
 
 extern int pxa_pm_enter(suspend_state_t state);
+extern int pxa_pm_prepare(void);
+extern void pxa_pm_finish(void);
 
 /* NOTE: this is for PM debugging on Lubbock,  it's really a big
  * ugly, but let's keep the crap minimum here, instead of direct
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h
index 6876e16c2970..0b702693f458 100644
--- a/arch/arm/mach-pxa/include/mach/pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/pxa27x.h
@@ -16,4 +16,7 @@
 #define ARB_DMA_PARK            (1<<25)    /* Be parked with DMA when idle */
 #define ARB_CORE_PARK           (1<<24)    /* Be parked with core when idle */
 #define ARB_LOCK_FLAG           (1<<23)    /* Only Locking masters gain access to the bus */
+
+extern int __init pxa27x_set_pwrmode(unsigned int mode);
+
 #endif /* __MACH_PXA27x_H */
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl_pm.h b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
new file mode 100644
index 000000000000..1920dc6b05dc
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/sharpsl_pm.h
@@ -0,0 +1,104 @@
+/*
+ * SharpSL Battery/PM Driver
+ *
+ * Copyright (c) 2004-2005 Richard Purdie
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef _MACH_SHARPSL_PM
+#define _MACH_SHARPSL_PM
+
+struct sharpsl_charger_machinfo {
+        void (*init)(void);
+        void (*exit)(void);
+        int gpio_acin;
+        int gpio_batfull;
+        int batfull_irq;
+        int gpio_batlock;
+        int gpio_fatal;
+        void (*discharge)(int);
+        void (*discharge1)(int);
+        void (*charge)(int);
+        void (*measure_temp)(int);
+        void (*presuspend)(void);
+        void (*postsuspend)(void);
+        void (*earlyresume)(void);
+        unsigned long (*read_devdata)(int);
+#define SHARPSL_BATT_VOLT       1
+#define SHARPSL_BATT_TEMP       2
+#define SHARPSL_ACIN_VOLT       3
+#define SHARPSL_STATUS_ACIN     4
+#define SHARPSL_STATUS_LOCK     5
+#define SHARPSL_STATUS_CHRGFULL 6
+#define SHARPSL_STATUS_FATAL    7
+        unsigned long (*charger_wakeup)(void);
+        int (*should_wakeup)(unsigned int resume_on_alarm);
+        void (*backlight_limit)(int);
+        int (*backlight_get_status) (void);
+        int charge_on_volt;
+        int charge_on_temp;
+        int charge_acin_high;
+        int charge_acin_low;
+        int fatal_acin_volt;
+        int fatal_noacin_volt;
+        int bat_levels;
+        struct battery_thresh *bat_levels_noac;
+        struct battery_thresh *bat_levels_acin;
+        struct battery_thresh *bat_levels_noac_bl;
+        struct battery_thresh *bat_levels_acin_bl;
+        int status_high_acin;
+        int status_low_acin;
+        int status_high_noac;
+        int status_low_noac;
+};
+
+struct battery_thresh {
+        int voltage;
+        int percentage;
+};
+
+struct battery_stat {
+        int ac_status;         /* APM AC Present/Not Present */
+        int mainbat_status;    /* APM Main Battery Status */
+        int mainbat_percent;   /* Main Battery Percentage Charge */
+        int mainbat_voltage;   /* Main Battery Voltage */
+};
+
+struct sharpsl_pm_status {
+        struct device *dev;
+        struct timer_list ac_timer;
+        struct timer_list chrg_full_timer;
+
+        int charge_mode;
+#define CHRG_ERROR    (-1)
+#define CHRG_OFF      (0)
+#define CHRG_ON       (1)
+#define CHRG_DONE     (2)
+
+        unsigned int flags;
+#define SHARPSL_SUSPENDED       (1 << 0)  /* Device is Suspended */
+#define SHARPSL_ALARM_ACTIVE    (1 << 1)  /* Alarm is for charging event (not user) */
+#define SHARPSL_BL_LIMIT        (1 << 2)  /* Backlight Intensity Limited */
+#define SHARPSL_APM_QUEUED      (1 << 3)  /* APM Event Queued */
+#define SHARPSL_DO_OFFLINE_CHRG (1 << 4)  /* Trigger the offline charger */
+
+        int full_count;
+        unsigned long charge_start_time;
+        struct sharpsl_charger_machinfo *machinfo;
+        struct battery_stat battstat;
+};
+
+extern struct sharpsl_pm_status sharpsl_pm;
+
+
+#define SHARPSL_LED_ERROR  2
+#define SHARPSL_LED_ON     1
+#define SHARPSL_LED_OFF    0
+
+void sharpsl_battery_kick(void);
+void sharpsl_pm_led(int val);
+
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 5706cea95d11..b54749413e96 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -36,7 +36,8 @@ static inline void flush(void)
 static inline void arch_decomp_setup(void)
 {
         if (machine_is_littleton() || machine_is_intelmote2()
-                        || machine_is_csb726())
+            || machine_is_csb726() || machine_is_stargate2()
+            || machine_is_cm_x300())
                 UART = STUART;
 }