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authorHerbert Xu <herbert@gondor.apana.org.au>2010-05-02 23:28:58 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2010-05-02 23:28:58 -0400
commitdf2071bd081408318d659cd14a9cf6ff23d874c9 (patch)
treeb31291b5fd4b9f84c629833afbfaa8d431857475 /arch/arm/mach-pxa/include/mach/uncompress.h
parent97e3d94aac1c3e95bd04d1b186479a4df3663ab8 (diff)
parentbe1066bbcd443a65df312fdecea7e4959adedb45 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/arm/mach-pxa/include/mach/uncompress.h')
-rw-r--r--arch/arm/mach-pxa/include/mach/uncompress.h46
1 files changed, 39 insertions, 7 deletions
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 237734b5b1be..759b851ec985 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -10,20 +10,41 @@
10 */ 10 */
11 11
12#include <linux/serial_reg.h> 12#include <linux/serial_reg.h>
13#include <mach/regs-uart.h>
14#include <asm/mach-types.h> 13#include <asm/mach-types.h>
15 14
16#define __REG(x) ((volatile unsigned long *)x) 15#define FFUART_BASE (0x40100000)
16#define BTUART_BASE (0x40200000)
17#define STUART_BASE (0x40700000)
17 18
18static volatile unsigned long *UART = FFUART; 19static unsigned long uart_base;
20static unsigned int uart_shift;
21static unsigned int uart_is_pxa;
22
23static inline unsigned char uart_read(int offset)
24{
25 return *(volatile unsigned char *)(uart_base + (offset << uart_shift));
26}
27
28static inline void uart_write(unsigned char val, int offset)
29{
30 *(volatile unsigned char *)(uart_base + (offset << uart_shift)) = val;
31}
32
33static inline int uart_is_enabled(void)
34{
35 /* assume enabled by default for non-PXA uarts */
36 return uart_is_pxa ? uart_read(UART_IER) & UART_IER_UUE : 1;
37}
19 38
20static inline void putc(char c) 39static inline void putc(char c)
21{ 40{
22 if (!(UART[UART_IER] & IER_UUE)) 41 if (!uart_is_enabled())
23 return; 42 return;
24 while (!(UART[UART_LSR] & LSR_TDRQ)) 43
44 while (!(uart_read(UART_LSR) & UART_LSR_THRE))
25 barrier(); 45 barrier();
26 UART[UART_TX] = c; 46
47 uart_write(c, UART_TX);
27} 48}
28 49
29/* 50/*
@@ -35,10 +56,21 @@ static inline void flush(void)
35 56
36static inline void arch_decomp_setup(void) 57static inline void arch_decomp_setup(void)
37{ 58{
59 /* initialize to default */
60 uart_base = FFUART_BASE;
61 uart_shift = 2;
62 uart_is_pxa = 1;
63
38 if (machine_is_littleton() || machine_is_intelmote2() 64 if (machine_is_littleton() || machine_is_intelmote2()
39 || machine_is_csb726() || machine_is_stargate2() 65 || machine_is_csb726() || machine_is_stargate2()
40 || machine_is_cm_x300() || machine_is_balloon3()) 66 || machine_is_cm_x300() || machine_is_balloon3())
41 UART = STUART; 67 uart_base = STUART_BASE;
68
69 if (machine_is_arcom_zeus()) {
70 uart_base = 0x10000000; /* nCS4 */
71 uart_shift = 1;
72 uart_is_pxa = 0;
73 }
42} 74}
43 75
44/* 76/*