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authorCatalin Marinas <catalin.marinas@arm.com>2013-01-14 13:05:37 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2013-03-26 12:12:02 -0400
commitc0114709ed85a5693eb74acdfa03d94f7f12e5b8 (patch)
tree372c5cee96580d73e638d25a2b169a64b82bc908 /arch/arm/mach-prima2
parentaec0095653cd9812b9a15df0315364cc6d094c59 (diff)
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
All the calls to gic_secondary_init() pass 0 as the first argument. Since this function is called on each CPU when starting, it can be done in a platform-independent way via a CPU notifier registered by the GIC code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Tested-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Barry Song <baohua.song@csr.com>
Diffstat (limited to 'arch/arm/mach-prima2')
-rw-r--r--arch/arm/mach-prima2/platsmp.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
index 4b788310f6a6..c7c92e78f0cf 100644
--- a/arch/arm/mach-prima2/platsmp.c
+++ b/arch/arm/mach-prima2/platsmp.c
@@ -11,7 +11,6 @@
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/of.h> 12#include <linux/of.h>
13#include <linux/of_address.h> 13#include <linux/of_address.h>
14#include <linux/irqchip/arm-gic.h>
15#include <asm/page.h> 14#include <asm/page.h>
16#include <asm/mach/map.h> 15#include <asm/mach/map.h>
17#include <asm/smp_plat.h> 16#include <asm/smp_plat.h>
@@ -49,13 +48,6 @@ void __init sirfsoc_map_scu(void)
49static void __cpuinit sirfsoc_secondary_init(unsigned int cpu) 48static void __cpuinit sirfsoc_secondary_init(unsigned int cpu)
50{ 49{
51 /* 50 /*
52 * if any interrupts are already enabled for the primary
53 * core (e.g. timer irq), then they will not have been enabled
54 * for us: do so
55 */
56 gic_secondary_init(0);
57
58 /*
59 * let the primary processor know we're out of the 51 * let the primary processor know we're out of the
60 * pen, then head off into the C entry point 52 * pen, then head off into the C entry point
61 */ 53 */