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authorRob Herring <rob.herring@calxeda.com>2012-07-06 11:59:30 -0400
committerRob Herring <rob.herring@calxeda.com>2012-07-26 10:10:01 -0400
commit0a4b8c654615be5dd12d67e951446095bef8b565 (patch)
tree4461defb4755a0127d92996985bb6ebf1f6748d0 /arch/arm/mach-orion5x/include
parent2bb080851a5193a10b89d3f550c60240ef401aa1 (diff)
ARM: orion5x: use fixed PCI i/o mapping
Move orion5x PCI to fixed i/o mapping and remove io.h. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-orion5x/include')
-rw-r--r--arch/arm/mach-orion5x/include/mach/io.h22
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h20
2 files changed, 9 insertions, 33 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
deleted file mode 100644
index 1aa5d0a50a0b..000000000000
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/io.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_IO_H
10#define __ASM_ARCH_IO_H
11
12#include <mach/orion5x.h>
13#include <asm/sizes.h>
14
15#define IO_SPACE_LIMIT SZ_2M
16static inline void __iomem *__io(unsigned long addr)
17{
18 return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE);
19}
20
21#define __io(a) __io(a)
22#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 683e085ce162..1b60131b7f60 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -31,31 +31,29 @@
31 * fc000000 device bus mappings (cs0/cs1) 31 * fc000000 device bus mappings (cs0/cs1)
32 * 32 *
33 * virt phys size 33 * virt phys size
34 * fdd00000 f1000000 1M on-chip peripheral registers 34 * fe000000 f1000000 1M on-chip peripheral registers
35 * fde00000 f2000000 1M PCIe I/O space 35 * fee00000 f2000000 64K PCIe I/O space
36 * fdf00000 f2100000 1M PCI I/O space 36 * fee10000 f2100000 64K PCI I/O space
37 * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) 37 * fd000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only)
38 ****************************************************************************/ 38 ****************************************************************************/
39#define ORION5X_REGS_PHYS_BASE 0xf1000000 39#define ORION5X_REGS_PHYS_BASE 0xf1000000
40#define ORION5X_REGS_VIRT_BASE 0xfdd00000 40#define ORION5X_REGS_VIRT_BASE 0xfe000000
41#define ORION5X_REGS_SIZE SZ_1M 41#define ORION5X_REGS_SIZE SZ_1M
42 42
43#define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 43#define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
44#define ORION5X_PCIE_IO_VIRT_BASE 0xfde00000
45#define ORION5X_PCIE_IO_BUS_BASE 0x00000000 44#define ORION5X_PCIE_IO_BUS_BASE 0x00000000
46#define ORION5X_PCIE_IO_SIZE SZ_1M 45#define ORION5X_PCIE_IO_SIZE SZ_64K
47 46
48#define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 47#define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
49#define ORION5X_PCI_IO_VIRT_BASE 0xfdf00000 48#define ORION5X_PCI_IO_BUS_BASE 0x00010000
50#define ORION5X_PCI_IO_BUS_BASE 0x00100000 49#define ORION5X_PCI_IO_SIZE SZ_64K
51#define ORION5X_PCI_IO_SIZE SZ_1M
52 50
53#define ORION5X_SRAM_PHYS_BASE (0xf2200000) 51#define ORION5X_SRAM_PHYS_BASE (0xf2200000)
54#define ORION5X_SRAM_SIZE SZ_8K 52#define ORION5X_SRAM_SIZE SZ_8K
55 53
56/* Relevant only for Orion-1/Orion-NAS */ 54/* Relevant only for Orion-1/Orion-NAS */
57#define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 55#define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
58#define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000 56#define ORION5X_PCIE_WA_VIRT_BASE 0xfd000000
59#define ORION5X_PCIE_WA_SIZE SZ_16M 57#define ORION5X_PCIE_WA_SIZE SZ_16M
60 58
61#define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 59#define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000