aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-orion5x/addr-map.c
diff options
context:
space:
mode:
authorVegard Nossum <vegard.nossum@gmail.com>2009-06-15 09:50:49 -0400
committerVegard Nossum <vegard.nossum@gmail.com>2009-06-15 09:50:49 -0400
commit722f2a6c87f34ee0fd0130a8cf45f81e0705594a (patch)
tree50b054df34d2731eb0ba0cf1a6c27e43e7eed428 /arch/arm/mach-orion5x/addr-map.c
parent7a0aeb14e18ad59394bd9bbc6e57fb345819e748 (diff)
parent45e3e1935e2857c54783291107d33323b3ef33c8 (diff)
Merge commit 'linus/master' into HEAD
Conflicts: MAINTAINERS Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
Diffstat (limited to 'arch/arm/mach-orion5x/addr-map.c')
-rw-r--r--arch/arm/mach-orion5x/addr-map.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index c14d12137276..6f3f77d031d0 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/mbus.h> 15#include <linux/mbus.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/errno.h>
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include "common.h" 19#include "common.h"
19 20
@@ -44,6 +45,7 @@
44#define TARGET_DEV_BUS 1 45#define TARGET_DEV_BUS 1
45#define TARGET_PCI 3 46#define TARGET_PCI 3
46#define TARGET_PCIE 4 47#define TARGET_PCIE 4
48#define TARGET_SRAM 9
47#define ATTR_PCIE_MEM 0x59 49#define ATTR_PCIE_MEM 0x59
48#define ATTR_PCIE_IO 0x51 50#define ATTR_PCIE_IO 0x51
49#define ATTR_PCIE_WA 0x79 51#define ATTR_PCIE_WA 0x79
@@ -53,6 +55,7 @@
53#define ATTR_DEV_CS1 0x1d 55#define ATTR_DEV_CS1 0x1d
54#define ATTR_DEV_CS2 0x1b 56#define ATTR_DEV_CS2 0x1b
55#define ATTR_DEV_BOOT 0xf 57#define ATTR_DEV_BOOT 0xf
58#define ATTR_SRAM 0x0
56 59
57/* 60/*
58 * Helpers to get DDR bank info 61 * Helpers to get DDR bank info
@@ -87,13 +90,13 @@ static int __init orion5x_cpu_win_can_remap(int win)
87 return 0; 90 return 0;
88} 91}
89 92
90static void __init setup_cpu_win(int win, u32 base, u32 size, 93static int __init setup_cpu_win(int win, u32 base, u32 size,
91 u8 target, u8 attr, int remap) 94 u8 target, u8 attr, int remap)
92{ 95{
93 if (win >= 8) { 96 if (win >= 8) {
94 printk(KERN_ERR "setup_cpu_win: trying to allocate " 97 printk(KERN_ERR "setup_cpu_win: trying to allocate "
95 "window %d\n", win); 98 "window %d\n", win);
96 return; 99 return -ENOSPC;
97 } 100 }
98 101
99 writel(base & 0xffff0000, CPU_WIN_BASE(win)); 102 writel(base & 0xffff0000, CPU_WIN_BASE(win));
@@ -107,6 +110,7 @@ static void __init setup_cpu_win(int win, u32 base, u32 size,
107 writel(remap & 0xffff0000, CPU_WIN_REMAP_LO(win)); 110 writel(remap & 0xffff0000, CPU_WIN_REMAP_LO(win));
108 writel(0, CPU_WIN_REMAP_HI(win)); 111 writel(0, CPU_WIN_REMAP_HI(win));
109 } 112 }
113 return 0;
110} 114}
111 115
112void __init orion5x_setup_cpu_mbus_bridge(void) 116void __init orion5x_setup_cpu_mbus_bridge(void)
@@ -193,3 +197,9 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
193 setup_cpu_win(win_alloc_count++, base, size, 197 setup_cpu_win(win_alloc_count++, base, size,
194 TARGET_PCIE, ATTR_PCIE_WA, -1); 198 TARGET_PCIE, ATTR_PCIE_WA, -1);
195} 199}
200
201int __init orion5x_setup_sram_win(void)
202{
203 return setup_cpu_win(win_alloc_count, ORION5X_SRAM_PHYS_BASE,
204 ORION5X_SRAM_SIZE, TARGET_SRAM, ATTR_SRAM, -1);
205}