diff options
author | Ingo Molnar <mingo@kernel.org> | 2012-12-08 09:25:06 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2012-12-08 09:25:06 -0500 |
commit | f0b9abfb044649bc452fb2fb975ff2fd599cc6a3 (patch) | |
tree | 7800081c5cb16a4dfee1e57a70f3be90f7b50d9a /arch/arm/mach-omap2 | |
parent | adc1ef1e37358d3c17d1a74a58b2e104fc0bda15 (diff) | |
parent | 1b3c393cd43f22ead8a6a2f839efc6df8ebd7465 (diff) |
Merge branch 'linus' into perf/core
Conflicts:
tools/perf/Makefile
tools/perf/builtin-test.c
tools/perf/perf.h
tools/perf/tests/parse-events.c
tools/perf/util/evsel.h
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-igep0020.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-omap3beagle.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock33xx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomains44xx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/common-board-devices.c | 34 | ||||
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 79 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mux34xx.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 63 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 36 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 30 | ||||
-rw-r--r-- | arch/arm/mach-omap2/serial.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-omap2/twl-common.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/vc.c | 2 |
15 files changed, 246 insertions, 47 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2a1a898c7f90..d669e227e00c 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -11,7 +11,6 @@ config ARCH_OMAP2PLUS_TYPICAL | |||
11 | select I2C_OMAP | 11 | select I2C_OMAP |
12 | select MENELAUS if ARCH_OMAP2 | 12 | select MENELAUS if ARCH_OMAP2 |
13 | select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 | 13 | select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 |
14 | select PINCTRL | ||
15 | select PM_RUNTIME | 14 | select PM_RUNTIME |
16 | select REGULATOR | 15 | select REGULATOR |
17 | select SERIAL_OMAP | 16 | select SERIAL_OMAP |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 48d5e41dfbfa..378590694447 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -580,6 +580,11 @@ static void __init igep_wlan_bt_init(void) | |||
580 | } else | 580 | } else |
581 | return; | 581 | return; |
582 | 582 | ||
583 | /* Make sure that the GPIO pins are muxed correctly */ | ||
584 | omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT); | ||
585 | omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT); | ||
586 | omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT); | ||
587 | |||
583 | err = gpio_request_array(igep_wlan_bt_gpios, | 588 | err = gpio_request_array(igep_wlan_bt_gpios, |
584 | ARRAY_SIZE(igep_wlan_bt_gpios)); | 589 | ARRAY_SIZE(igep_wlan_bt_gpios)); |
585 | if (err) { | 590 | if (err) { |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 388c431c745a..d41ab98890ff 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/input.h> | 24 | #include <linux/input.h> |
25 | #include <linux/gpio_keys.h> | 25 | #include <linux/gpio_keys.h> |
26 | #include <linux/opp.h> | 26 | #include <linux/opp.h> |
27 | #include <linux/cpu.h> | ||
27 | 28 | ||
28 | #include <linux/mtd/mtd.h> | 29 | #include <linux/mtd/mtd.h> |
29 | #include <linux/mtd/partitions.h> | 30 | #include <linux/mtd/partitions.h> |
@@ -444,27 +445,31 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
444 | }; | 445 | }; |
445 | #endif | 446 | #endif |
446 | 447 | ||
447 | static void __init beagle_opp_init(void) | 448 | static int __init beagle_opp_init(void) |
448 | { | 449 | { |
449 | int r = 0; | 450 | int r = 0; |
450 | 451 | ||
451 | /* Initialize the omap3 opp table */ | 452 | if (!machine_is_omap3_beagle()) |
452 | if (omap3_opp_init()) { | 453 | return 0; |
454 | |||
455 | /* Initialize the omap3 opp table if not already created. */ | ||
456 | r = omap3_opp_init(); | ||
457 | if (IS_ERR_VALUE(r) && (r != -EEXIST)) { | ||
453 | pr_err("%s: opp default init failed\n", __func__); | 458 | pr_err("%s: opp default init failed\n", __func__); |
454 | return; | 459 | return r; |
455 | } | 460 | } |
456 | 461 | ||
457 | /* Custom OPP enabled for all xM versions */ | 462 | /* Custom OPP enabled for all xM versions */ |
458 | if (cpu_is_omap3630()) { | 463 | if (cpu_is_omap3630()) { |
459 | struct device *mpu_dev, *iva_dev; | 464 | struct device *mpu_dev, *iva_dev; |
460 | 465 | ||
461 | mpu_dev = omap_device_get_by_hwmod_name("mpu"); | 466 | mpu_dev = get_cpu_device(0); |
462 | iva_dev = omap_device_get_by_hwmod_name("iva"); | 467 | iva_dev = omap_device_get_by_hwmod_name("iva"); |
463 | 468 | ||
464 | if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) { | 469 | if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) { |
465 | pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", | 470 | pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", |
466 | __func__, mpu_dev, iva_dev); | 471 | __func__, mpu_dev, iva_dev); |
467 | return; | 472 | return -ENODEV; |
468 | } | 473 | } |
469 | /* Enable MPU 1GHz and lower opps */ | 474 | /* Enable MPU 1GHz and lower opps */ |
470 | r = opp_enable(mpu_dev, 800000000); | 475 | r = opp_enable(mpu_dev, 800000000); |
@@ -484,8 +489,9 @@ static void __init beagle_opp_init(void) | |||
484 | opp_disable(iva_dev, 660000000); | 489 | opp_disable(iva_dev, 660000000); |
485 | } | 490 | } |
486 | } | 491 | } |
487 | return; | 492 | return 0; |
488 | } | 493 | } |
494 | device_initcall(beagle_opp_init); | ||
489 | 495 | ||
490 | static void __init omap3_beagle_init(void) | 496 | static void __init omap3_beagle_init(void) |
491 | { | 497 | { |
@@ -522,8 +528,6 @@ static void __init omap3_beagle_init(void) | |||
522 | /* Ensure SDRC pins are mux'd for self-refresh */ | 528 | /* Ensure SDRC pins are mux'd for self-refresh */ |
523 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); | 529 | omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); |
524 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); | 530 | omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); |
525 | |||
526 | beagle_opp_init(); | ||
527 | } | 531 | } |
528 | 532 | ||
529 | MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | 533 | MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") |
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c index 114ab4b8e0e3..1a45d6bd2539 100644 --- a/arch/arm/mach-omap2/clock33xx_data.c +++ b/arch/arm/mach-omap2/clock33xx_data.c | |||
@@ -1073,6 +1073,8 @@ static struct omap_clk am33xx_clks[] = { | |||
1073 | CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX), | 1073 | CLK(NULL, "gfx_fck_div_ck", &gfx_fck_div_ck, CK_AM33XX), |
1074 | CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX), | 1074 | CLK(NULL, "sysclkout_pre_ck", &sysclkout_pre_ck, CK_AM33XX), |
1075 | CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX), | 1075 | CLK(NULL, "clkout2_ck", &clkout2_ck, CK_AM33XX), |
1076 | CLK(NULL, "timer_32k_ck", &clkdiv32k_ick, CK_AM33XX), | ||
1077 | CLK(NULL, "timer_sys_ck", &sys_clkin_ck, CK_AM33XX), | ||
1076 | }; | 1078 | }; |
1077 | 1079 | ||
1078 | int __init am33xx_clk_init(void) | 1080 | int __init am33xx_clk_init(void) |
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index b56d06b48782..95192a062d5d 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c | |||
@@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = { | |||
359 | .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS, | 359 | .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS, |
360 | .wkdep_srcs = iss_wkup_sleep_deps, | 360 | .wkdep_srcs = iss_wkup_sleep_deps, |
361 | .sleepdep_srcs = iss_wkup_sleep_deps, | 361 | .sleepdep_srcs = iss_wkup_sleep_deps, |
362 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 362 | .flags = CLKDM_CAN_SWSUP, |
363 | }; | 363 | }; |
364 | 364 | ||
365 | static struct clockdomain l3_dss_44xx_clkdm = { | 365 | static struct clockdomain l3_dss_44xx_clkdm = { |
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c index 48daac2581b4..84551f205e46 100644 --- a/arch/arm/mach-omap2/common-board-devices.c +++ b/arch/arm/mach-omap2/common-board-devices.c | |||
@@ -64,30 +64,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, | |||
64 | struct spi_board_info *spi_bi = &ads7846_spi_board_info; | 64 | struct spi_board_info *spi_bi = &ads7846_spi_board_info; |
65 | int err; | 65 | int err; |
66 | 66 | ||
67 | err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown"); | 67 | /* |
68 | if (err) { | 68 | * If a board defines get_pendown_state() function, request the pendown |
69 | pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err); | 69 | * GPIO and set the GPIO debounce time. |
70 | return; | 70 | * If a board does not define the get_pendown_state() function, then |
71 | } | 71 | * the ads7846 driver will setup the pendown GPIO itself. |
72 | */ | ||
73 | if (board_pdata && board_pdata->get_pendown_state) { | ||
74 | err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown"); | ||
75 | if (err) { | ||
76 | pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err); | ||
77 | return; | ||
78 | } | ||
72 | 79 | ||
73 | if (gpio_debounce) | 80 | if (gpio_debounce) |
74 | gpio_set_debounce(gpio_pendown, gpio_debounce); | 81 | gpio_set_debounce(gpio_pendown, gpio_debounce); |
82 | |||
83 | gpio_export(gpio_pendown, 0); | ||
84 | } | ||
75 | 85 | ||
76 | spi_bi->bus_num = bus_num; | 86 | spi_bi->bus_num = bus_num; |
77 | spi_bi->irq = gpio_to_irq(gpio_pendown); | 87 | spi_bi->irq = gpio_to_irq(gpio_pendown); |
78 | 88 | ||
89 | ads7846_config.gpio_pendown = gpio_pendown; | ||
90 | |||
79 | if (board_pdata) { | 91 | if (board_pdata) { |
80 | board_pdata->gpio_pendown = gpio_pendown; | 92 | board_pdata->gpio_pendown = gpio_pendown; |
93 | board_pdata->gpio_pendown_debounce = gpio_debounce; | ||
81 | spi_bi->platform_data = board_pdata; | 94 | spi_bi->platform_data = board_pdata; |
82 | if (board_pdata->get_pendown_state) | ||
83 | gpio_export(gpio_pendown, 0); | ||
84 | } else { | ||
85 | ads7846_config.gpio_pendown = gpio_pendown; | ||
86 | } | 95 | } |
87 | 96 | ||
88 | if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state)) | ||
89 | gpio_free(gpio_pendown); | ||
90 | |||
91 | spi_register_board_info(&ads7846_spi_board_info, 1); | 97 | spi_register_board_info(&ads7846_spi_board_info, 1); |
92 | } | 98 | } |
93 | #else | 99 | #else |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index cba60e05e32e..c72b5a727720 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/of.h> | 19 | #include <linux/of.h> |
20 | #include <linux/pinctrl/machine.h> | 20 | #include <linux/pinctrl/machine.h> |
21 | #include <linux/platform_data/omap4-keypad.h> | 21 | #include <linux/platform_data/omap4-keypad.h> |
22 | #include <linux/platform_data/omap_ocp2scp.h> | ||
22 | 23 | ||
23 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
24 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
@@ -613,6 +614,83 @@ static void omap_init_vout(void) | |||
613 | static inline void omap_init_vout(void) {} | 614 | static inline void omap_init_vout(void) {} |
614 | #endif | 615 | #endif |
615 | 616 | ||
617 | #if defined(CONFIG_OMAP_OCP2SCP) || defined(CONFIG_OMAP_OCP2SCP_MODULE) | ||
618 | static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev) | ||
619 | { | ||
620 | int cnt = 0; | ||
621 | |||
622 | while (ocp2scp_dev->drv_name != NULL) { | ||
623 | cnt++; | ||
624 | ocp2scp_dev++; | ||
625 | } | ||
626 | |||
627 | return cnt; | ||
628 | } | ||
629 | |||
630 | static void omap_init_ocp2scp(void) | ||
631 | { | ||
632 | struct omap_hwmod *oh; | ||
633 | struct platform_device *pdev; | ||
634 | int bus_id = -1, dev_cnt = 0, i; | ||
635 | struct omap_ocp2scp_dev *ocp2scp_dev; | ||
636 | const char *oh_name, *name; | ||
637 | struct omap_ocp2scp_platform_data *pdata; | ||
638 | |||
639 | if (!cpu_is_omap44xx()) | ||
640 | return; | ||
641 | |||
642 | oh_name = "ocp2scp_usb_phy"; | ||
643 | name = "omap-ocp2scp"; | ||
644 | |||
645 | oh = omap_hwmod_lookup(oh_name); | ||
646 | if (!oh) { | ||
647 | pr_err("%s: could not find omap_hwmod for %s\n", __func__, | ||
648 | oh_name); | ||
649 | return; | ||
650 | } | ||
651 | |||
652 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | ||
653 | if (!pdata) { | ||
654 | pr_err("%s: No memory for ocp2scp pdata\n", __func__); | ||
655 | return; | ||
656 | } | ||
657 | |||
658 | ocp2scp_dev = oh->dev_attr; | ||
659 | dev_cnt = count_ocp2scp_devices(ocp2scp_dev); | ||
660 | |||
661 | if (!dev_cnt) { | ||
662 | pr_err("%s: No devices connected to ocp2scp\n", __func__); | ||
663 | kfree(pdata); | ||
664 | return; | ||
665 | } | ||
666 | |||
667 | pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *) | ||
668 | * dev_cnt, GFP_KERNEL); | ||
669 | if (!pdata->devices) { | ||
670 | pr_err("%s: No memory for ocp2scp pdata devices\n", __func__); | ||
671 | kfree(pdata); | ||
672 | return; | ||
673 | } | ||
674 | |||
675 | for (i = 0; i < dev_cnt; i++, ocp2scp_dev++) | ||
676 | pdata->devices[i] = ocp2scp_dev; | ||
677 | |||
678 | pdata->dev_cnt = dev_cnt; | ||
679 | |||
680 | pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL, | ||
681 | 0, false); | ||
682 | if (IS_ERR(pdev)) { | ||
683 | pr_err("Could not build omap_device for %s %s\n", | ||
684 | name, oh_name); | ||
685 | kfree(pdata->devices); | ||
686 | kfree(pdata); | ||
687 | return; | ||
688 | } | ||
689 | } | ||
690 | #else | ||
691 | static inline void omap_init_ocp2scp(void) { } | ||
692 | #endif | ||
693 | |||
616 | /*-------------------------------------------------------------------------*/ | 694 | /*-------------------------------------------------------------------------*/ |
617 | 695 | ||
618 | static int __init omap2_init_devices(void) | 696 | static int __init omap2_init_devices(void) |
@@ -640,6 +718,7 @@ static int __init omap2_init_devices(void) | |||
640 | omap_init_sham(); | 718 | omap_init_sham(); |
641 | omap_init_aes(); | 719 | omap_init_aes(); |
642 | omap_init_vout(); | 720 | omap_init_vout(); |
721 | omap_init_ocp2scp(); | ||
643 | 722 | ||
644 | return 0; | 723 | return 0; |
645 | } | 724 | } |
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index 17f80e4ab162..c47140bbbec4 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c | |||
@@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = { | |||
614 | "sys_off_mode", NULL, NULL, NULL, | 614 | "sys_off_mode", NULL, NULL, NULL, |
615 | "gpio_9", NULL, NULL, "safe_mode"), | 615 | "gpio_9", NULL, NULL, "safe_mode"), |
616 | _OMAP3_MUXENTRY(UART1_CTS, 150, | 616 | _OMAP3_MUXENTRY(UART1_CTS, 150, |
617 | "uart1_cts", NULL, NULL, NULL, | 617 | "uart1_cts", "ssi1_rdy_tx", NULL, NULL, |
618 | "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), | 618 | "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), |
619 | _OMAP3_MUXENTRY(UART1_RTS, 149, | 619 | _OMAP3_MUXENTRY(UART1_RTS, 149, |
620 | "uart1_rts", NULL, NULL, NULL, | 620 | "uart1_rts", "ssi1_flag_tx", NULL, NULL, |
621 | "gpio_149", NULL, NULL, "safe_mode"), | 621 | "gpio_149", NULL, NULL, "safe_mode"), |
622 | _OMAP3_MUXENTRY(UART1_RX, 151, | 622 | _OMAP3_MUXENTRY(UART1_RX, 151, |
623 | "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk", | 623 | "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", |
624 | "gpio_151", NULL, NULL, "safe_mode"), | 624 | "gpio_151", NULL, NULL, "safe_mode"), |
625 | _OMAP3_MUXENTRY(UART1_TX, 148, | 625 | _OMAP3_MUXENTRY(UART1_TX, 148, |
626 | "uart1_tx", NULL, NULL, NULL, | 626 | "uart1_tx", "ssi1_dat_tx", NULL, NULL, |
627 | "gpio_148", NULL, NULL, "safe_mode"), | 627 | "gpio_148", NULL, NULL, "safe_mode"), |
628 | _OMAP3_MUXENTRY(UART2_CTS, 144, | 628 | _OMAP3_MUXENTRY(UART2_CTS, 144, |
629 | "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, | 629 | "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index b969ab1d258b..87cc6d058de2 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -422,6 +422,38 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v) | |||
422 | } | 422 | } |
423 | 423 | ||
424 | /** | 424 | /** |
425 | * _wait_softreset_complete - wait for an OCP softreset to complete | ||
426 | * @oh: struct omap_hwmod * to wait on | ||
427 | * | ||
428 | * Wait until the IP block represented by @oh reports that its OCP | ||
429 | * softreset is complete. This can be triggered by software (see | ||
430 | * _ocp_softreset()) or by hardware upon returning from off-mode (one | ||
431 | * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT | ||
432 | * microseconds. Returns the number of microseconds waited. | ||
433 | */ | ||
434 | static int _wait_softreset_complete(struct omap_hwmod *oh) | ||
435 | { | ||
436 | struct omap_hwmod_class_sysconfig *sysc; | ||
437 | u32 softrst_mask; | ||
438 | int c = 0; | ||
439 | |||
440 | sysc = oh->class->sysc; | ||
441 | |||
442 | if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS) | ||
443 | omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) | ||
444 | & SYSS_RESETDONE_MASK), | ||
445 | MAX_MODULE_SOFTRESET_WAIT, c); | ||
446 | else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { | ||
447 | softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); | ||
448 | omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) | ||
449 | & softrst_mask), | ||
450 | MAX_MODULE_SOFTRESET_WAIT, c); | ||
451 | } | ||
452 | |||
453 | return c; | ||
454 | } | ||
455 | |||
456 | /** | ||
425 | * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v | 457 | * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v |
426 | * @oh: struct omap_hwmod * | 458 | * @oh: struct omap_hwmod * |
427 | * | 459 | * |
@@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh) | |||
1282 | if (!oh->class->sysc) | 1314 | if (!oh->class->sysc) |
1283 | return; | 1315 | return; |
1284 | 1316 | ||
1317 | /* | ||
1318 | * Wait until reset has completed, this is needed as the IP | ||
1319 | * block is reset automatically by hardware in some cases | ||
1320 | * (off-mode for example), and the drivers require the | ||
1321 | * IP to be ready when they access it | ||
1322 | */ | ||
1323 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) | ||
1324 | _enable_optional_clocks(oh); | ||
1325 | _wait_softreset_complete(oh); | ||
1326 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) | ||
1327 | _disable_optional_clocks(oh); | ||
1328 | |||
1285 | v = oh->_sysc_cache; | 1329 | v = oh->_sysc_cache; |
1286 | sf = oh->class->sysc->sysc_flags; | 1330 | sf = oh->class->sysc->sysc_flags; |
1287 | 1331 | ||
@@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh) | |||
1804 | */ | 1848 | */ |
1805 | static int _ocp_softreset(struct omap_hwmod *oh) | 1849 | static int _ocp_softreset(struct omap_hwmod *oh) |
1806 | { | 1850 | { |
1807 | u32 v, softrst_mask; | 1851 | u32 v; |
1808 | int c = 0; | 1852 | int c = 0; |
1809 | int ret = 0; | 1853 | int ret = 0; |
1810 | 1854 | ||
@@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh) | |||
1834 | if (oh->class->sysc->srst_udelay) | 1878 | if (oh->class->sysc->srst_udelay) |
1835 | udelay(oh->class->sysc->srst_udelay); | 1879 | udelay(oh->class->sysc->srst_udelay); |
1836 | 1880 | ||
1837 | if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) | 1881 | c = _wait_softreset_complete(oh); |
1838 | omap_test_timeout((omap_hwmod_read(oh, | ||
1839 | oh->class->sysc->syss_offs) | ||
1840 | & SYSS_RESETDONE_MASK), | ||
1841 | MAX_MODULE_SOFTRESET_WAIT, c); | ||
1842 | else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { | ||
1843 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); | ||
1844 | omap_test_timeout(!(omap_hwmod_read(oh, | ||
1845 | oh->class->sysc->sysc_offs) | ||
1846 | & softrst_mask), | ||
1847 | MAX_MODULE_SOFTRESET_WAIT, c); | ||
1848 | } | ||
1849 | |||
1850 | if (c == MAX_MODULE_SOFTRESET_WAIT) | 1882 | if (c == MAX_MODULE_SOFTRESET_WAIT) |
1851 | pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", | 1883 | pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", |
1852 | oh->name, MAX_MODULE_SOFTRESET_WAIT); | 1884 | oh->name, MAX_MODULE_SOFTRESET_WAIT); |
@@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh) | |||
2352 | if (oh->_state != _HWMOD_STATE_INITIALIZED) | 2384 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
2353 | return -EINVAL; | 2385 | return -EINVAL; |
2354 | 2386 | ||
2387 | if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) | ||
2388 | return -EPERM; | ||
2389 | |||
2355 | if (oh->rst_lines_cnt == 0) { | 2390 | if (oh->rst_lines_cnt == 0) { |
2356 | r = _enable(oh); | 2391 | r = _enable(oh); |
2357 | if (r) { | 2392 | if (r) { |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 652d0285bd6d..0b1249e00398 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/platform_data/gpio-omap.h> | 22 | #include <linux/platform_data/gpio-omap.h> |
23 | #include <linux/power/smartreflex.h> | 23 | #include <linux/power/smartreflex.h> |
24 | #include <linux/platform_data/omap_ocp2scp.h> | ||
24 | 25 | ||
25 | #include <plat/omap_hwmod.h> | 26 | #include <plat/omap_hwmod.h> |
26 | #include <plat/i2c.h> | 27 | #include <plat/i2c.h> |
@@ -2125,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { | |||
2125 | .name = "mcpdm", | 2126 | .name = "mcpdm", |
2126 | .class = &omap44xx_mcpdm_hwmod_class, | 2127 | .class = &omap44xx_mcpdm_hwmod_class, |
2127 | .clkdm_name = "abe_clkdm", | 2128 | .clkdm_name = "abe_clkdm", |
2129 | /* | ||
2130 | * It's suspected that the McPDM requires an off-chip main | ||
2131 | * functional clock, controlled via I2C. This IP block is | ||
2132 | * currently reset very early during boot, before I2C is | ||
2133 | * available, so it doesn't seem that we have any choice in | ||
2134 | * the kernel other than to avoid resetting it. | ||
2135 | */ | ||
2136 | .flags = HWMOD_EXT_OPT_MAIN_CLK, | ||
2128 | .mpu_irqs = omap44xx_mcpdm_irqs, | 2137 | .mpu_irqs = omap44xx_mcpdm_irqs, |
2129 | .sdma_reqs = omap44xx_mcpdm_sdma_reqs, | 2138 | .sdma_reqs = omap44xx_mcpdm_sdma_reqs, |
2130 | .main_clk = "mcpdm_fck", | 2139 | .main_clk = "mcpdm_fck", |
@@ -2681,6 +2690,32 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = { | |||
2681 | .sysc = &omap44xx_ocp2scp_sysc, | 2690 | .sysc = &omap44xx_ocp2scp_sysc, |
2682 | }; | 2691 | }; |
2683 | 2692 | ||
2693 | /* ocp2scp dev_attr */ | ||
2694 | static struct resource omap44xx_usb_phy_and_pll_addrs[] = { | ||
2695 | { | ||
2696 | .name = "usb_phy", | ||
2697 | .start = 0x4a0ad080, | ||
2698 | .end = 0x4a0ae000, | ||
2699 | .flags = IORESOURCE_MEM, | ||
2700 | }, | ||
2701 | { | ||
2702 | /* XXX: Remove this once control module driver is in place */ | ||
2703 | .name = "ctrl_dev", | ||
2704 | .start = 0x4a002300, | ||
2705 | .end = 0x4a002303, | ||
2706 | .flags = IORESOURCE_MEM, | ||
2707 | }, | ||
2708 | { } | ||
2709 | }; | ||
2710 | |||
2711 | static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = { | ||
2712 | { | ||
2713 | .drv_name = "omap-usb2", | ||
2714 | .res = omap44xx_usb_phy_and_pll_addrs, | ||
2715 | }, | ||
2716 | { } | ||
2717 | }; | ||
2718 | |||
2684 | /* ocp2scp_usb_phy */ | 2719 | /* ocp2scp_usb_phy */ |
2685 | static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { | 2720 | static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { |
2686 | .name = "ocp2scp_usb_phy", | 2721 | .name = "ocp2scp_usb_phy", |
@@ -2694,6 +2729,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { | |||
2694 | .modulemode = MODULEMODE_HWCTRL, | 2729 | .modulemode = MODULEMODE_HWCTRL, |
2695 | }, | 2730 | }, |
2696 | }, | 2731 | }, |
2732 | .dev_attr = ocp2scp_dev_attr, | ||
2697 | }; | 2733 | }; |
2698 | 2734 | ||
2699 | /* | 2735 | /* |
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 686137d164da..67d66131cfa7 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
@@ -91,6 +91,7 @@ extern void omap3_save_scratchpad_contents(void); | |||
91 | 91 | ||
92 | #define PM_RTA_ERRATUM_i608 (1 << 0) | 92 | #define PM_RTA_ERRATUM_i608 (1 << 0) |
93 | #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) | 93 | #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) |
94 | #define PM_PER_MEMORIES_ERRATUM_i582 (1 << 2) | ||
94 | 95 | ||
95 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) | 96 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) |
96 | extern u16 pm34xx_errata; | 97 | extern u16 pm34xx_errata; |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index ba670db1fd37..3a904de4313e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -652,14 +652,17 @@ static void __init pm_errata_configure(void) | |||
652 | /* Enable the l2 cache toggling in sleep logic */ | 652 | /* Enable the l2 cache toggling in sleep logic */ |
653 | enable_omap3630_toggle_l2_on_restore(); | 653 | enable_omap3630_toggle_l2_on_restore(); |
654 | if (omap_rev() < OMAP3630_REV_ES1_2) | 654 | if (omap_rev() < OMAP3630_REV_ES1_2) |
655 | pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583; | 655 | pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 | |
656 | PM_PER_MEMORIES_ERRATUM_i582); | ||
657 | } else if (cpu_is_omap34xx()) { | ||
658 | pm34xx_errata |= PM_PER_MEMORIES_ERRATUM_i582; | ||
656 | } | 659 | } |
657 | } | 660 | } |
658 | 661 | ||
659 | int __init omap3_pm_init(void) | 662 | int __init omap3_pm_init(void) |
660 | { | 663 | { |
661 | struct power_state *pwrst, *tmp; | 664 | struct power_state *pwrst, *tmp; |
662 | struct clockdomain *neon_clkdm, *mpu_clkdm; | 665 | struct clockdomain *neon_clkdm, *mpu_clkdm, *per_clkdm, *wkup_clkdm; |
663 | int ret; | 666 | int ret; |
664 | 667 | ||
665 | if (!omap3_has_io_chain_ctrl()) | 668 | if (!omap3_has_io_chain_ctrl()) |
@@ -711,6 +714,8 @@ int __init omap3_pm_init(void) | |||
711 | 714 | ||
712 | neon_clkdm = clkdm_lookup("neon_clkdm"); | 715 | neon_clkdm = clkdm_lookup("neon_clkdm"); |
713 | mpu_clkdm = clkdm_lookup("mpu_clkdm"); | 716 | mpu_clkdm = clkdm_lookup("mpu_clkdm"); |
717 | per_clkdm = clkdm_lookup("per_clkdm"); | ||
718 | wkup_clkdm = clkdm_lookup("wkup_clkdm"); | ||
714 | 719 | ||
715 | #ifdef CONFIG_SUSPEND | 720 | #ifdef CONFIG_SUSPEND |
716 | omap_pm_suspend = omap3_pm_suspend; | 721 | omap_pm_suspend = omap3_pm_suspend; |
@@ -727,6 +732,27 @@ int __init omap3_pm_init(void) | |||
727 | if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608)) | 732 | if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608)) |
728 | omap3630_ctrl_disable_rta(); | 733 | omap3630_ctrl_disable_rta(); |
729 | 734 | ||
735 | /* | ||
736 | * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are | ||
737 | * not correctly reset when the PER powerdomain comes back | ||
738 | * from OFF or OSWR when the CORE powerdomain is kept active. | ||
739 | * See OMAP36xx Erratum i582 "PER Domain reset issue after | ||
740 | * Domain-OFF/OSWR Wakeup". This wakeup dependency is not a | ||
741 | * complete workaround. The kernel must also prevent the PER | ||
742 | * powerdomain from going to OSWR/OFF while the CORE | ||
743 | * powerdomain is not going to OSWR/OFF. And if PER last | ||
744 | * power state was off while CORE last power state was ON, the | ||
745 | * UART3/4 and McBSP2/3 SIDETONE devices need to run a | ||
746 | * self-test using their loopback tests; if that fails, those | ||
747 | * devices are unusable until the PER/CORE can complete a transition | ||
748 | * from ON to OSWR/OFF and then back to ON. | ||
749 | * | ||
750 | * XXX Technically this workaround is only needed if off-mode | ||
751 | * or OSWR is enabled. | ||
752 | */ | ||
753 | if (IS_PM34XX_ERRATUM(PM_PER_MEMORIES_ERRATUM_i582)) | ||
754 | clkdm_add_wkdep(per_clkdm, wkup_clkdm); | ||
755 | |||
730 | clkdm_add_wkdep(neon_clkdm, mpu_clkdm); | 756 | clkdm_add_wkdep(neon_clkdm, mpu_clkdm); |
731 | if (omap_type() != OMAP2_DEVICE_TYPE_GP) { | 757 | if (omap_type() != OMAP2_DEVICE_TYPE_GP) { |
732 | omap3_secure_ram_storage = | 758 | omap3_secure_ram_storage = |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 0405c8190803..a507cd6cf4f1 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -329,6 +329,11 @@ void __init omap_serial_init_port(struct omap_board_data *bdata, | |||
329 | 329 | ||
330 | oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); | 330 | oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); |
331 | 331 | ||
332 | if (console_uart_id == bdata->id) { | ||
333 | omap_device_enable(pdev); | ||
334 | pm_runtime_set_active(&pdev->dev); | ||
335 | } | ||
336 | |||
332 | oh->dev_attr = uart; | 337 | oh->dev_attr = uart; |
333 | 338 | ||
334 | if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) | 339 | if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) |
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 635e109f5ad3..a256135d8e48 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c | |||
@@ -73,6 +73,7 @@ void __init omap4_pmic_init(const char *pmic_type, | |||
73 | { | 73 | { |
74 | /* PMIC part*/ | 74 | /* PMIC part*/ |
75 | omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); | 75 | omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); |
76 | omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT); | ||
76 | omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); | 77 | omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); |
77 | 78 | ||
78 | /* Register additional devices on i2c1 bus if needed */ | 79 | /* Register additional devices on i2c1 bus if needed */ |
@@ -366,7 +367,7 @@ static struct regulator_init_data omap4_clk32kg_idata = { | |||
366 | }; | 367 | }; |
367 | 368 | ||
368 | static struct regulator_consumer_supply omap4_vdd1_supply[] = { | 369 | static struct regulator_consumer_supply omap4_vdd1_supply[] = { |
369 | REGULATOR_SUPPLY("vcc", "mpu.0"), | 370 | REGULATOR_SUPPLY("vcc", "cpu0"), |
370 | }; | 371 | }; |
371 | 372 | ||
372 | static struct regulator_consumer_supply omap4_vdd2_supply[] = { | 373 | static struct regulator_consumer_supply omap4_vdd2_supply[] = { |
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 880249b17012..75878c37959b 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c | |||
@@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) | |||
264 | 264 | ||
265 | if (initialized) { | 265 | if (initialized) { |
266 | if (voltdm->pmic->i2c_high_speed != i2c_high_speed) | 266 | if (voltdm->pmic->i2c_high_speed != i2c_high_speed) |
267 | pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).", | 267 | pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n", |
268 | __func__, voltdm->name, i2c_high_speed); | 268 | __func__, voltdm->name, i2c_high_speed); |
269 | return; | 269 | return; |
270 | } | 270 | } |