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authorRajendra Nayak <rnayak@ti.com>2012-04-27 06:29:32 -0400
committerPaul Walmsley <paul@pwsan.com>2012-11-12 21:10:18 -0500
commited1ebc4948fdfe4c68865e5543b4a68e5a55973b (patch)
tree6d781e2833bdd91472f3a86e38eb4a8ae4e2b379 /arch/arm/mach-omap2
parentb4777a21381fd1f87be8c606a616b7f97f485d2b (diff)
ARM: OMAP2: clock: Convert to common clk
Convert all OMAP2 specific platform files to use COMMON clk and keep all the changes under the CONFIG_COMMON_CLK macro check so it does not break any existing code. At a later point switch to COMMON clk and get rid of all old/legacy code. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Mike Turquette <mturquette@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_apll.c43
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_dpll.c16
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_dpllcore.c24
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_osc.c15
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_sys.c9
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c15
-rw-r--r--arch/arm/mach-omap2/clock2430.c11
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c1
-rw-r--r--arch/arm/mach-omap2/clock2xxx.h33
-rw-r--r--arch/arm/mach-omap2/pm24xx.c8
10 files changed, 172 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index 8c5b13e7ee61..1bd15275dbf9 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -38,48 +38,90 @@
38 38
39/* Private functions */ 39/* Private functions */
40 40
41#ifdef CONFIG_COMMON_CLK
42int omap2_clk_apll96_enable(struct clk_hw *hw)
43#else
41static int _apll96_enable(struct clk *clk) 44static int _apll96_enable(struct clk *clk)
45#endif
42{ 46{
43 return omap2xxx_cm_apll96_enable(); 47 return omap2xxx_cm_apll96_enable();
44} 48}
45 49
50#ifdef CONFIG_COMMON_CLK
51int omap2_clk_apll54_enable(struct clk_hw *hw)
52#else
46static int _apll54_enable(struct clk *clk) 53static int _apll54_enable(struct clk *clk)
54#endif
47{ 55{
48 return omap2xxx_cm_apll54_enable(); 56 return omap2xxx_cm_apll54_enable();
49} 57}
50 58
59#ifdef CONFIG_COMMON_CLK
60static void _apll96_allow_idle(struct clk_hw_omap *clk)
61#else
51static void _apll96_allow_idle(struct clk *clk) 62static void _apll96_allow_idle(struct clk *clk)
63#endif
52{ 64{
53 omap2xxx_cm_set_apll96_auto_low_power_stop(); 65 omap2xxx_cm_set_apll96_auto_low_power_stop();
54} 66}
55 67
68#ifdef CONFIG_COMMON_CLK
69static void _apll96_deny_idle(struct clk_hw_omap *clk)
70#else
56static void _apll96_deny_idle(struct clk *clk) 71static void _apll96_deny_idle(struct clk *clk)
72#endif
57{ 73{
58 omap2xxx_cm_set_apll96_disable_autoidle(); 74 omap2xxx_cm_set_apll96_disable_autoidle();
59} 75}
60 76
77#ifdef CONFIG_COMMON_CLK
78static void _apll54_allow_idle(struct clk_hw_omap *clk)
79#else
61static void _apll54_allow_idle(struct clk *clk) 80static void _apll54_allow_idle(struct clk *clk)
81#endif
62{ 82{
63 omap2xxx_cm_set_apll54_auto_low_power_stop(); 83 omap2xxx_cm_set_apll54_auto_low_power_stop();
64} 84}
65 85
86#ifdef CONFIG_COMMON_CLK
87static void _apll54_deny_idle(struct clk_hw_omap *clk)
88#else
66static void _apll54_deny_idle(struct clk *clk) 89static void _apll54_deny_idle(struct clk *clk)
90#endif
67{ 91{
68 omap2xxx_cm_set_apll54_disable_autoidle(); 92 omap2xxx_cm_set_apll54_disable_autoidle();
69} 93}
70 94
95#ifdef CONFIG_COMMON_CLK
96void omap2_clk_apll96_disable(struct clk_hw *hw)
97#else
71static void _apll96_disable(struct clk *clk) 98static void _apll96_disable(struct clk *clk)
99#endif
72{ 100{
73 omap2xxx_cm_apll96_disable(); 101 omap2xxx_cm_apll96_disable();
74} 102}
75 103
104#ifdef CONFIG_COMMON_CLK
105void omap2_clk_apll54_disable(struct clk_hw *hw)
106#else
76static void _apll54_disable(struct clk *clk) 107static void _apll54_disable(struct clk *clk)
108#endif
77{ 109{
78 omap2xxx_cm_apll54_disable(); 110 omap2xxx_cm_apll54_disable();
79} 111}
80 112
81/* Public data */ 113/* Public data */
114#ifdef CONFIG_COMMON_CLK
115const struct clk_hw_omap_ops clkhwops_apll54 = {
116 .allow_idle = _apll54_allow_idle,
117 .deny_idle = _apll54_deny_idle,
118};
82 119
120const struct clk_hw_omap_ops clkhwops_apll96 = {
121 .allow_idle = _apll96_allow_idle,
122 .deny_idle = _apll96_deny_idle,
123};
124#else
83const struct clkops clkops_apll96 = { 125const struct clkops clkops_apll96 = {
84 .enable = _apll96_enable, 126 .enable = _apll96_enable,
85 .disable = _apll96_disable, 127 .disable = _apll96_disable,
@@ -93,6 +135,7 @@ const struct clkops clkops_apll54 = {
93 .allow_idle = _apll54_allow_idle, 135 .allow_idle = _apll54_allow_idle,
94 .deny_idle = _apll54_deny_idle, 136 .deny_idle = _apll54_deny_idle,
95}; 137};
138#endif
96 139
97/* Public functions */ 140/* Public functions */
98 141
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 399534c7843b..d0fd77b67261 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -29,7 +29,11 @@
29 * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1 29 * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1
30 * instead. Add some mechanism to optionally enter this mode. 30 * instead. Add some mechanism to optionally enter this mode.
31 */ 31 */
32#ifdef CONFIG_COMMON_CLK
33static void _allow_idle(struct clk_hw_omap *clk)
34#else
32static void _allow_idle(struct clk *clk) 35static void _allow_idle(struct clk *clk)
36#endif
33{ 37{
34 if (!clk || !clk->dpll_data) 38 if (!clk || !clk->dpll_data)
35 return; 39 return;
@@ -43,7 +47,11 @@ static void _allow_idle(struct clk *clk)
43 * 47 *
44 * Disable DPLL automatic idle control. No return value. 48 * Disable DPLL automatic idle control. No return value.
45 */ 49 */
50#ifdef CONFIG_COMMON_CLK
51static void _deny_idle(struct clk_hw_omap *clk)
52#else
46static void _deny_idle(struct clk *clk) 53static void _deny_idle(struct clk *clk)
54#endif
47{ 55{
48 if (!clk || !clk->dpll_data) 56 if (!clk || !clk->dpll_data)
49 return; 57 return;
@@ -53,9 +61,15 @@ static void _deny_idle(struct clk *clk)
53 61
54 62
55/* Public data */ 63/* Public data */
56 64#ifdef CONFIG_COMMON_CLK
65const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll = {
66 .allow_idle = _allow_idle,
67 .deny_idle = _deny_idle,
68};
69#else
57const struct clkops clkops_omap2xxx_dpll_ops = { 70const struct clkops clkops_omap2xxx_dpll_ops = {
58 .allow_idle = _allow_idle, 71 .allow_idle = _allow_idle,
59 .deny_idle = _deny_idle, 72 .deny_idle = _deny_idle,
60}; 73};
74#endif
61 75
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index e687163a68fe..9d8388b7ee97 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -41,7 +41,11 @@
41 * (currently defined as "dpll_ck" in the OMAP2xxx clock tree). Set 41 * (currently defined as "dpll_ck" in the OMAP2xxx clock tree). Set
42 * during dpll_ck init and used later by omap2xxx_clk_get_core_rate(). 42 * during dpll_ck init and used later by omap2xxx_clk_get_core_rate().
43 */ 43 */
44#ifdef CONFIG_COMMON_CLK
45static struct clk_hw_omap *dpll_core_ck;
46#else
44static struct clk *dpll_core_ck; 47static struct clk *dpll_core_ck;
48#endif
45 49
46/** 50/**
47 * omap2xxx_clk_get_core_rate - return the CORE_CLK rate 51 * omap2xxx_clk_get_core_rate - return the CORE_CLK rate
@@ -105,13 +109,25 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate)
105 109
106} 110}
107 111
112#ifdef CONFIG_COMMON_CLK
113unsigned long omap2_dpllcore_recalc(struct clk_hw *hw,
114 unsigned long parent_rate)
115#else
108unsigned long omap2_dpllcore_recalc(struct clk *clk) 116unsigned long omap2_dpllcore_recalc(struct clk *clk)
117#endif
109{ 118{
110 return omap2xxx_clk_get_core_rate(); 119 return omap2xxx_clk_get_core_rate();
111} 120}
112 121
122#ifdef CONFIG_COMMON_CLK
123int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate,
124 unsigned long parent_rate)
125{
126 struct clk_hw_omap *clk = to_clk_hw_omap(hw);
127#else
113int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) 128int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
114{ 129{
130#endif
115 u32 cur_rate, low, mult, div, valid_rate, done_rate; 131 u32 cur_rate, low, mult, div, valid_rate, done_rate;
116 u32 bypass = 0; 132 u32 bypass = 0;
117 struct prcm_config tmpset; 133 struct prcm_config tmpset;
@@ -189,8 +205,16 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
189 * statically defined, this code may need to change to increment some 205 * statically defined, this code may need to change to increment some
190 * kind of use count on dpll_ck. 206 * kind of use count on dpll_ck.
191 */ 207 */
208#ifdef CONFIG_COMMON_CLK
209void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw)
210#else
192void omap2xxx_clkt_dpllcore_init(struct clk *clk) 211void omap2xxx_clkt_dpllcore_init(struct clk *clk)
212#endif
193{ 213{
194 WARN(dpll_core_ck, "dpll_core_ck already set - should never happen"); 214 WARN(dpll_core_ck, "dpll_core_ck already set - should never happen");
215#ifdef CONFIG_COMMON_CLK
216 dpll_core_ck = to_clk_hw_omap(hw);
217#else
195 dpll_core_ck = clk; 218 dpll_core_ck = clk;
219#endif
196} 220}
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c
index e1777371bb5e..395e0c1b9d0c 100644
--- a/arch/arm/mach-omap2/clkt2xxx_osc.c
+++ b/arch/arm/mach-omap2/clkt2xxx_osc.c
@@ -35,7 +35,11 @@
35 * clk_enable/clk_disable()-based usecounting for osc_ck should be 35 * clk_enable/clk_disable()-based usecounting for osc_ck should be
36 * replaced with autoidle-based usecounting. 36 * replaced with autoidle-based usecounting.
37 */ 37 */
38#ifdef CONFIG_COMMON_CLK
39int omap2_enable_osc_ck(struct clk_hw *clk)
40#else
38static int omap2_enable_osc_ck(struct clk *clk) 41static int omap2_enable_osc_ck(struct clk *clk)
42#endif
39{ 43{
40 u32 pcc; 44 u32 pcc;
41 45
@@ -53,7 +57,11 @@ static int omap2_enable_osc_ck(struct clk *clk)
53 * clk_enable/clk_disable()-based usecounting for osc_ck should be 57 * clk_enable/clk_disable()-based usecounting for osc_ck should be
54 * replaced with autoidle-based usecounting. 58 * replaced with autoidle-based usecounting.
55 */ 59 */
60#ifdef CONFIG_COMMON_CLK
61void omap2_disable_osc_ck(struct clk_hw *clk)
62#else
56static void omap2_disable_osc_ck(struct clk *clk) 63static void omap2_disable_osc_ck(struct clk *clk)
64#endif
57{ 65{
58 u32 pcc; 66 u32 pcc;
59 67
@@ -62,12 +70,19 @@ static void omap2_disable_osc_ck(struct clk *clk)
62 __raw_writel(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl); 70 __raw_writel(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
63} 71}
64 72
73#ifndef CONFIG_COMMON_CLK
65const struct clkops clkops_oscck = { 74const struct clkops clkops_oscck = {
66 .enable = omap2_enable_osc_ck, 75 .enable = omap2_enable_osc_ck,
67 .disable = omap2_disable_osc_ck, 76 .disable = omap2_disable_osc_ck,
68}; 77};
78#endif
69 79
80#ifdef CONFIG_COMMON_CLK
81unsigned long omap2_osc_clk_recalc(struct clk_hw *clk,
82 unsigned long parent_rate)
83#else
70unsigned long omap2_osc_clk_recalc(struct clk *clk) 84unsigned long omap2_osc_clk_recalc(struct clk *clk)
85#endif
71{ 86{
72 return omap2xxx_get_apll_clkin() * omap2xxx_get_sysclkdiv(); 87 return omap2xxx_get_apll_clkin() * omap2xxx_get_sysclkdiv();
73} 88}
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c
index 46683b3c2461..e6e73cf6aa95 100644
--- a/arch/arm/mach-omap2/clkt2xxx_sys.c
+++ b/arch/arm/mach-omap2/clkt2xxx_sys.c
@@ -40,9 +40,16 @@ u32 omap2xxx_get_sysclkdiv(void)
40 return div; 40 return div;
41} 41}
42 42
43#ifdef CONFIG_COMMON_CLK
44unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk,
45 unsigned long parent_rate)
46{
47 return parent_rate / omap2xxx_get_sysclkdiv();
48}
49#else
43unsigned long omap2xxx_sys_clk_recalc(struct clk *clk) 50unsigned long omap2xxx_sys_clk_recalc(struct clk *clk)
44{ 51{
45 return clk->parent->rate / omap2xxx_get_sysclkdiv(); 52 return clk->parent->rate / omap2xxx_get_sysclkdiv();
46} 53}
47 54#endif
48 55
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index b9b981bac9d3..9a79ffaf6be5 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -59,7 +59,12 @@ static unsigned long sys_ck_rate;
59 * 59 *
60 * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. 60 * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set.
61 */ 61 */
62#ifdef CONFIG_COMMON_CLK
63unsigned long omap2_table_mpu_recalc(struct clk_hw *clk,
64 unsigned long parent_rate)
65#else
62unsigned long omap2_table_mpu_recalc(struct clk *clk) 66unsigned long omap2_table_mpu_recalc(struct clk *clk)
67#endif
63{ 68{
64 return curr_prcm_set->mpu_speed; 69 return curr_prcm_set->mpu_speed;
65} 70}
@@ -71,7 +76,12 @@ unsigned long omap2_table_mpu_recalc(struct clk *clk)
71 * Some might argue L3-DDR, others ARM, others IVA. This code is simple and 76 * Some might argue L3-DDR, others ARM, others IVA. This code is simple and
72 * just uses the ARM rates. 77 * just uses the ARM rates.
73 */ 78 */
79#ifdef CONFIG_COMMON_CLK
80long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate,
81 unsigned long *parent_rate)
82#else
74long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) 83long omap2_round_to_table_rate(struct clk *clk, unsigned long rate)
84#endif
75{ 85{
76 const struct prcm_config *ptr; 86 const struct prcm_config *ptr;
77 long highest_rate; 87 long highest_rate;
@@ -94,7 +104,12 @@ long omap2_round_to_table_rate(struct clk *clk, unsigned long rate)
94} 104}
95 105
96/* Sets basic clocks based on the specified rate */ 106/* Sets basic clocks based on the specified rate */
107#ifdef CONFIG_COMMON_CLK
108int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate,
109 unsigned long parent_rate)
110#else
97int omap2_select_table_rate(struct clk *clk, unsigned long rate) 111int omap2_select_table_rate(struct clk *clk, unsigned long rate)
112#endif
98{ 113{
99 u32 cur_rate, done_rate, bypass = 0, tmp; 114 u32 cur_rate, done_rate, bypass = 0, tmp;
100 const struct prcm_config *prcm; 115 const struct prcm_config *prcm;
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index e37df538bcd3..7a61d7842968 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -40,7 +40,11 @@
40 * passes back the correct CM_IDLEST register address for I2CHS 40 * passes back the correct CM_IDLEST register address for I2CHS
41 * modules. No return value. 41 * modules. No return value.
42 */ 42 */
43#ifdef CONFIG_COMMON_CLK
44static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk,
45#else
43static void omap2430_clk_i2chs_find_idlest(struct clk *clk, 46static void omap2430_clk_i2chs_find_idlest(struct clk *clk,
47#endif
44 void __iomem **idlest_reg, 48 void __iomem **idlest_reg,
45 u8 *idlest_bit, 49 u8 *idlest_bit,
46 u8 *idlest_val) 50 u8 *idlest_val)
@@ -51,9 +55,16 @@ static void omap2430_clk_i2chs_find_idlest(struct clk *clk,
51} 55}
52 56
53/* 2430 I2CHS has non-standard IDLEST register */ 57/* 2430 I2CHS has non-standard IDLEST register */
58#ifdef CONFIG_COMMON_CLK
59const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait = {
60 .find_idlest = omap2430_clk_i2chs_find_idlest,
61 .find_companion = omap2_clk_dflt_find_companion,
62};
63#else
54const struct clkops clkops_omap2430_i2chs_wait = { 64const struct clkops clkops_omap2430_i2chs_wait = {
55 .enable = omap2_dflt_clk_enable, 65 .enable = omap2_dflt_clk_enable,
56 .disable = omap2_dflt_clk_disable, 66 .disable = omap2_dflt_clk_disable,
57 .find_idlest = omap2430_clk_i2chs_find_idlest, 67 .find_idlest = omap2430_clk_i2chs_find_idlest,
58 .find_companion = omap2_clk_dflt_find_companion, 68 .find_companion = omap2_clk_dflt_find_companion,
59}; 69};
70#endif
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 5f7faeb4c19b..1ff646908627 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -28,6 +28,7 @@
28#include "cm.h" 28#include "cm.h"
29#include "cm-regbits-24xx.h" 29#include "cm-regbits-24xx.h"
30 30
31struct clk_hw *dclk_hw;
31/* 32/*
32 * Omap24xx specific clock functions 33 * Omap24xx specific clock functions
33 */ 34 */
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index ce809c913b6f..58581511d795 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -8,6 +8,26 @@
8#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H 8#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H
9#define __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H 9#define __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H
10 10
11#ifdef CONFIG_COMMON_CLK
12#include <linux/clk-provider.h>
13#include "clock.h"
14
15unsigned long omap2_table_mpu_recalc(struct clk_hw *clk,
16 unsigned long parent_rate);
17int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate,
18 unsigned long parent_rate);
19long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate,
20 unsigned long *parent_rate);
21unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk,
22 unsigned long parent_rate);
23unsigned long omap2_osc_clk_recalc(struct clk_hw *clk,
24 unsigned long parent_rate);
25unsigned long omap2_dpllcore_recalc(struct clk_hw *hw,
26 unsigned long parent_rate);
27int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate,
28 unsigned long parent_rate);
29void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw);
30#else
11unsigned long omap2_table_mpu_recalc(struct clk *clk); 31unsigned long omap2_table_mpu_recalc(struct clk *clk);
12int omap2_select_table_rate(struct clk *clk, unsigned long rate); 32int omap2_select_table_rate(struct clk *clk, unsigned long rate);
13long omap2_round_to_table_rate(struct clk *clk, unsigned long rate); 33long omap2_round_to_table_rate(struct clk *clk, unsigned long rate);
@@ -15,11 +35,12 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk *clk);
15unsigned long omap2_osc_clk_recalc(struct clk *clk); 35unsigned long omap2_osc_clk_recalc(struct clk *clk);
16unsigned long omap2_dpllcore_recalc(struct clk *clk); 36unsigned long omap2_dpllcore_recalc(struct clk *clk);
17int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate); 37int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate);
38void omap2xxx_clkt_dpllcore_init(struct clk *clk);
39#endif
18unsigned long omap2xxx_clk_get_core_rate(void); 40unsigned long omap2xxx_clk_get_core_rate(void);
19u32 omap2xxx_get_apll_clkin(void); 41u32 omap2xxx_get_apll_clkin(void);
20u32 omap2xxx_get_sysclkdiv(void); 42u32 omap2xxx_get_sysclkdiv(void);
21void omap2xxx_clk_prepare_for_reboot(void); 43void omap2xxx_clk_prepare_for_reboot(void);
22void omap2xxx_clkt_dpllcore_init(struct clk *clk);
23void omap2xxx_clkt_vps_check_bootloader_rates(void); 44void omap2xxx_clkt_vps_check_bootloader_rates(void);
24void omap2xxx_clkt_vps_late_init(void); 45void omap2xxx_clkt_vps_late_init(void);
25 46
@@ -37,9 +58,19 @@ int omap2430_clk_init(void);
37 58
38extern void __iomem *prcm_clksrc_ctrl; 59extern void __iomem *prcm_clksrc_ctrl;
39 60
61#ifdef CONFIG_COMMON_CLK
62extern struct clk_hw *dclk_hw;
63int omap2_enable_osc_ck(struct clk_hw *hw);
64void omap2_disable_osc_ck(struct clk_hw *hw);
65int omap2_clk_apll96_enable(struct clk_hw *hw);
66int omap2_clk_apll54_enable(struct clk_hw *hw);
67void omap2_clk_apll96_disable(struct clk_hw *hw);
68void omap2_clk_apll54_disable(struct clk_hw *hw);
69#else
40extern const struct clkops clkops_omap2430_i2chs_wait; 70extern const struct clkops clkops_omap2430_i2chs_wait;
41extern const struct clkops clkops_oscck; 71extern const struct clkops clkops_oscck;
42extern const struct clkops clkops_apll96; 72extern const struct clkops clkops_apll96;
43extern const struct clkops clkops_apll54; 73extern const struct clkops clkops_apll54;
74#endif
44 75
45#endif 76#endif
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 83815ddc4786..87ae36c7e155 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -25,7 +25,11 @@
25#include <linux/sysfs.h> 25#include <linux/sysfs.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#ifdef CONFIG_COMMON_CLK
29#include <linux/clk-provider.h>
30#else
28#include <linux/clk.h> 31#include <linux/clk.h>
32#endif
29#include <linux/irq.h> 33#include <linux/irq.h>
30#include <linux/time.h> 34#include <linux/time.h>
31#include <linux/gpio.h> 35#include <linux/gpio.h>
@@ -202,7 +206,11 @@ static int omap2_can_sleep(void)
202{ 206{
203 if (omap2_fclks_active()) 207 if (omap2_fclks_active())
204 return 0; 208 return 0;
209#ifdef CONFIG_COMMON_CLK
210 if (__clk_is_enabled(osc_ck))
211#else
205 if (osc_ck->usecount > 1) 212 if (osc_ck->usecount > 1)
213#endif
206 return 0; 214 return 0;
207 if (omap_dma_running()) 215 if (omap_dma_running())
208 return 0; 216 return 0;