Merge commit '31d9adca82ce65e5c99d045b5fd917c702b6fce3' into tmp

Conflicts:
	arch/arm/plat-omap/dmtimer.c

121 files changed, 2358 insertions, 2923 deletions

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 41b581fd0213..49ac3dfebef9 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -1,3 +1,26 @@
+config ARCH_OMAP
+        bool
+
+config ARCH_OMAP2PLUS
+        bool "TI OMAP2/3/4/5 SoCs with device tree support" if (ARCH_MULTI_V6 || ARCH_MULTI_V7)
+        select ARCH_HAS_CPUFREQ
+        select ARCH_HAS_HOLES_MEMORYMODEL
+        select ARCH_OMAP
+        select ARCH_REQUIRE_GPIOLIB
+        select CLKDEV_LOOKUP
+        select CLKSRC_MMIO
+        select GENERIC_CLOCKEVENTS
+        select GENERIC_IRQ_CHIP
+        select HAVE_CLK
+        select OMAP_DM_TIMER
+        select PINCTRL
+        select PROC_DEVICETREE if PROC_FS
+        select SPARSE_IRQ
+        select USE_OF
+        help
+          Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
+
+
 if ARCH_OMAP2PLUS
 
 menu "TI OMAP2/3/4 Specific Features"
@@ -76,12 +99,12 @@ config ARCH_OMAP4
 
 config SOC_OMAP5
         bool "TI OMAP5"
-        select ARM_ARCH_TIMER
         select ARM_CPU_SUSPEND if PM
         select ARM_GIC
         select CPU_V7
         select HAVE_SMP
         select COMMON_CLK
+        select HAVE_ARM_ARCH_TIMER
 
 comment "OMAP Core Type"
         depends on ARCH_OMAP2
@@ -165,12 +188,6 @@ config MACH_OMAP_H4
         select OMAP_DEBUG_DEVICES
         select OMAP_PACKAGE_ZAF
 
-config MACH_OMAP_APOLLON
-        bool "OMAP 2420 Apollon board"
-        depends on SOC_OMAP2420
-        default y
-        select OMAP_PACKAGE_ZAC
-
 config MACH_OMAP_2430SDP
         bool "OMAP 2430 SDP board"
         depends on SOC_OMAP2430
@@ -397,7 +414,7 @@ config OMAP3_SDRC_AC_TIMING
 
 config OMAP4_ERRATA_I688
         bool "OMAP4 errata: Async Bridge Corruption"
-        depends on ARCH_OMAP4
+        depends on ARCH_OMAP4 && !ARCH_MULTIPLATFORM
         select ARCH_HAS_BARRIERS
         help
           If a data is stalled inside asynchronous bridge because of back
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 947cafe65aef..b068b7fe99ef 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -2,13 +2,16 @@
 # Makefile for the linux kernel.
 #
 
+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
+        -I$(srctree)/arch/arm/plat-omap/include
+
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \
          common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
          omap_device.o sram.o
 
 omap-2-3-common                         = irq.o
-hwmod-common                            = omap_hwmod.o \
+hwmod-common                            = omap_hwmod.o omap_hwmod_reset.o \
                                           omap_hwmod_common_data.o
 clock-common                            = clock.o clock_common_data.o \
                                           clkt_dpll.o clkt_clksel.o
@@ -53,6 +56,7 @@ AFLAGS_sram34xx.o			:=-Wa,-march=armv7-a
 # Restart code (OMAP4/5 currently in omap4-common.c)
 obj-$(CONFIG_SOC_OMAP2420)              += omap2-restart.o
 obj-$(CONFIG_SOC_OMAP2430)              += omap2-restart.o
+obj-$(CONFIG_SOC_AM33XX)                += am33xx-restart.o
 obj-$(CONFIG_ARCH_OMAP3)                += omap3-restart.o
 
 # Pin multiplexing
@@ -220,7 +224,6 @@ endif
 obj-$(CONFIG_MACH_OMAP_GENERIC)         += board-generic.o
 obj-$(CONFIG_MACH_OMAP_H4)              += board-h4.o
 obj-$(CONFIG_MACH_OMAP_2430SDP)         += board-2430sdp.o
-obj-$(CONFIG_MACH_OMAP_APOLLON)         += board-apollon.o
 obj-$(CONFIG_MACH_OMAP3_BEAGLE)         += board-omap3beagle.o
 obj-$(CONFIG_MACH_DEVKIT8000)           += board-devkit8000.o
 obj-$(CONFIG_MACH_OMAP_LDP)             += board-ldp.o
diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c
new file mode 100644
index 000000000000..88e4fa8af031
--- /dev/null
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -0,0 +1,34 @@
+/*
+ * am33xx-restart.c - Code common to all AM33xx machines.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+
+#include "common.h"
+#include "prm-regbits-33xx.h"
+#include "prm33xx.h"
+
+/**
+ * am3xx_restart - trigger a software restart of the SoC
+ * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
+ * @cmd: passed from the userspace program rebooting the system (if provided)
+ *
+ * Resets the SoC.  For @cmd, see the 'reboot' syscall in
+ * kernel/sys.c.  No return value.
+ */
+void am33xx_restart(char mode, const char *cmd)
+{
+        /* TODO: Handle mode and cmd if necessary */
+
+        am33xx_prm_rmw_reg_bits(AM33XX_GLOBAL_WARM_SW_RST_MASK,
+                                AM33XX_GLOBAL_WARM_SW_RST_MASK,
+                                AM33XX_PRM_DEVICE_MOD,
+                                AM33XX_PRM_RSTCTRL_OFFSET);
+
+        /* OCP barrier */
+        (void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
+                                  AM33XX_PRM_RSTCTRL_OFFSET);
+}
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
index af11dcdb7e2c..25b79a297365 100644
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -62,8 +62,7 @@ static int __init omap_davinci_emac_dev_init(struct omap_hwmod *oh,
 {
         struct platform_device *pdev;
 
-        pdev = omap_device_build(oh->class->name, 0, oh, pdata, pdata_len,
-                                 NULL, 0, false);
+        pdev = omap_device_build(oh->class->name, 0, oh, pdata, pdata_len);
         if (IS_ERR(pdev)) {
                 WARN(1, "Can't build omap_device for %s:%s.\n",
                      oh->class->name, oh->name);
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 4815ea6f8f5d..a3e0aaa4886b 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -27,6 +27,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
+#include <linux/usb/phy.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -263,6 +264,7 @@ static void __init omap_2430sdp_init(void)
         omap_hsmmc_init(mmc);
 
         omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
 
         board_smc91x_init();
@@ -284,6 +286,6 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_2430sdp_init,
         .init_late      = omap2430_init_late,
-        .timer          = &omap2_timer,
+        .init_time      = omap2_sync32k_timer_init,
         .restart        = omap2xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index bb73afc9ac17..ce812decfaca 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -25,6 +25,8 @@
 #include <linux/gpio.h>
 #include <linux/mmc/host.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
+#include <linux/platform_data/omap-twl4030.h>
+#include <linux/usb/phy.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -209,6 +211,19 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
+static struct omap_tw4030_pdata omap_twl4030_audio_data = {
+        .voice_connected = true,
+        .custom_routing = true,
+
+        .has_hs         = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
+        .has_hf         = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
+
+        .has_mainmic    = true,
+        .has_submic     = true,
+        .has_hsmic      = true,
+        .has_linein     = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
+};
+
 static int sdp3430_twl_gpio_setup(struct device *dev,
                 unsigned gpio, unsigned ngpio)
 {
@@ -225,6 +240,9 @@ static int sdp3430_twl_gpio_setup(struct device *dev,
         /* gpio + 15 is "sub_lcd_nRST" (output) */
         gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
 
+        omap_twl4030_audio_data.jack_detect = gpio + 2;
+        omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
+
         return 0;
 }
 
@@ -382,6 +400,9 @@ static int __init omap3430_i2c_init(void)
         sdp3430_twldata.vpll2->constraints.apply_uV = true;
         sdp3430_twldata.vpll2->constraints.name = "VDVI";
 
+        sdp3430_twldata.audio->codec->hs_extmute = 1;
+        sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
+
         omap3_pmic_init("twl4030", &sdp3430_twldata);
 
         /* i2c2 on camera connector (for sensor control) and optional isp1301 */
@@ -424,7 +445,7 @@ static void enable_board_wakeup_source(void)
                 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
 }
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
 
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@@ -579,6 +600,7 @@ static void __init omap_3430sdp_init(void)
         omap_ads7846_init(1, gpio_pendown, 310, NULL);
         omap_serial_init();
         omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         board_smc91x_init();
         board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
@@ -597,6 +619,6 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_3430sdp_init,
         .init_late      = omap3430_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 050aaa771254..67447bd4564f 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -53,7 +53,7 @@ static void enable_board_wakeup_source(void)
                 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
 }
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
 
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@@ -211,6 +211,6 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_sdp_init,
         .init_late      = omap3630_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 1cc6696594fd..35f3ad0cb7c7 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -24,12 +24,15 @@
 #include <linux/gpio_keys.h>
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
+#include <linux/pwm.h>
 #include <linux/leds.h>
 #include <linux/leds_pwm.h>
+#include <linux/pwm_backlight.h>
+#include <linux/irqchip/arm-gic.h>
 #include <linux/platform_data/omap4-keypad.h>
 #include <linux/usb/musb.h>
+#include <linux/usb/phy.h>
 
-#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -256,10 +259,20 @@ static struct gpio_led_platform_data sdp4430_led_data = {
         .num_leds       = ARRAY_SIZE(sdp4430_gpio_leds),
 };
 
+static struct pwm_lookup sdp4430_pwm_lookup[] = {
+        PWM_LOOKUP("twl-pwm", 0, "leds_pwm", "omap4::keypad"),
+        PWM_LOOKUP("twl-pwm", 1, "pwm-backlight", NULL),
+        PWM_LOOKUP("twl-pwmled", 0, "leds_pwm", "omap4:green:chrg"),
+};
+
 static struct led_pwm sdp4430_pwm_leds[] = {
         {
+                .name           = "omap4::keypad",
+                .max_brightness = 127,
+                .pwm_period_ns  = 7812500,
+        },
+        {
                 .name           = "omap4:green:chrg",
-                .pwm_id         = 1,
                 .max_brightness = 255,
                 .pwm_period_ns  = 7812500,
         },
@@ -278,6 +291,20 @@ static struct platform_device sdp4430_leds_pwm = {
         },
 };
 
+static struct platform_pwm_backlight_data sdp4430_backlight_data = {
+        .max_brightness = 127,
+        .dft_brightness = 127,
+        .pwm_period_ns = 7812500,
+};
+
+static struct platform_device sdp4430_backlight_pwm = {
+        .name   = "pwm-backlight",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &sdp4430_backlight_data,
+        },
+};
+
 static int omap_prox_activate(struct device *dev)
 {
         gpio_set_value(OMAP4_SFH7741_ENABLE_GPIO , 1);
@@ -412,6 +439,7 @@ static struct platform_device *sdp4430_devices[] __initdata = {
         &sdp4430_gpio_keys_device,
         &sdp4430_leds_gpio,
         &sdp4430_leds_pwm,
+        &sdp4430_backlight_pwm,
         &sdp4430_vbat,
         &sdp4430_dmic_codec,
         &sdp4430_abe_audio,
@@ -696,6 +724,7 @@ static void __init omap_4430sdp_init(void)
         omap4_sdp4430_wifi_init();
         omap4_twl6030_hsmmc_init(mmc);
 
+        usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto");
         usb_musb_init(&musb_board_data);
 
         status = omap_ethernet_init();
@@ -707,6 +736,7 @@ static void __init omap_4430sdp_init(void)
                                 ARRAY_SIZE(sdp4430_spi_board_info));
         }
 
+        pwm_add_table(sdp4430_pwm_lookup, ARRAY_SIZE(sdp4430_pwm_lookup));
         status = omap4_keyboard_init(&sdp4430_keypad_data, &keypad_data);
         if (status)
                 pr_err("Keypad initialization failed: %d\n", status);
@@ -722,9 +752,8 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
         .map_io         = omap4_map_io,
         .init_early     = omap4430_init_early,
         .init_irq       = gic_init_irq,
-        .handle_irq     = gic_handle_irq,
         .init_machine   = omap_4430sdp_init,
         .init_late      = omap4430_init_late,
-        .timer          = &omap4_timer,
+        .init_time      = omap4_local_timer_init,
         .restart        = omap44xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 51b96a1206d1..7d3358b2e593 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -20,12 +20,18 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
+#include <linux/mfd/tps65910.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
 #include "common.h"
+#include "common-board-devices.h"
+#include "board-flash.h"
 
 #include "am35xx-emac.h"
 #include "mux.h"
@@ -36,11 +42,12 @@
 
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
+        OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
         { .reg_offset = OMAP_MUX_TERMINATOR },
 };
 #endif
 
-static struct usbhs_omap_board_data usbhs_bdata __initdata = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -51,6 +58,54 @@ static struct usbhs_omap_board_data usbhs_bdata __initdata = {
         .reset_gpio_port[2]  = -EINVAL
 };
 
+static struct mtd_partition crane_nand_partitions[] = {
+        {
+                .name           = "X-Loader",
+                .offset         = 0,
+                .size           = 4 * NAND_BLOCK_SIZE,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "U-Boot",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 14 * NAND_BLOCK_SIZE,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "U-Boot Env",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 2 * NAND_BLOCK_SIZE,
+        },
+        {
+                .name           = "Kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 40 * NAND_BLOCK_SIZE,
+        },
+        {
+                .name           = "File System",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct tps65910_board tps65910_pdata = {
+        .irq = 7 + OMAP_INTC_START,
+        .en_ck32k_xtal = true,
+};
+
+static struct i2c_board_info __initdata tps65910_board_info[] = {
+        {
+                I2C_BOARD_INFO("tps65910", 0x2d),
+                .platform_data = &tps65910_pdata,
+        },
+};
+
+static void __init am3517_crane_i2c_init(void)
+{
+        omap_register_i2c_bus(1, 2600, tps65910_board_info,
+                        ARRAY_SIZE(tps65910_board_info));
+}
+
 static void __init am3517_crane_init(void)
 {
         int ret;
@@ -58,6 +113,10 @@ static void __init am3517_crane_init(void)
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap_serial_init();
         omap_sdrc_init(NULL, NULL);
+        board_nand_init(crane_nand_partitions,
+                        ARRAY_SIZE(crane_nand_partitions), 0,
+                        NAND_BUSWIDTH_16, NULL);
+        am3517_crane_i2c_init();
 
         /* Configure GPIO for EHCI port */
         if (omap_mux_init_gpio(GPIO_USB_NRESET, OMAP_PIN_OUTPUT)) {
@@ -92,6 +151,6 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = am3517_crane_init,
         .init_late      = am35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index f81a303b87ff..9fb85908a61e 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -274,7 +274,7 @@ static __init void am3517_evm_mcbsp1_init(void)
         omap_ctrl_writel(devconf0, OMAP2_CONTROL_DEVCONF0);
 }
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
 #if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
                 defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
@@ -393,6 +393,6 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = am3517_evm_init,
         .init_late      = am35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
deleted file mode 100644
index 5d0a61f54165..000000000000
--- a/arch/arm/mach-omap2/board-apollon.c
+++ /dev/null
@@ -1,342 +0,0 @@
-/*
- * linux/arch/arm/mach-omap2/board-apollon.c
- *
- * Copyright (C) 2005,2006 Samsung Electronics
- * Author: Kyungmin Park <kyungmin.park@samsung.com>
- *
- * Modified from mach-omap/omap2/board-h4.c
- *
- * Code for apollon OMAP2 board. Should work on many OMAP2 systems where
- * the bootloader passes the board-specific data to the kernel.
- * Do not put any board specific code to this file; create a new machine
- * type if you need custom low-level initializations.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/onenand.h>
-#include <linux/delay.h>
-#include <linux/leds.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/smc91x.h>
-#include <linux/gpio.h>
-#include <linux/platform_data/leds-omap.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/flash.h>
-
-#include "common.h"
-#include "gpmc.h"
-
-#include <video/omapdss.h>
-#include <video/omap-panel-generic-dpi.h>
-
-#include "mux.h"
-#include "control.h"
-
-/* LED & Switch macros */
-#define LED0_GPIO13             13
-#define LED1_GPIO14             14
-#define LED2_GPIO15             15
-#define SW_ENTER_GPIO16         16
-#define SW_UP_GPIO17            17
-#define SW_DOWN_GPIO58          58
-
-#define APOLLON_FLASH_CS        0
-#define APOLLON_ETH_CS          1
-#define APOLLON_ETHR_GPIO_IRQ   74
-
-static struct mtd_partition apollon_partitions[] = {
-        {
-                .name           = "X-Loader + U-Boot",
-                .offset         = 0,
-                .size           = SZ_128K,
-                .mask_flags     = MTD_WRITEABLE,
-        },
-        {
-                .name           = "params",
-                .offset         = MTDPART_OFS_APPEND,
-                .size           = SZ_128K,
-        },
-        {
-                .name           = "kernel",
-                .offset         = MTDPART_OFS_APPEND,
-                .size           = SZ_2M,
-        },
-        {
-                .name           = "rootfs",
-                .offset         = MTDPART_OFS_APPEND,
-                .size           = SZ_16M,
-        },
-        {
-                .name           = "filesystem00",
-                .offset         = MTDPART_OFS_APPEND,
-                .size           = SZ_32M,
-        },
-        {
-                .name           = "filesystem01",
-                .offset         = MTDPART_OFS_APPEND,
-                .size           = MTDPART_SIZ_FULL,
-        },
-};
-
-static struct onenand_platform_data apollon_flash_data = {
-        .parts          = apollon_partitions,
-        .nr_parts       = ARRAY_SIZE(apollon_partitions),
-};
-
-static struct resource apollon_flash_resource[] = {
-        [0] = {
-                .flags          = IORESOURCE_MEM,
-        },
-};
-
-static struct platform_device apollon_onenand_device = {
-        .name           = "onenand-flash",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &apollon_flash_data,
-        },
-        .num_resources  = ARRAY_SIZE(apollon_flash_resource),
-        .resource       = apollon_flash_resource,
-};
-
-static void __init apollon_flash_init(void)
-{
-        unsigned long base;
-
-        if (gpmc_cs_request(APOLLON_FLASH_CS, SZ_128K, &base) < 0) {
-                printk(KERN_ERR "Cannot request OneNAND GPMC CS\n");
-                return;
-        }
-        apollon_flash_resource[0].start = base;
-        apollon_flash_resource[0].end   = base + SZ_128K - 1;
-}
-
-static struct smc91x_platdata appolon_smc91x_info = {
-        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
-        .leda   = RPC_LED_100_10,
-        .ledb   = RPC_LED_TX_RX,
-};
-
-static struct resource apollon_smc91x_resources[] = {
-        [0] = {
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
-        },
-};
-
-static struct platform_device apollon_smc91x_device = {
-        .name           = "smc91x",
-        .id             = -1,
-        .dev    = {
-                .platform_data  = &appolon_smc91x_info,
-        },
-        .num_resources  = ARRAY_SIZE(apollon_smc91x_resources),
-        .resource       = apollon_smc91x_resources,
-};
-
-static struct omap_led_config apollon_led_config[] = {
-        {
-                .cdev   = {
-                        .name   = "apollon:led0",
-                },
-                .gpio   = LED0_GPIO13,
-        },
-        {
-                .cdev   = {
-                        .name   = "apollon:led1",
-                },
-                .gpio   = LED1_GPIO14,
-        },
-        {
-                .cdev   = {
-                        .name   = "apollon:led2",
-                },
-                .gpio   = LED2_GPIO15,
-        },
-};
-
-static struct omap_led_platform_data apollon_led_data = {
-        .nr_leds        = ARRAY_SIZE(apollon_led_config),
-        .leds           = apollon_led_config,
-};
-
-static struct platform_device apollon_led_device = {
-        .name           = "omap-led",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &apollon_led_data,
-        },
-};
-
-static struct platform_device *apollon_devices[] __initdata = {
-        &apollon_onenand_device,
-        &apollon_smc91x_device,
-        &apollon_led_device,
-};
-
-static inline void __init apollon_init_smc91x(void)
-{
-        unsigned long base;
-
-        unsigned int rate;
-        struct clk *gpmc_fck;
-        int eth_cs;
-        int err;
-
-        gpmc_fck = clk_get(NULL, "gpmc_fck");   /* Always on ENABLE_ON_INIT */
-        if (IS_ERR(gpmc_fck)) {
-                WARN_ON(1);
-                return;
-        }
-
-        clk_prepare_enable(gpmc_fck);
-        rate = clk_get_rate(gpmc_fck);
-
-        eth_cs = APOLLON_ETH_CS;
-
-        /* Make sure CS1 timings are correct */
-        gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200);
-
-        if (rate >= 160000000) {
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
-        } else if (rate >= 130000000) {
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
-        } else {/* rate = 100000000 */
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
-                gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
-        }
-
-        if (gpmc_cs_request(APOLLON_ETH_CS, SZ_16M, &base) < 0) {
-                printk(KERN_ERR "Failed to request GPMC CS for smc91x\n");
-                goto out;
-        }
-        apollon_smc91x_resources[0].start = base + 0x300;
-        apollon_smc91x_resources[0].end   = base + 0x30f;
-        udelay(100);
-
-        omap_mux_init_gpio(APOLLON_ETHR_GPIO_IRQ, 0);
-        err = gpio_request_one(APOLLON_ETHR_GPIO_IRQ, GPIOF_IN, "SMC91x irq");
-        if (err) {
-                printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
-                        APOLLON_ETHR_GPIO_IRQ);
-                gpmc_cs_free(APOLLON_ETH_CS);
-        }
-out:
-        clk_disable_unprepare(gpmc_fck);
-        clk_put(gpmc_fck);
-}
-
-static struct panel_generic_dpi_data apollon_panel_data = {
-        .name                   = "apollon",
-};
-
-static struct omap_dss_device apollon_lcd_device = {
-        .name                   = "lcd",
-        .driver_name            = "generic_dpi_panel",
-        .type                   = OMAP_DISPLAY_TYPE_DPI,
-        .phy.dpi.data_lines     = 18,
-        .data                   = &apollon_panel_data,
-};
-
-static struct omap_dss_device *apollon_dss_devices[] = {
-        &apollon_lcd_device,
-};
-
-static struct omap_dss_board_info apollon_dss_data = {
-        .num_devices    = ARRAY_SIZE(apollon_dss_devices),
-        .devices        = apollon_dss_devices,
-        .default_device = &apollon_lcd_device,
-};
-
-static struct gpio apollon_gpio_leds[] __initdata = {
-        { LED0_GPIO13, GPIOF_OUT_INIT_LOW, "LED0" }, /* LED0 - AA10 */
-        { LED1_GPIO14, GPIOF_OUT_INIT_LOW, "LED1" }, /* LED1 - AA6  */
-        { LED2_GPIO15, GPIOF_OUT_INIT_LOW, "LED2" }, /* LED2 - AA4  */
-};
-
-static void __init apollon_led_init(void)
-{
-        omap_mux_init_signal("vlynq_clk.gpio_13", 0);
-        omap_mux_init_signal("vlynq_rx1.gpio_14", 0);
-        omap_mux_init_signal("vlynq_rx0.gpio_15", 0);
-
-        gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds));
-}
-
-#ifdef CONFIG_OMAP_MUX
-static struct omap_board_mux board_mux[] __initdata = {
-        { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-#endif
-
-static void __init omap_apollon_init(void)
-{
-        u32 v;
-
-        omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
-
-        apollon_init_smc91x();
-        apollon_led_init();
-        apollon_flash_init();
-
-        /* REVISIT: where's the correct place */
-        omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP);
-
-        /* LCD PWR_EN */
-        omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP);
-
-        /* Use Internal loop-back in MMC/SDIO Module Input Clock selection */
-        v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
-        v |= (1 << 24);
-        omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
-
-        /*
-         * Make sure the serial ports are muxed on at this point.
-         * You have to mux them off in device drivers later on
-         * if not needed.
-         */
-        apollon_smc91x_resources[1].start = gpio_to_irq(APOLLON_ETHR_GPIO_IRQ);
-        apollon_smc91x_resources[1].end = gpio_to_irq(APOLLON_ETHR_GPIO_IRQ);
-        platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
-        omap_serial_init();
-        omap_sdrc_init(NULL, NULL);
-        omap_display_init(&apollon_dss_data);
-}
-
-MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
-        /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
-        .atag_offset    = 0x100,
-        .reserve        = omap_reserve,
-        .map_io         = omap242x_map_io,
-        .init_early     = omap2420_init_early,
-        .init_irq       = omap2_init_irq,
-        .handle_irq     = omap2_intc_handle_irq,
-        .init_machine   = omap_apollon_init,
-        .init_late      = omap2420_init_late,
-        .timer          = &omap2_timer,
-        .restart        = omap2xxx_restart,
-MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index b3102c2f4a3c..af2bb219e214 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -30,6 +30,7 @@
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/mmc/host.h>
+#include <linux/usb/phy.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/tdo24m.h>
@@ -418,7 +419,7 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
-static struct usbhs_omap_board_data usbhs_bdata __initdata = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -722,8 +723,9 @@ static void __init cm_t3x_common_init(void)
         cm_t35_init_ethernet();
         cm_t35_init_led();
         cm_t35_init_display();
-        omap_twl4030_audio_init("cm-t3x");
+        omap_twl4030_audio_init("cm-t3x", NULL);
 
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         cm_t35_init_usbh();
         cm_t35_init_camera();
@@ -751,7 +753,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t35_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
 
@@ -764,6 +766,6 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t3730_init,
         .init_late     = omap3630_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index ebbc2adb499e..a66da808cc4a 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -32,6 +32,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mmc/host.h>
 #include <linux/can/platform/ti_hecc.h>
 
 #include <asm/mach-types.h>
@@ -46,6 +47,7 @@
 
 #include "mux.h"
 #include "control.h"
+#include "hsmmc.h"
 #include "common-board-devices.h"
 #include "am35xx-emac.h"
 #include "gpmc-nand.h"
@@ -121,6 +123,26 @@ static void cm_t3517_init_hecc(void)
 static inline void cm_t3517_init_hecc(void) {}
 #endif
 
+#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
+static struct omap2_hsmmc_info cm_t3517_mmc[] = {
+        {
+                .mmc            = 1,
+                .caps           = MMC_CAP_4_BIT_DATA,
+                .gpio_cd        = 144,
+                .gpio_wp        = 59,
+        },
+        {
+                .mmc            = 2,
+                .caps           = MMC_CAP_4_BIT_DATA,
+                .gpio_cd        = -EINVAL,
+                .gpio_wp        = -EINVAL,
+        },
+        {}      /* Terminator */
+};
+#else
+#define cm_t3517_mmc NULL
+#endif
+
 #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
 #define RTC_IO_GPIO             (153)
 #define RTC_WR_GPIO             (154)
@@ -166,7 +188,7 @@ static inline void cm_t3517_init_rtc(void) {}
 #define HSUSB2_RESET_GPIO       (147)
 #define USB_HUB_RESET_GPIO      (152)
 
-static struct usbhs_omap_board_data cm_t3517_ehci_pdata __initdata = {
+static struct usbhs_omap_platform_data cm_t3517_ehci_pdata __initdata = {
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -271,6 +293,10 @@ static struct omap_board_mux board_mux[] __initdata = {
         /* CM-T3517 USB HUB nRESET */
         OMAP3_MUX(MCBSP4_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
 
+        /* CD - GPIO144 and WP - GPIO59 for MMC1 - SB-T35 */
+        OMAP3_MUX(UART2_CTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
+        OMAP3_MUX(GPMC_CLK, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
+
         { .reg_offset = OMAP_MUX_TERMINATOR },
 };
 #endif
@@ -286,6 +312,7 @@ static void __init cm_t3517_init(void)
         cm_t3517_init_usbh();
         cm_t3517_init_hecc();
         am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);
+        omap_hsmmc_init(cm_t3517_mmc);
 }
 
 MACHINE_START(CM_T3517, "Compulab CM-T3517")
@@ -297,6 +324,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t3517_init,
         .init_late      = am35xx_init_late,
-        .timer          = &omap3_gp_timer,
+        .init_time      = omap3_gp_gptimer_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 12865af25d3a..53056c3b0836 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -29,6 +29,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand.h>
 #include <linux/mmc/host.h>
+#include <linux/usb/phy.h>
 
 #include <linux/regulator/machine.h>
 #include <linux/i2c/twl.h>
@@ -435,7 +436,7 @@ static struct platform_device *devkit8000_devices[] __initdata = {
         &omap_dm9000_dev,
 };
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
 
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -622,12 +623,13 @@ static void __init devkit8000_init(void)
 
         omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
 
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
         board_nand_init(devkit8000_nand_partitions,
                         ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS,
                         NAND_BUSWIDTH_16, NULL);
-        omap_twl4030_audio_init("omap3beagle");
+        omap_twl4030_audio_init("omap3beagle", NULL);
 
         /* Ensure SDRC pins are mux'd for self-refresh */
         omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
@@ -643,6 +645,6 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = devkit8000_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_secure_timer,
+        .init_time      = omap3_secure_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 53cb380b7877..0274ff7a2a2b 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -16,7 +16,6 @@
 #include <linux/of_platform.h>
 #include <linux/irqdomain.h>
 
-#include <asm/hardware/gic.h>
 #include <asm/mach/arch.h>
 
 #include "common.h"
@@ -65,7 +64,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
         .init_irq       = omap_intc_of_init,
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_generic_init,
-        .timer          = &omap2_timer,
+        .init_time      = omap2_sync32k_timer_init,
         .dt_compat      = omap242x_boards_compat,
         .restart        = omap2xxx_restart,
 MACHINE_END
@@ -84,7 +83,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
         .init_irq       = omap_intc_of_init,
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_generic_init,
-        .timer          = &omap2_timer,
+        .init_time      = omap2_sync32k_timer_init,
         .dt_compat      = omap243x_boards_compat,
         .restart        = omap2xxx_restart,
 MACHINE_END
@@ -103,7 +102,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
         .init_irq       = omap_intc_of_init,
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_generic_init,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .dt_compat      = omap3_boards_compat,
         .restart        = omap3xxx_restart,
 MACHINE_END
@@ -120,7 +119,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
         .init_irq       = omap_intc_of_init,
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_generic_init,
-        .timer          = &omap3_secure_timer,
+        .init_time      = omap3_secure_sync32k_timer_init,
         .dt_compat      = omap3_gp_boards_compat,
         .restart        = omap3xxx_restart,
 MACHINE_END
@@ -139,8 +138,9 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
         .init_irq       = omap_intc_of_init,
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_generic_init,
-        .timer          = &omap3_am33xx_timer,
+        .init_time      = omap3_am33xx_gptimer_timer_init,
         .dt_compat      = am33xx_boards_compat,
+        .restart        = am33xx_restart,
 MACHINE_END
 #endif
 
@@ -156,10 +156,9 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
         .map_io         = omap4_map_io,
         .init_early     = omap4430_init_early,
         .init_irq       = omap_gic_of_init,
-        .handle_irq     = gic_handle_irq,
         .init_machine   = omap_generic_init,
         .init_late      = omap4430_init_late,
-        .timer          = &omap4_timer,
+        .init_time      = omap4_local_timer_init,
         .dt_compat      = omap4_boards_compat,
         .restart        = omap44xx_restart,
 MACHINE_END
@@ -177,9 +176,8 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
         .map_io         = omap5_map_io,
         .init_early     = omap5_init_early,
         .init_irq       = omap_gic_of_init,
-        .handle_irq     = gic_handle_irq,
         .init_machine   = omap_generic_init,
-        .timer          = &omap5_timer,
+        .init_time      = omap5_realtime_timer_init,
         .dt_compat      = omap5_boards_compat,
         .restart        = omap44xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 3be1311f9e33..812c829fa46f 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -342,6 +342,6 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_h4_init,
         .init_late      = omap2420_init_late,
-        .timer          = &omap2_timer,
+        .init_time      = omap2_sync32k_timer_init,
         .restart        = omap2xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 0f24cb84ba5a..bf92678a01d0 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -18,6 +18,7 @@
 #include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/input.h>
+#include <linux/usb/phy.h>
 
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
@@ -300,20 +301,20 @@ static struct omap2_hsmmc_info mmc[] = {
 
 static struct gpio_led igep_gpio_leds[] = {
         [0] = {
-                .name                   = "gpio-led:red:d0",
-                .default_trigger        = "default-off"
+                .name                   = "omap3:red:user0",
+                .default_state          = 0,
         },
         [1] = {
-                .name                   = "gpio-led:green:d0",
-                .default_trigger        = "default-off",
+                .name                   = "omap3:green:boot",
+                .default_state          = 1,
         },
         [2] = {
-                .name                   = "gpio-led:red:d1",
-                .default_trigger        = "default-off",
+                .name                   = "omap3:red:user1",
+                .default_state          = 0,
         },
         [3] = {
-                .name                   = "gpio-led:green:d1",
-                .default_trigger        = "heartbeat",
+                .name                   = "omap3:green:user1",
+                .default_state          = 0,
                 .gpio                   = -EINVAL, /* gets replaced */
                 .active_low             = 1,
         },
@@ -526,7 +527,7 @@ static void __init igep_i2c_init(void)
         omap3_pmic_init("twl4030", &igep_twldata);
 }
 
-static const struct usbhs_omap_board_data igep2_usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data igep2_usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -537,7 +538,7 @@ static const struct usbhs_omap_board_data igep2_usbhs_bdata __initconst = {
         .reset_gpio_port[2] = -EINVAL,
 };
 
-static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data igep3_usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -625,11 +626,12 @@ static void __init igep_init(void)
         omap_serial_init();
         omap_sdrc_init(m65kxxxxam_sdrc_params,
                                   m65kxxxxam_sdrc_params);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
 
         igep_flash_init();
         igep_leds_init();
-        omap_twl4030_audio_init("igep2");
+        omap_twl4030_audio_init("igep2", NULL);
 
         /*
          * WLAN-BT combo module from MuRata which has a Marvell WLAN
@@ -655,7 +657,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = igep_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
 
@@ -668,6 +670,6 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = igep_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 0869f4f3d3e1..b12fe966a7b9 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -28,6 +28,7 @@
 #include <linux/io.h>
 #include <linux/smsc911x.h>
 #include <linux/mmc/host.h>
+#include <linux/usb/phy.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
 #include <asm/mach-types.h>
@@ -418,6 +419,7 @@ static void __init omap_ldp_init(void)
         omap_ads7846_init(1, 54, 310, NULL);
         omap_serial_init();
         omap_sdrc_init(NULL, NULL);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions),
                         ZOOM_NAND_CS, 0, nand_default_timings);
@@ -435,6 +437,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_ldp_init,
         .init_late      = omap3430_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 0abb30fe399c..f6eeb87e4e95 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -731,7 +731,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .init_late      = omap2420_init_late,
-        .timer          = &omap2_timer,
+        .init_time      = omap2_sync32k_timer_init,
         .restart        = omap2xxx_restart,
 MACHINE_END
 
@@ -744,7 +744,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .init_late      = omap2420_init_late,
-        .timer          = &omap2_timer,
+        .init_time      = omap2_sync32k_timer_init,
         .restart        = omap2xxx_restart,
 MACHINE_END
 
@@ -757,6 +757,6 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .init_late      = omap2420_init_late,
-        .timer          = &omap2_timer,
+        .init_time      = omap2_sync32k_timer_init,
         .restart        = omap2xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 1957426b96fe..6c949bc86256 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -20,6 +20,8 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/leds.h>
+#include <linux/pwm.h>
+#include <linux/leds_pwm.h>
 #include <linux/gpio.h>
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
@@ -30,6 +32,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand.h>
 #include <linux/mmc/host.h>
+#include <linux/usb/phy.h>
 
 #include <linux/regulator/machine.h>
 #include <linux/i2c/twl.h>
@@ -55,6 +58,32 @@
 
 #define NAND_CS 0
 
+static struct pwm_lookup pwm_lookup[] = {
+        /* LEDB -> PMU_STAT */
+        PWM_LOOKUP("twl-pwmled", 1, "leds_pwm", "beagleboard::pmu_stat"),
+};
+
+static struct led_pwm pwm_leds[] = {
+        {
+                .name           = "beagleboard::pmu_stat",
+                .max_brightness = 127,
+                .pwm_period_ns  = 7812500,
+        },
+};
+
+static struct led_pwm_platform_data pwm_data = {
+        .num_leds       = ARRAY_SIZE(pwm_leds),
+        .leds           = pwm_leds,
+};
+
+static struct platform_device leds_pwm = {
+        .name   = "leds_pwm",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &pwm_data,
+        },
+};
+
 /*
  * OMAP3 Beagle revision
  * Run time detection of Beagle revision is done by reading GPIO.
@@ -292,9 +321,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
         gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level,
                         "nEN_USB_PWR");
 
-        /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
-        gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
-
         return 0;
 }
 
@@ -376,11 +402,6 @@ static struct gpio_led gpio_leds[] = {
                 .default_trigger        = "mmc0",
                 .gpio                   = 149,
         },
-        {
-                .name                   = "beagleboard::pmu_stat",
-                .gpio                   = -EINVAL,      /* gets replaced */
-                .active_low             = true,
-        },
 };
 
 static struct gpio_led_platform_data gpio_led_info = {
@@ -428,9 +449,10 @@ static struct platform_device *omap3_beagle_devices[] __initdata = {
         &leds_gpio,
         &keys_gpio,
         &madc_hwmon,
+        &leds_pwm,
 };
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
 
         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@@ -494,7 +516,7 @@ static int __init beagle_opp_init(void)
         }
         return 0;
 }
-device_initcall(beagle_opp_init);
+omap_device_initcall(beagle_opp_init);
 
 static void __init omap3_beagle_init(void)
 {
@@ -519,12 +541,13 @@ static void __init omap3_beagle_init(void)
         omap_sdrc_init(mt46h32m32lf6_sdrc_params,
                                   mt46h32m32lf6_sdrc_params);
 
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
         board_nand_init(omap3beagle_nand_partitions,
                         ARRAY_SIZE(omap3beagle_nand_partitions), NAND_CS,
                         NAND_BUSWIDTH_16, NULL);
-        omap_twl4030_audio_init("omap3beagle");
+        omap_twl4030_audio_init("omap3beagle", NULL);
 
         /* Ensure msecure is mux'd to be able to set the RTC. */
         omap_mux_init_signal("sys_drm_msecure", OMAP_PIN_OFF_OUTPUT_HIGH);
@@ -532,6 +555,8 @@ static void __init omap3_beagle_init(void)
         /* Ensure SDRC pins are mux'd for self-refresh */
         omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
         omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
+
+        pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
 }
 
 MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
@@ -544,6 +569,6 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_beagle_init,
         .init_late      = omap3_init_late,
-        .timer          = &omap3_secure_timer,
+        .init_time      = omap3_secure_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 3985f35aee06..48789e0bb915 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -41,6 +41,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/mmc/host.h>
 #include <linux/export.h>
+#include <linux/usb/phy.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -309,7 +310,7 @@ static struct omap2_hsmmc_info mmc[] = {
                 .gpio_wp        = 63,
                 .deferred       = true,
         },
-#ifdef CONFIG_WL12XX_PLATFORM_DATA
+#ifdef CONFIG_WILINK_PLATFORM_DATA
         {
                 .name           = "wl1271",
                 .mmc            = 2,
@@ -450,7 +451,7 @@ static struct regulator_init_data omap3evm_vio = {
         .consumer_supplies      = omap3evm_vio_supply,
 };
 
-#ifdef CONFIG_WL12XX_PLATFORM_DATA
+#ifdef CONFIG_WILINK_PLATFORM_DATA
 
 #define OMAP3EVM_WLAN_PMENA_GPIO        (150)
 #define OMAP3EVM_WLAN_IRQ_GPIO          (149)
@@ -538,7 +539,7 @@ static int __init omap3_evm_i2c_init(void)
         return 0;
 }
 
-static struct usbhs_omap_board_data usbhs_bdata __initdata = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
 
         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@@ -563,7 +564,7 @@ static struct omap_board_mux omap35x_board_mux[] __initdata = {
                                 OMAP_PIN_OFF_NONE),
         OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
                                 OMAP_PIN_OFF_NONE),
-#ifdef CONFIG_WL12XX_PLATFORM_DATA
+#ifdef CONFIG_WILINK_PLATFORM_DATA
         /* WLAN IRQ - GPIO 149 */
         OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
 
@@ -601,7 +602,7 @@ static struct omap_board_mux omap36x_board_mux[] __initdata = {
         OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
         OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
         OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
-#ifdef CONFIG_WL12XX_PLATFORM_DATA
+#ifdef CONFIG_WILINK_PLATFORM_DATA
         /* WLAN IRQ - GPIO 149 */
         OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
 
@@ -637,7 +638,7 @@ static struct gpio omap3_evm_ehci_gpios[] __initdata = {
 
 static void __init omap3_evm_wl12xx_init(void)
 {
-#ifdef CONFIG_WL12XX_PLATFORM_DATA
+#ifdef CONFIG_WILINK_PLATFORM_DATA
         int ret;
 
         /* WL12xx WLAN Init */
@@ -734,6 +735,7 @@ static void __init omap3_evm_init(void)
                 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
                 usbhs_bdata.reset_gpio_port[1] = 135;
         }
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(&musb_board_data);
         usbhs_init(&usbhs_bdata);
         board_nand_init(omap3evm_nand_partitions,
@@ -744,7 +746,7 @@ static void __init omap3_evm_init(void)
         omap3evm_init_smsc911x();
         omap3_evm_display_init();
         omap3_evm_wl12xx_init();
-        omap_twl4030_audio_init("omap3evm");
+        omap_twl4030_audio_init("omap3evm", NULL);
 }
 
 MACHINE_START(OMAP3EVM, "OMAP3 EVM")
@@ -757,6 +759,6 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_evm_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 2a065ba6eb58..bab51e64c4b5 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -29,6 +29,7 @@
 
 #include <linux/i2c/twl.h>
 #include <linux/mmc/host.h>
+#include <linux/usb/phy.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -215,6 +216,7 @@ static void __init omap3logic_init(void)
         board_mmc_init();
         board_smsc911x_init();
 
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
 
         /* Ensure SDRC pins are mux'd for self-refresh */
@@ -231,7 +233,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3logic_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
 
@@ -244,6 +246,6 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3logic_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index a53a6683c1b8..2bba362148a0 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -35,6 +35,7 @@
 #include <linux/mmc/host.h>
 #include <linux/mmc/card.h>
 #include <linux/regulator/fixed.h>
+#include <linux/usb/phy.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
 #include <asm/mach-types.h>
@@ -567,7 +568,7 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
         &pandora_backlight,
 };
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
 
         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@@ -601,6 +602,7 @@ static void __init omap3pandora_init(void)
                         ARRAY_SIZE(omap3pandora_spi_board_info));
         omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
         usbhs_init(&usbhs_bdata);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         gpmc_nand_init(&pandora_nand_data, NULL);
 
@@ -618,6 +620,6 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3pandora_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 53a6cbcf9747..95c10b3aa678 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -33,6 +33,7 @@
 #include <linux/interrupt.h>
 #include <linux/smsc911x.h>
 #include <linux/i2c/at24.h>
+#include <linux/usb/phy.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -361,7 +362,7 @@ static struct platform_device *omap3_stalker_devices[] __initdata = {
         &keys_gpio,
 };
 
-static struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -404,6 +405,7 @@ static void __init omap3_stalker_init(void)
 
         omap_serial_init();
         omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
         omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL);
@@ -427,6 +429,6 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
         .handle_irq             = omap3_intc_handle_irq,
         .init_machine           = omap3_stalker_init,
         .init_late              = omap35xx_init_late,
-        .timer                  = &omap3_secure_timer,
+        .init_time              = omap3_secure_sync32k_timer_init,
         .restart                = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 263cb9cfbf37..bcd44fbcd877 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -28,6 +28,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/nand.h>
 #include <linux/mmc/host.h>
+#include <linux/usb/phy.h>
 
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <linux/spi/spi.h>
@@ -309,7 +310,7 @@ static struct platform_device *omap3_touchbook_devices[] __initdata = {
         &keys_gpio,
 };
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
 
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@@ -365,6 +366,7 @@ static void __init omap3_touchbook_init(void)
 
         /* Touchscreen and accelerometer */
         omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
         board_nand_init(omap3touchbook_nand_partitions,
@@ -386,6 +388,6 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_touchbook_init,
         .init_late      = omap3430_init_late,
-        .timer          = &omap3_secure_timer,
+        .init_time      = omap3_secure_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 769c1feee1c4..b02c2f00609b 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -30,10 +30,11 @@
 #include <linux/regulator/fixed.h>
 #include <linux/ti_wilink_st.h>
 #include <linux/usb/musb.h>
+#include <linux/usb/phy.h>
 #include <linux/wl12xx.h>
+#include <linux/irqchip/arm-gic.h>
 #include <linux/platform_data/omap-abe-twl6040.h>
 
-#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -139,7 +140,7 @@ static struct platform_device *panda_devices[] __initdata = {
         &btwilink_device,
 };
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -447,6 +448,7 @@ static void __init omap4_panda_init(void)
         omap_sdrc_init(NULL, NULL);
         omap4_twl6030_hsmmc_init(mmc);
         omap4_ehci_init();
+        usb_bind_phy("musb-hdrc.0.auto", 0, "omap-usb2.1.auto");
         usb_musb_init(&musb_board_data);
         omap4_panda_display_init();
 }
@@ -459,9 +461,8 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
         .map_io         = omap4_map_io,
         .init_early     = omap4430_init_early,
         .init_irq       = gic_init_irq,
-        .handle_irq     = gic_handle_irq,
         .init_machine   = omap4_panda_init,
         .init_late      = omap4430_init_late,
-        .timer          = &omap4_timer,
+        .init_time      = omap4_local_timer_init,
         .restart        = omap44xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index c8fde3e56441..86bab51154ee 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -36,6 +36,7 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mmc/host.h>
+#include <linux/usb/phy.h>
 
 #include <linux/platform_data/mtd-nand-omap2.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
@@ -457,7 +458,7 @@ static int __init overo_spi_init(void)
         return 0;
 }
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -499,6 +500,7 @@ static void __init overo_init(void)
                                   mt46h32m32lf6_sdrc_params);
         board_nand_init(overo_nand_partitions,
                         ARRAY_SIZE(overo_nand_partitions), NAND_CS, 0, NULL);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
         overo_spi_init();
@@ -506,7 +508,7 @@ static void __init overo_init(void)
         overo_display_init();
         overo_init_led();
         overo_init_keys();
-        omap_twl4030_audio_init("overo");
+        omap_twl4030_audio_init("overo", NULL);
 
         /* Ensure SDRC pins are mux'd for self-refresh */
         omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
@@ -551,6 +553,6 @@ MACHINE_START(OVERO, "Gumstix Overo")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = overo_init,
         .init_late      = omap35xx_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 0c777b75e484..345e8c4b8731 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -18,6 +18,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/consumer.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
+#include <linux/usb/phy.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
@@ -134,6 +135,7 @@ static void __init rm680_init(void)
         sdrc_params = nokia_get_sdram_timings();
         omap_sdrc_init(sdrc_params, sdrc_params);
 
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         rm680_peripherals_init();
 }
@@ -147,7 +149,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = rm680_init,
         .init_late      = omap3630_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
 
@@ -160,6 +162,6 @@ MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = rm680_init,
         .init_late      = omap3630_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index cf07e289b4ea..3a077df6b8df 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -40,9 +40,9 @@
 #include <sound/tpa6130a2-plat.h>
 #include <media/radio-si4713.h>
 #include <media/si4713.h>
-#include <linux/leds-lp5523.h>
+#include <linux/platform_data/leds-lp55xx.h>
 
-#include <../drivers/staging/iio/light/tsl2563.h>
+#include <linux/platform_data/tsl2563.h>
 #include <linux/lis3lv02d.h>
 
 #if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
@@ -160,32 +160,41 @@ static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
 #endif
 
 #if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
-static struct lp5523_led_config rx51_lp5523_led_config[] = {
+static struct lp55xx_led_config rx51_lp5523_led_config[] = {
         {
+                .name           = "lp5523:kb1",
                 .chan_nr        = 0,
                 .led_current    = 50,
         }, {
+                .name           = "lp5523:kb2",
                 .chan_nr        = 1,
                 .led_current    = 50,
         }, {
+                .name           = "lp5523:kb3",
                 .chan_nr        = 2,
                 .led_current    = 50,
         }, {
+                .name           = "lp5523:kb4",
                 .chan_nr        = 3,
                 .led_current    = 50,
         }, {
+                .name           = "lp5523:b",
                 .chan_nr        = 4,
                 .led_current    = 50,
         }, {
+                .name           = "lp5523:g",
                 .chan_nr        = 5,
                 .led_current    = 50,
         }, {
+                .name           = "lp5523:r",
                 .chan_nr        = 6,
                 .led_current    = 50,
         }, {
+                .name           = "lp5523:kb5",
                 .chan_nr        = 7,
                 .led_current    = 50,
         }, {
+                .name           = "lp5523:kb6",
                 .chan_nr        = 8,
                 .led_current    = 50,
         }
@@ -207,10 +216,10 @@ static void rx51_lp5523_enable(bool state)
         gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
 }
 
-static struct lp5523_platform_data rx51_lp5523_platform_data = {
+static struct lp55xx_platform_data rx51_lp5523_platform_data = {
         .led_config             = rx51_lp5523_led_config,
         .num_channels           = ARRAY_SIZE(rx51_lp5523_led_config),
-        .clock_mode             = LP5523_CLOCK_AUTO,
+        .clock_mode             = LP55XX_CLOCK_AUTO,
         .setup_resources        = rx51_lp5523_setup,
         .release_resources      = rx51_lp5523_release,
         .enable                 = rx51_lp5523_enable,
@@ -1253,6 +1262,16 @@ static void __init rx51_init_lirc(void)
 }
 #endif
 
+static struct platform_device madc_hwmon = {
+        .name   = "twl4030_madc_hwmon",
+        .id     = -1,
+};
+
+static void __init rx51_init_twl4030_hwmon(void)
+{
+        platform_device_register(&madc_hwmon);
+}
+
 void __init rx51_peripherals_init(void)
 {
         rx51_i2c_init();
@@ -1272,5 +1291,6 @@ void __init rx51_peripherals_init(void)
                 omap_hsmmc_init(mmc);
 
         rx51_charger_init();
+        rx51_init_twl4030_hwmon();
 }
 
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c
index 46f4fc982766..eb667261df08 100644
--- a/arch/arm/mach-omap2/board-rx51-video.c
+++ b/arch/arm/mach-omap2/board-rx51-video.c
@@ -18,6 +18,7 @@
 #include <video/omapdss.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
+#include "soc.h"
 #include "board-rx51.h"
 
 #include "mux.h"
@@ -85,5 +86,5 @@ static int __init rx51_video_init(void)
         return 0;
 }
 
-subsys_initcall(rx51_video_init);
+omap_subsys_initcall(rx51_video_init);
 #endif /* defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) */
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index d0374ea2dfb0..f7c4616cbb60 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -123,6 +123,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = rx51_init,
         .init_late      = omap3430_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 1a3e056d63a7..6273c286e1d8 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -43,7 +43,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
         .map_io         = ti81xx_map_io,
         .init_early     = ti81xx_init_early,
         .init_irq       = ti81xx_init_irq,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .init_machine   = ti81xx_evm_init,
         .init_late      = ti81xx_init_late,
         .restart        = omap44xx_restart,
@@ -55,7 +55,7 @@ MACHINE_START(TI8148EVM, "ti8148evm")
         .map_io         = ti81xx_map_io,
         .init_early     = ti81xx_init_early,
         .init_irq       = ti81xx_init_irq,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .init_machine   = ti81xx_evm_init,
         .init_late      = ti81xx_init_late,
         .restart        = omap44xx_restart,
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index 1c7c834a5b5f..8cef477d6b00 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -49,13 +49,13 @@ static void zoom_panel_disable_lcd(struct omap_dss_device *dssdev)
 {
 }
 
-/*
- * PWMA/B register offsets (TWL4030_MODULE_PWMA)
- */
+/* Register offsets in TWL4030_MODULE_INTBR */
 #define TWL_INTBR_PMBR1 0xD
 #define TWL_INTBR_GPBR1 0xC
-#define TWL_LED_PWMON   0x0
-#define TWL_LED_PWMOFF  0x1
+
+/* Register offsets in TWL_MODULE_PWM */
+#define TWL_LED_PWMON   0x3
+#define TWL_LED_PWMOFF  0x4
 
 static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level)
 {
@@ -93,8 +93,8 @@ static int zoom_set_bl_intensity(struct omap_dss_device *dssdev, int level)
         }
 
         c = ((50 * (100 - level)) / 100) + 1;
-        twl_i2c_write_u8(TWL4030_MODULE_PWM1, 0x7F, TWL_LED_PWMOFF);
-        twl_i2c_write_u8(TWL4030_MODULE_PWM1, c, TWL_LED_PWMON);
+        twl_i2c_write_u8(TWL_MODULE_PWM, 0x7F, TWL_LED_PWMOFF);
+        twl_i2c_write_u8(TWL_MODULE_PWM, c, TWL_LED_PWMON);
 #else
         pr_warn("Backlight not enabled\n");
 #endif
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 26e07addc9d7..cdc0c1021863 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -20,6 +20,8 @@
 #include <linux/wl12xx.h>
 #include <linux/mmc/host.h>
 #include <linux/platform_data/gpio-omap.h>
+#include <linux/platform_data/omap-twl4030.h>
+#include <linux/usb/phy.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -34,11 +36,9 @@
 #include "common-board-devices.h"
 
 #define OMAP_ZOOM_WLAN_PMENA_GPIO       (101)
-#define ZOOM2_HEADSET_EXTMUTE_GPIO      (153)
+#define OMAP_ZOOM_TSC2004_IRQ_GPIO      (153)
 #define OMAP_ZOOM_WLAN_IRQ_GPIO         (162)
 
-#define LCD_PANEL_ENABLE_GPIO           (7 + OMAP_MAX_GPIO_LINES)
-
 /* Zoom2 has Qwerty keyboard*/
 static uint32_t board_keymap[] = {
         KEY(0, 0, KEY_E),
@@ -226,22 +226,31 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
+static struct omap_tw4030_pdata omap_twl4030_audio_data = {
+        .voice_connected = true,
+        .custom_routing = true,
+
+        .has_hs         = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
+        .has_hf         = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
+
+        .has_mainmic    = true,
+        .has_submic     = true,
+        .has_hsmic      = true,
+        .has_linein     = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
+};
+
 static int zoom_twl_gpio_setup(struct device *dev,
                 unsigned gpio, unsigned ngpio)
 {
-        int ret;
-
         /* gpio + 0 is "mmc0_cd" (input/IRQ) */
         mmc[0].gpio_cd = gpio + 0;
         omap_hsmmc_late_init(mmc);
 
-        ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
-                               "lcd enable");
-        if (ret)
-                pr_err("Failed to get LCD_PANEL_ENABLE_GPIO (gpio%d).\n",
-                                LCD_PANEL_ENABLE_GPIO);
+        /* Audio setup */
+        omap_twl4030_audio_data.jack_detect = gpio + 2;
+        omap_twl4030_audio_init("Zoom2", &omap_twl4030_audio_data);
 
-        return ret;
+        return 0;
 }
 
 static struct twl4030_gpio_platform_data zoom_gpio_data = {
@@ -264,14 +273,9 @@ static int __init omap_i2c_init(void)
                         TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
                         TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
 
-        if (machine_is_omap_zoom2()) {
-                struct twl4030_codec_data *codec_data;
-                codec_data = zoom_twldata.audio->codec;
+        if (machine_is_omap_zoom2())
+                zoom_twldata.audio->codec->ramp_delay_value = 3; /* 161 ms */
 
-                codec_data->ramp_delay_value = 3;       /* 161 ms */
-                codec_data->hs_extmute = 1;
-                codec_data->hs_extmute_gpio = ZOOM2_HEADSET_EXTMUTE_GPIO;
-        }
         omap_pmic_init(1, 2400, "twl5030", 7 + OMAP_INTC_START, &zoom_twldata);
         omap_register_i2c_bus(2, 400, NULL, 0);
         omap_register_i2c_bus(3, 400, NULL, 0);
@@ -298,6 +302,7 @@ void __init zoom_peripherals_init(void)
         omap_hsmmc_init(mmc);
         omap_i2c_init();
         platform_device_register(&omap_vwlan_device);
+        usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
         usb_musb_init(NULL);
         enable_board_wakeup_source();
         omap_serial_init();
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index d7fa31e67238..5e4d4c9fe61a 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -92,7 +92,7 @@ static struct mtd_partition zoom_nand_partitions[] = {
         },
 };
 
-static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
+static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
         .port_mode[0]           = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[1]           = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[2]           = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -137,7 +137,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_zoom_init,
         .init_late      = omap3430_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
 
@@ -150,6 +150,6 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_zoom_init,
         .init_late      = omap3630_init_late,
-        .timer          = &omap3_timer,
+        .init_time      = omap3_sync32k_timer_init,
         .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/cclock2420_data.c b/arch/arm/mach-omap2/cclock2420_data.c
index ab7e952d2070..0f0a97c1fcc0 100644
--- a/arch/arm/mach-omap2/cclock2420_data.c
+++ b/arch/arm/mach-omap2/cclock2420_data.c
@@ -622,15 +622,10 @@ static struct clk_hw_omap gpios_fck_hw = {
 
 DEFINE_STRUCT_CLK(gpios_fck, gpios_fck_parent_names, aes_ick_ops);
 
-static struct clk wu_l4_ick;
-
-DEFINE_STRUCT_CLK_HW_OMAP(wu_l4_ick, "wkup_clkdm");
-DEFINE_STRUCT_CLK(wu_l4_ick, dpll_ck_parent_names, core_ck_ops);
-
 static struct clk gpios_ick;
 
 static const char *gpios_ick_parent_names[] = {
-        "wu_l4_ick",
+        "sys_ck",
 };
 
 static struct clk_hw_omap gpios_ick_hw = {
@@ -1682,13 +1677,6 @@ static struct clk_hw_omap wdt1_ick_hw = {
 
 DEFINE_STRUCT_CLK(wdt1_ick, gpios_ick_parent_names, aes_ick_ops);
 
-static struct clk wdt1_osc_ck;
-
-static const struct clk_ops wdt1_osc_ck_ops = {};
-
-DEFINE_STRUCT_CLK_HW_OMAP(wdt1_osc_ck, NULL);
-DEFINE_STRUCT_CLK(wdt1_osc_ck, sys_ck_parent_names, wdt1_osc_ck_ops);
-
 static struct clk wdt3_fck;
 
 static struct clk_hw_omap wdt3_fck_hw = {
@@ -1767,7 +1755,6 @@ static struct omap_clk omap2420_clks[] = {
         CLK(NULL,       "func_96m_ck",  &func_96m_ck,   CK_242X),
         CLK(NULL,       "func_48m_ck",  &func_48m_ck,   CK_242X),
         CLK(NULL,       "func_12m_ck",  &func_12m_ck,   CK_242X),
-        CLK(NULL,       "ck_wdt1_osc",  &wdt1_osc_ck,   CK_242X),
         CLK(NULL,       "sys_clkout_src", &sys_clkout_src, CK_242X),
         CLK(NULL,       "sys_clkout",   &sys_clkout,    CK_242X),
         CLK(NULL,       "sys_clkout2_src", &sys_clkout2_src, CK_242X),
@@ -1797,7 +1784,6 @@ static struct omap_clk omap2420_clks[] = {
         /* L4 domain clocks */
         CLK(NULL,       "l4_ck",        &l4_ck,         CK_242X),
         CLK(NULL,       "ssi_l4_ick",   &ssi_l4_ick,    CK_242X),
-        CLK(NULL,       "wu_l4_ick",    &wu_l4_ick,     CK_242X),
         /* virtual meta-group clock */
         CLK(NULL,       "virt_prcm_set", &virt_prcm_set, CK_242X),
         /* general l4 interface ck, multi-parent functional clk */
diff --git a/arch/arm/mach-omap2/cclock2430_data.c b/arch/arm/mach-omap2/cclock2430_data.c
index eb3dab68d536..aed8f74ca076 100644
--- a/arch/arm/mach-omap2/cclock2430_data.c
+++ b/arch/arm/mach-omap2/cclock2430_data.c
@@ -601,15 +601,10 @@ static struct clk_hw_omap gpios_fck_hw = {
 
 DEFINE_STRUCT_CLK(gpios_fck, gpio5_fck_parent_names, aes_ick_ops);
 
-static struct clk wu_l4_ick;
-
-DEFINE_STRUCT_CLK_HW_OMAP(wu_l4_ick, "wkup_clkdm");
-DEFINE_STRUCT_CLK(wu_l4_ick, dpll_ck_parent_names, core_ck_ops);
-
 static struct clk gpios_ick;
 
 static const char *gpios_ick_parent_names[] = {
-        "wu_l4_ick",
+        "sys_ck",
 };
 
 static struct clk_hw_omap gpios_ick_hw = {
@@ -1811,13 +1806,6 @@ static struct clk_hw_omap wdt1_ick_hw = {
 
 DEFINE_STRUCT_CLK(wdt1_ick, gpios_ick_parent_names, aes_ick_ops);
 
-static struct clk wdt1_osc_ck;
-
-static const struct clk_ops wdt1_osc_ck_ops = {};
-
-DEFINE_STRUCT_CLK_HW_OMAP(wdt1_osc_ck, NULL);
-DEFINE_STRUCT_CLK(wdt1_osc_ck, sys_ck_parent_names, wdt1_osc_ck_ops);
-
 static struct clk wdt4_fck;
 
 static struct clk_hw_omap wdt4_fck_hw = {
@@ -1869,7 +1857,6 @@ static struct omap_clk omap2430_clks[] = {
         CLK(NULL,       "func_96m_ck",  &func_96m_ck,   CK_243X),
         CLK(NULL,       "func_48m_ck",  &func_48m_ck,   CK_243X),
         CLK(NULL,       "func_12m_ck",  &func_12m_ck,   CK_243X),
-        CLK(NULL,       "ck_wdt1_osc",  &wdt1_osc_ck,   CK_243X),
         CLK(NULL,       "sys_clkout_src", &sys_clkout_src, CK_243X),
         CLK(NULL,       "sys_clkout",   &sys_clkout,    CK_243X),
         CLK(NULL,       "emul_ck",      &emul_ck,       CK_243X),
@@ -1898,7 +1885,6 @@ static struct omap_clk omap2430_clks[] = {
         /* L4 domain clocks */
         CLK(NULL,       "l4_ck",        &l4_ck,         CK_243X),
         CLK(NULL,       "ssi_l4_ick",   &ssi_l4_ick,    CK_243X),
-        CLK(NULL,       "wu_l4_ick",    &wu_l4_ick,     CK_243X),
         /* virtual meta-group clock */
         CLK(NULL,       "virt_prcm_set", &virt_prcm_set, CK_243X),
         /* general l4 interface ck, multi-parent functional clk */
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c
index ea64ad606759..476b82066cb6 100644
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -284,9 +284,10 @@ DEFINE_STRUCT_CLK(dpll_disp_ck, dpll_core_ck_parents, dpll_ddr_ck_ops);
  * TODO: Add clksel here (sys_clkin, CORE_CLKOUTM6, PER_CLKOUTM2
  * and ALT_CLK1/2)
  */
-DEFINE_CLK_DIVIDER(dpll_disp_m2_ck, "dpll_disp_ck", &dpll_disp_ck, 0x0,
-                   AM33XX_CM_DIV_M2_DPLL_DISP, AM33XX_DPLL_CLKOUT_DIV_SHIFT,
-                   AM33XX_DPLL_CLKOUT_DIV_WIDTH, CLK_DIVIDER_ONE_BASED, NULL);
+DEFINE_CLK_DIVIDER(dpll_disp_m2_ck, "dpll_disp_ck", &dpll_disp_ck,
+                   CLK_SET_RATE_PARENT, AM33XX_CM_DIV_M2_DPLL_DISP,
+                   AM33XX_DPLL_CLKOUT_DIV_SHIFT, AM33XX_DPLL_CLKOUT_DIV_WIDTH,
+                   CLK_DIVIDER_ONE_BASED, NULL);
 
 /* DPLL_PER */
 static struct dpll_data dpll_per_dd = {
@@ -723,7 +724,8 @@ static struct clk_hw_omap lcd_gclk_hw = {
         .clksel_mask    = AM33XX_CLKSEL_0_1_MASK,
 };
 
-DEFINE_STRUCT_CLK(lcd_gclk, lcd_ck_parents, gpio_fck_ops);
+DEFINE_STRUCT_CLK_FLAGS(lcd_gclk, lcd_ck_parents,
+                        gpio_fck_ops, CLK_SET_RATE_PARENT);
 
 DEFINE_CLK_FIXED_FACTOR(mmc_clk, "dpll_per_m2_ck", &dpll_per_m2_ck, 0x0, 1, 2);
 
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 6ef87580c33f..4579c3c5338f 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -426,6 +426,7 @@ static struct clk dpll4_m5x2_ck_3630 = {
         .parent_names   = dpll4_m5x2_ck_parent_names,
         .num_parents    = ARRAY_SIZE(dpll4_m5x2_ck_parent_names),
         .ops            = &dpll4_m5x2_ck_3630_ops,
+        .flags          = CLK_SET_RATE_PARENT,
 };
 
 static struct clk cam_mclk;
@@ -443,7 +444,14 @@ static struct clk_hw_omap cam_mclk_hw = {
         .clkdm_name     = "cam_clkdm",
 };
 
-DEFINE_STRUCT_CLK(cam_mclk, cam_mclk_parent_names, aes2_ick_ops);
+static struct clk cam_mclk = {
+        .name           = "cam_mclk",
+        .hw             = &cam_mclk_hw.hw,
+        .parent_names   = cam_mclk_parent_names,
+        .num_parents    = ARRAY_SIZE(cam_mclk_parent_names),
+        .ops            = &aes2_ick_ops,
+        .flags          = CLK_SET_RATE_PARENT,
+};
 
 static const struct clksel_rate clkout2_src_core_rates[] = {
         { .div = 1, .val = 0, .flags = RATE_IN_3XXX },
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index a2cc046b47f4..3d58f335f173 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -16,6 +16,10 @@
  * XXX Some of the ES1 clocks have been removed/changed; once support
  * is added for discriminating clocks by ES level, these should be added back
  * in.
+ *
+ * XXX All of the remaining MODULEMODE clock nodes should be removed
+ * once the drivers are updated to use pm_runtime or to use the appropriate
+ * upstream clock node for rate/parent selection.
  */
 
 #include <linux/kernel.h>
@@ -315,7 +319,7 @@ DEFINE_CLK_DIVIDER(dpll_abe_m2_ck, "dpll_abe_ck", &dpll_abe_ck, 0x0,
                    OMAP4430_CM_DIV_M2_DPLL_ABE, OMAP4430_DPLL_CLKOUT_DIV_SHIFT,
                    OMAP4430_DPLL_CLKOUT_DIV_WIDTH, CLK_DIVIDER_ONE_BASED, NULL);
 
-static const struct clk_ops dmic_fck_ops = {
+static const struct clk_ops dpll_hsd_ops = {
         .enable         = &omap2_dflt_clk_enable,
         .disable        = &omap2_dflt_clk_disable,
         .is_enabled     = &omap2_dflt_clk_is_enabled,
@@ -325,6 +329,12 @@ static const struct clk_ops dmic_fck_ops = {
         .init           = &omap2_init_clk_clkdm,
 };
 
+static const struct clk_ops func_dmic_abe_gfclk_ops = {
+        .recalc_rate    = &omap2_clksel_recalc,
+        .get_parent     = &omap2_clksel_find_parent_index,
+        .set_parent     = &omap2_clksel_set_parent,
+};
+
 static const char *dpll_core_m3x2_ck_parents[] = {
         "dpll_core_x2_ck",
 };
@@ -340,7 +350,7 @@ DEFINE_CLK_OMAP_MUX_GATE(dpll_core_m3x2_ck, NULL, dpll_core_m3x2_div,
                          OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
                          OMAP4430_CM_DIV_M3_DPLL_CORE,
                          OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, NULL,
-                         dpll_core_m3x2_ck_parents, dmic_fck_ops);
+                         dpll_core_m3x2_ck_parents, dpll_hsd_ops);
 
 DEFINE_CLK_OMAP_HSDIVIDER(dpll_core_m7x2_ck, "dpll_core_x2_ck",
                           &dpll_core_x2_ck, 0x0, OMAP4430_CM_DIV_M7_DPLL_CORE,
@@ -547,7 +557,7 @@ DEFINE_CLK_OMAP_MUX_GATE(dpll_per_m3x2_ck, NULL, dpll_per_m3x2_div,
                          OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
                          OMAP4430_CM_DIV_M3_DPLL_PER,
                          OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, NULL,
-                         dpll_per_m3x2_ck_parents, dmic_fck_ops);
+                         dpll_per_m3x2_ck_parents, dpll_hsd_ops);
 
 DEFINE_CLK_OMAP_HSDIVIDER(dpll_per_m4x2_ck, "dpll_per_x2_ck", &dpll_per_x2_ck,
                           0x0, OMAP4430_CM_DIV_M4_DPLL_PER,
@@ -595,15 +605,26 @@ static const char *dpll_usb_ck_parents[] = {
 
 static struct clk dpll_usb_ck;
 
+static const struct clk_ops dpll_usb_ck_ops = {
+        .enable         = &omap3_noncore_dpll_enable,
+        .disable        = &omap3_noncore_dpll_disable,
+        .recalc_rate    = &omap3_dpll_recalc,
+        .round_rate     = &omap2_dpll_round_rate,
+        .set_rate       = &omap3_noncore_dpll_set_rate,
+        .get_parent     = &omap2_init_dpll_parent,
+        .init           = &omap2_init_clk_clkdm,
+};
+
 static struct clk_hw_omap dpll_usb_ck_hw = {
         .hw = {
                 .clk = &dpll_usb_ck,
         },
         .dpll_data      = &dpll_usb_dd,
+        .clkdm_name     = "l3_init_clkdm",
         .ops            = &clkhwops_omap3_dpll,
 };
 
-DEFINE_STRUCT_CLK(dpll_usb_ck, dpll_usb_ck_parents, dpll_ck_ops);
+DEFINE_STRUCT_CLK(dpll_usb_ck, dpll_usb_ck_parents, dpll_usb_ck_ops);
 
 static const char *dpll_usb_clkdcoldo_ck_parents[] = {
         "dpll_usb_ck",
@@ -749,10 +770,6 @@ DEFINE_CLK_GATE(aes2_fck, "l3_div_ck", &l3_div_ck, 0x0,
                 OMAP4430_CM_L4SEC_AES2_CLKCTRL,
                 OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
 
-DEFINE_CLK_GATE(aess_fck, "aess_fclk", &aess_fclk, 0x0,
-                OMAP4430_CM1_ABE_AESS_CLKCTRL, OMAP4430_MODULEMODE_SWCTRL_SHIFT,
-                0x0, NULL);
-
 DEFINE_CLK_GATE(bandgap_fclk, "sys_32k_ck", &sys_32k_ck, 0x0,
                 OMAP4430_CM_WKUP_BANDGAP_CLKCTRL,
                 OMAP4430_OPTFCLKEN_BGAP_32K_SHIFT, 0x0, NULL);
@@ -774,11 +791,6 @@ DEFINE_CLK_GATE(bandgap_ts_fclk, "div_ts_ck", &div_ts_ck, 0x0,
                 OMAP4460_OPTFCLKEN_TS_FCLK_SHIFT,
                 0x0, NULL);
 
-DEFINE_CLK_GATE(des3des_fck, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4SEC_DES3DES_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT,
-                0x0, NULL);
-
 static const char *dmic_sync_mux_ck_parents[] = {
         "abe_24m_fclk", "syc_clk_div_ck", "func_24m_clk",
 };
@@ -795,23 +807,13 @@ static const struct clksel func_dmic_abe_gfclk_sel[] = {
         { .parent = NULL },
 };
 
-static const char *dmic_fck_parents[] = {
+static const char *func_dmic_abe_gfclk_parents[] = {
         "dmic_sync_mux_ck", "pad_clks_ck", "slimbus_clk",
 };
 
-/* Merged func_dmic_abe_gfclk into dmic */
-static struct clk dmic_fck;
-
-DEFINE_CLK_OMAP_MUX_GATE(dmic_fck, "abe_clkdm", func_dmic_abe_gfclk_sel,
-                         OMAP4430_CM1_ABE_DMIC_CLKCTRL,
-                         OMAP4430_CLKSEL_SOURCE_MASK,
-                         OMAP4430_CM1_ABE_DMIC_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         dmic_fck_parents, dmic_fck_ops);
-
-DEFINE_CLK_GATE(dsp_fck, "dpll_iva_m4x2_ck", &dpll_iva_m4x2_ck, 0x0,
-                OMAP4430_CM_TESLA_TESLA_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
+DEFINE_CLK_OMAP_MUX(func_dmic_abe_gfclk, "abe_clkdm", func_dmic_abe_gfclk_sel,
+                    OMAP4430_CM1_ABE_DMIC_CLKCTRL, OMAP4430_CLKSEL_SOURCE_MASK,
+                    func_dmic_abe_gfclk_parents, func_dmic_abe_gfclk_ops);
 
 DEFINE_CLK_GATE(dss_sys_clk, "syc_clk_div_ck", &syc_clk_div_ck, 0x0,
                 OMAP4430_CM_DSS_DSS_CLKCTRL,
@@ -833,177 +835,57 @@ DEFINE_CLK_GATE(dss_fck, "l3_div_ck", &l3_div_ck, 0x0,
                 OMAP4430_CM_DSS_DSS_CLKCTRL, OMAP4430_MODULEMODE_SWCTRL_SHIFT,
                 0x0, NULL);
 
-DEFINE_CLK_GATE(efuse_ctrl_cust_fck, "sys_clkin_ck", &sys_clkin_ck, 0x0,
-                OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(emif1_fck, "ddrphy_ck", &ddrphy_ck, 0x0,
-                OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(emif2_fck, "ddrphy_ck", &ddrphy_ck, 0x0,
-                OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_DIVIDER(fdif_fck, "dpll_per_m4x2_ck", &dpll_per_m4x2_ck, 0x0,
                    OMAP4430_CM_CAM_FDIF_CLKCTRL, OMAP4430_CLKSEL_FCLK_SHIFT,
                    OMAP4430_CLKSEL_FCLK_WIDTH, CLK_DIVIDER_POWER_OF_TWO, NULL);
 
-DEFINE_CLK_GATE(fpka_fck, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(gpio1_dbclk, "sys_32k_ck", &sys_32k_ck, 0x0,
                 OMAP4430_CM_WKUP_GPIO1_CLKCTRL,
                 OMAP4430_OPTFCLKEN_DBCLK_SHIFT, 0x0, NULL);
 
-DEFINE_CLK_GATE(gpio1_ick, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, 0x0,
-                OMAP4430_CM_WKUP_GPIO1_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(gpio2_dbclk, "sys_32k_ck", &sys_32k_ck, 0x0,
                 OMAP4430_CM_L4PER_GPIO2_CLKCTRL, OMAP4430_OPTFCLKEN_DBCLK_SHIFT,
                 0x0, NULL);
 
-DEFINE_CLK_GATE(gpio2_ick, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4PER_GPIO2_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(gpio3_dbclk, "sys_32k_ck", &sys_32k_ck, 0x0,
                 OMAP4430_CM_L4PER_GPIO3_CLKCTRL,
                 OMAP4430_OPTFCLKEN_DBCLK_SHIFT, 0x0, NULL);
 
-DEFINE_CLK_GATE(gpio3_ick, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4PER_GPIO3_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(gpio4_dbclk, "sys_32k_ck", &sys_32k_ck, 0x0,
                 OMAP4430_CM_L4PER_GPIO4_CLKCTRL, OMAP4430_OPTFCLKEN_DBCLK_SHIFT,
                 0x0, NULL);
 
-DEFINE_CLK_GATE(gpio4_ick, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4PER_GPIO4_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(gpio5_dbclk, "sys_32k_ck", &sys_32k_ck, 0x0,
                 OMAP4430_CM_L4PER_GPIO5_CLKCTRL, OMAP4430_OPTFCLKEN_DBCLK_SHIFT,
                 0x0, NULL);
 
-DEFINE_CLK_GATE(gpio5_ick, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4PER_GPIO5_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(gpio6_dbclk, "sys_32k_ck", &sys_32k_ck, 0x0,
                 OMAP4430_CM_L4PER_GPIO6_CLKCTRL, OMAP4430_OPTFCLKEN_DBCLK_SHIFT,
                 0x0, NULL);
 
-DEFINE_CLK_GATE(gpio6_ick, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4PER_GPIO6_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(gpmc_ick, "l3_div_ck", &l3_div_ck, 0x0,
-                OMAP4430_CM_L3_2_GPMC_CLKCTRL, OMAP4430_MODULEMODE_HWCTRL_SHIFT,
-                0x0, NULL);
-
 static const struct clksel sgx_clk_mux_sel[] = {
         { .parent = &dpll_core_m7x2_ck, .rates = div_1_0_rates },
         { .parent = &dpll_per_m7x2_ck, .rates = div_1_1_rates },
         { .parent = NULL },
 };
 
-static const char *gpu_fck_parents[] = {
+static const char *sgx_clk_mux_parents[] = {
         "dpll_core_m7x2_ck", "dpll_per_m7x2_ck",
 };
 
-/* Merged sgx_clk_mux into gpu */
-DEFINE_CLK_OMAP_MUX_GATE(gpu_fck, "l3_gfx_clkdm", sgx_clk_mux_sel,
-                         OMAP4430_CM_GFX_GFX_CLKCTRL,
-                         OMAP4430_CLKSEL_SGX_FCLK_MASK,
-                         OMAP4430_CM_GFX_GFX_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         gpu_fck_parents, dmic_fck_ops);
-
-DEFINE_CLK_GATE(hdq1w_fck, "func_12m_fclk", &func_12m_fclk, 0x0,
-                OMAP4430_CM_L4PER_HDQ1W_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
+DEFINE_CLK_OMAP_MUX(sgx_clk_mux, "l3_gfx_clkdm", sgx_clk_mux_sel,
+                    OMAP4430_CM_GFX_GFX_CLKCTRL, OMAP4430_CLKSEL_SGX_FCLK_MASK,
+                    sgx_clk_mux_parents, func_dmic_abe_gfclk_ops);
 
 DEFINE_CLK_DIVIDER(hsi_fck, "dpll_per_m2x2_ck", &dpll_per_m2x2_ck, 0x0,
                    OMAP4430_CM_L3INIT_HSI_CLKCTRL, OMAP4430_CLKSEL_24_25_SHIFT,
                    OMAP4430_CLKSEL_24_25_WIDTH, CLK_DIVIDER_POWER_OF_TWO,
                    NULL);
 
-DEFINE_CLK_GATE(i2c1_fck, "func_96m_fclk", &func_96m_fclk, 0x0,
-                OMAP4430_CM_L4PER_I2C1_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(i2c2_fck, "func_96m_fclk", &func_96m_fclk, 0x0,
-                OMAP4430_CM_L4PER_I2C2_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(i2c3_fck, "func_96m_fclk", &func_96m_fclk, 0x0,
-                OMAP4430_CM_L4PER_I2C3_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(i2c4_fck, "func_96m_fclk", &func_96m_fclk, 0x0,
-                OMAP4430_CM_L4PER_I2C4_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(ipu_fck, "ducati_clk_mux_ck", &ducati_clk_mux_ck, 0x0,
-                OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(iss_ctrlclk, "func_96m_fclk", &func_96m_fclk, 0x0,
                 OMAP4430_CM_CAM_ISS_CLKCTRL, OMAP4430_OPTFCLKEN_CTRLCLK_SHIFT,
                 0x0, NULL);
 
-DEFINE_CLK_GATE(iss_fck, "ducati_clk_mux_ck", &ducati_clk_mux_ck, 0x0,
-                OMAP4430_CM_CAM_ISS_CLKCTRL, OMAP4430_MODULEMODE_SWCTRL_SHIFT,
-                0x0, NULL);
-
-DEFINE_CLK_GATE(iva_fck, "dpll_iva_m5x2_ck", &dpll_iva_m5x2_ck, 0x0,
-                OMAP4430_CM_IVAHD_IVAHD_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(kbd_fck, "sys_32k_ck", &sys_32k_ck, 0x0,
-                OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-static struct clk l3_instr_ick;
-
-static const char *l3_instr_ick_parent_names[] = {
-        "l3_div_ck",
-};
-
-static const struct clk_ops l3_instr_ick_ops = {
-        .enable         = &omap2_dflt_clk_enable,
-        .disable        = &omap2_dflt_clk_disable,
-        .is_enabled     = &omap2_dflt_clk_is_enabled,
-        .init           = &omap2_init_clk_clkdm,
-};
-
-static struct clk_hw_omap l3_instr_ick_hw = {
-        .hw = {
-                .clk = &l3_instr_ick,
-        },
-        .enable_reg     = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL,
-        .enable_bit     = OMAP4430_MODULEMODE_HWCTRL_SHIFT,
-        .clkdm_name     = "l3_instr_clkdm",
-};
-
-DEFINE_STRUCT_CLK(l3_instr_ick, l3_instr_ick_parent_names, l3_instr_ick_ops);
-
-static struct clk l3_main_3_ick;
-static struct clk_hw_omap l3_main_3_ick_hw = {
-        .hw = {
-                .clk = &l3_main_3_ick,
-        },
-        .enable_reg     = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL,
-        .enable_bit     = OMAP4430_MODULEMODE_HWCTRL_SHIFT,
-        .clkdm_name     = "l3_instr_clkdm",
-};
-
-DEFINE_STRUCT_CLK(l3_main_3_ick, l3_instr_ick_parent_names, l3_instr_ick_ops);
-
 DEFINE_CLK_MUX(mcasp_sync_mux_ck, dmic_sync_mux_ck_parents, NULL, 0x0,
                OMAP4430_CM1_ABE_MCASP_CLKCTRL,
                OMAP4430_CLKSEL_INTERNAL_SOURCE_SHIFT,
@@ -1016,17 +898,13 @@ static const struct clksel func_mcasp_abe_gfclk_sel[] = {
         { .parent = NULL },
 };
 
-static const char *mcasp_fck_parents[] = {
+static const char *func_mcasp_abe_gfclk_parents[] = {
         "mcasp_sync_mux_ck", "pad_clks_ck", "slimbus_clk",
 };
 
-/* Merged func_mcasp_abe_gfclk into mcasp */
-DEFINE_CLK_OMAP_MUX_GATE(mcasp_fck, "abe_clkdm", func_mcasp_abe_gfclk_sel,
-                         OMAP4430_CM1_ABE_MCASP_CLKCTRL,
-                         OMAP4430_CLKSEL_SOURCE_MASK,
-                         OMAP4430_CM1_ABE_MCASP_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         mcasp_fck_parents, dmic_fck_ops);
+DEFINE_CLK_OMAP_MUX(func_mcasp_abe_gfclk, "abe_clkdm", func_mcasp_abe_gfclk_sel,
+                    OMAP4430_CM1_ABE_MCASP_CLKCTRL, OMAP4430_CLKSEL_SOURCE_MASK,
+                    func_mcasp_abe_gfclk_parents, func_dmic_abe_gfclk_ops);
 
 DEFINE_CLK_MUX(mcbsp1_sync_mux_ck, dmic_sync_mux_ck_parents, NULL, 0x0,
                OMAP4430_CM1_ABE_MCBSP1_CLKCTRL,
@@ -1040,17 +918,14 @@ static const struct clksel func_mcbsp1_gfclk_sel[] = {
         { .parent = NULL },
 };
 
-static const char *mcbsp1_fck_parents[] = {
+static const char *func_mcbsp1_gfclk_parents[] = {
         "mcbsp1_sync_mux_ck", "pad_clks_ck", "slimbus_clk",
 };
 
-/* Merged func_mcbsp1_gfclk into mcbsp1 */
-DEFINE_CLK_OMAP_MUX_GATE(mcbsp1_fck, "abe_clkdm", func_mcbsp1_gfclk_sel,
-                         OMAP4430_CM1_ABE_MCBSP1_CLKCTRL,
-                         OMAP4430_CLKSEL_SOURCE_MASK,
-                         OMAP4430_CM1_ABE_MCBSP1_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         mcbsp1_fck_parents, dmic_fck_ops);
+DEFINE_CLK_OMAP_MUX(func_mcbsp1_gfclk, "abe_clkdm", func_mcbsp1_gfclk_sel,
+                    OMAP4430_CM1_ABE_MCBSP1_CLKCTRL,
+                    OMAP4430_CLKSEL_SOURCE_MASK, func_mcbsp1_gfclk_parents,
+                    func_dmic_abe_gfclk_ops);
 
 DEFINE_CLK_MUX(mcbsp2_sync_mux_ck, dmic_sync_mux_ck_parents, NULL, 0x0,
                OMAP4430_CM1_ABE_MCBSP2_CLKCTRL,
@@ -1064,17 +939,14 @@ static const struct clksel func_mcbsp2_gfclk_sel[] = {
         { .parent = NULL },
 };
 
-static const char *mcbsp2_fck_parents[] = {
+static const char *func_mcbsp2_gfclk_parents[] = {
         "mcbsp2_sync_mux_ck", "pad_clks_ck", "slimbus_clk",
 };
 
-/* Merged func_mcbsp2_gfclk into mcbsp2 */
-DEFINE_CLK_OMAP_MUX_GATE(mcbsp2_fck, "abe_clkdm", func_mcbsp2_gfclk_sel,
-                         OMAP4430_CM1_ABE_MCBSP2_CLKCTRL,
-                         OMAP4430_CLKSEL_SOURCE_MASK,
-                         OMAP4430_CM1_ABE_MCBSP2_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         mcbsp2_fck_parents, dmic_fck_ops);
+DEFINE_CLK_OMAP_MUX(func_mcbsp2_gfclk, "abe_clkdm", func_mcbsp2_gfclk_sel,
+                    OMAP4430_CM1_ABE_MCBSP2_CLKCTRL,
+                    OMAP4430_CLKSEL_SOURCE_MASK, func_mcbsp2_gfclk_parents,
+                    func_dmic_abe_gfclk_ops);
 
 DEFINE_CLK_MUX(mcbsp3_sync_mux_ck, dmic_sync_mux_ck_parents, NULL, 0x0,
                OMAP4430_CM1_ABE_MCBSP3_CLKCTRL,
@@ -1088,17 +960,14 @@ static const struct clksel func_mcbsp3_gfclk_sel[] = {
         { .parent = NULL },
 };
 
-static const char *mcbsp3_fck_parents[] = {
+static const char *func_mcbsp3_gfclk_parents[] = {
         "mcbsp3_sync_mux_ck", "pad_clks_ck", "slimbus_clk",
 };
 
-/* Merged func_mcbsp3_gfclk into mcbsp3 */
-DEFINE_CLK_OMAP_MUX_GATE(mcbsp3_fck, "abe_clkdm", func_mcbsp3_gfclk_sel,
-                         OMAP4430_CM1_ABE_MCBSP3_CLKCTRL,
-                         OMAP4430_CLKSEL_SOURCE_MASK,
-                         OMAP4430_CM1_ABE_MCBSP3_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         mcbsp3_fck_parents, dmic_fck_ops);
+DEFINE_CLK_OMAP_MUX(func_mcbsp3_gfclk, "abe_clkdm", func_mcbsp3_gfclk_sel,
+                    OMAP4430_CM1_ABE_MCBSP3_CLKCTRL,
+                    OMAP4430_CLKSEL_SOURCE_MASK, func_mcbsp3_gfclk_parents,
+                    func_dmic_abe_gfclk_ops);
 
 static const char *mcbsp4_sync_mux_ck_parents[] = {
         "func_96m_fclk", "per_abe_nc_fclk",
@@ -1115,37 +984,14 @@ static const struct clksel per_mcbsp4_gfclk_sel[] = {
         { .parent = NULL },
 };
 
-static const char *mcbsp4_fck_parents[] = {
+static const char *per_mcbsp4_gfclk_parents[] = {
         "mcbsp4_sync_mux_ck", "pad_clks_ck",
 };
 
-/* Merged per_mcbsp4_gfclk into mcbsp4 */
-DEFINE_CLK_OMAP_MUX_GATE(mcbsp4_fck, "l4_per_clkdm", per_mcbsp4_gfclk_sel,
-                         OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
-                         OMAP4430_CLKSEL_SOURCE_24_24_MASK,
-                         OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         mcbsp4_fck_parents, dmic_fck_ops);
-
-DEFINE_CLK_GATE(mcpdm_fck, "pad_clks_ck", &pad_clks_ck, 0x0,
-                OMAP4430_CM1_ABE_PDM_CLKCTRL, OMAP4430_MODULEMODE_SWCTRL_SHIFT,
-                0x0, NULL);
-
-DEFINE_CLK_GATE(mcspi1_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_MCSPI1_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(mcspi2_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_MCSPI2_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(mcspi3_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_MCSPI3_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(mcspi4_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_MCSPI4_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
+DEFINE_CLK_OMAP_MUX(per_mcbsp4_gfclk, "l4_per_clkdm", per_mcbsp4_gfclk_sel,
+                    OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
+                    OMAP4430_CLKSEL_SOURCE_24_24_MASK, per_mcbsp4_gfclk_parents,
+                    func_dmic_abe_gfclk_ops);
 
 static const struct clksel hsmmc1_fclk_sel[] = {
         { .parent = &func_64m_fclk, .rates = div_1_0_rates },
@@ -1153,69 +999,22 @@ static const struct clksel hsmmc1_fclk_sel[] = {
         { .parent = NULL },
 };
 
-static const char *mmc1_fck_parents[] = {
+static const char *hsmmc1_fclk_parents[] = {
         "func_64m_fclk", "func_96m_fclk",
 };
 
-/* Merged hsmmc1_fclk into mmc1 */
-DEFINE_CLK_OMAP_MUX_GATE(mmc1_fck, "l3_init_clkdm", hsmmc1_fclk_sel,
-                         OMAP4430_CM_L3INIT_MMC1_CLKCTRL, OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         mmc1_fck_parents, dmic_fck_ops);
-
-/* Merged hsmmc2_fclk into mmc2 */
-DEFINE_CLK_OMAP_MUX_GATE(mmc2_fck, "l3_init_clkdm", hsmmc1_fclk_sel,
-                         OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         mmc1_fck_parents, dmic_fck_ops);
-
-DEFINE_CLK_GATE(mmc3_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_MMCSD3_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(mmc4_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_MMCSD4_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(mmc5_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_MMCSD5_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(ocp2scp_usb_phy_phy_48m, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
-                OMAP4430_OPTFCLKEN_PHY_48M_SHIFT, 0x0, NULL);
-
-DEFINE_CLK_GATE(ocp2scp_usb_phy_ick, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
-                OMAP4430_MODULEMODE_HWCTRL_SHIFT, 0x0, NULL);
+DEFINE_CLK_OMAP_MUX(hsmmc1_fclk, "l3_init_clkdm", hsmmc1_fclk_sel,
+                    OMAP4430_CM_L3INIT_MMC1_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops);
 
-static struct clk ocp_wp_noc_ick;
-
-static struct clk_hw_omap ocp_wp_noc_ick_hw = {
-        .hw = {
-                .clk = &ocp_wp_noc_ick,
-        },
-        .enable_reg     = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL,
-        .enable_bit     = OMAP4430_MODULEMODE_HWCTRL_SHIFT,
-        .clkdm_name     = "l3_instr_clkdm",
-};
-
-DEFINE_STRUCT_CLK(ocp_wp_noc_ick, l3_instr_ick_parent_names, l3_instr_ick_ops);
-
-DEFINE_CLK_GATE(rng_ick, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4SEC_RNG_CLKCTRL, OMAP4430_MODULEMODE_HWCTRL_SHIFT,
-                0x0, NULL);
+DEFINE_CLK_OMAP_MUX(hsmmc2_fclk, "l3_init_clkdm", hsmmc1_fclk_sel,
+                    OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops);
 
 DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0,
                 OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL,
                 OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
 
-DEFINE_CLK_GATE(sl2if_ick, "dpll_iva_m5x2_ck", &dpll_iva_m5x2_ck, 0x0,
-                OMAP4430_CM_IVAHD_SL2_CLKCTRL, OMAP4430_MODULEMODE_HWCTRL_SHIFT,
-                0x0, NULL);
-
 DEFINE_CLK_GATE(slimbus1_fclk_1, "func_24m_clk", &func_24m_clk, 0x0,
                 OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL,
                 OMAP4430_OPTFCLKEN_FCLK1_SHIFT, 0x0, NULL);
@@ -1232,10 +1031,6 @@ DEFINE_CLK_GATE(slimbus1_slimbus_clk, "slimbus_clk", &slimbus_clk, 0x0,
                 OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL,
                 OMAP4430_OPTFCLKEN_SLIMBUS_CLK_11_11_SHIFT, 0x0, NULL);
 
-DEFINE_CLK_GATE(slimbus1_fck, "ocp_abe_iclk", &ocp_abe_iclk, 0x0,
-                OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(slimbus2_fclk_1, "per_abe_24m_fclk", &per_abe_24m_fclk, 0x0,
                 OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL,
                 OMAP4430_OPTFCLKEN_PERABE24M_GFCLK_SHIFT, 0x0, NULL);
@@ -1249,10 +1044,6 @@ DEFINE_CLK_GATE(slimbus2_slimbus_clk, "pad_slimbus_core_clks_ck",
                 OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL,
                 OMAP4430_OPTFCLKEN_SLIMBUS_CLK_SHIFT, 0x0, NULL);
 
-DEFINE_CLK_GATE(slimbus2_fck, "l4_div_ck", &l4_div_ck, 0x0,
-                OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
-
 DEFINE_CLK_GATE(smartreflex_core_fck, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck,
                 0x0, OMAP4430_CM_ALWON_SR_CORE_CLKCTRL,
                 OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
@@ -1271,52 +1062,35 @@ static const struct clksel dmt1_clk_mux_sel[] = {
         { .parent = NULL },
 };
 
-/* Merged dmt1_clk_mux into timer1 */
-DEFINE_CLK_OMAP_MUX_GATE(timer1_fck, "l4_wkup_clkdm", dmt1_clk_mux_sel,
-                         OMAP4430_CM_WKUP_TIMER1_CLKCTRL, OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_WKUP_TIMER1_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         abe_dpll_bypass_clk_mux_ck_parents, dmic_fck_ops);
-
-/* Merged cm2_dm10_mux into timer10 */
-DEFINE_CLK_OMAP_MUX_GATE(timer10_fck, "l4_per_clkdm", dmt1_clk_mux_sel,
-                         OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL,
-                         OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         abe_dpll_bypass_clk_mux_ck_parents, dmic_fck_ops);
-
-/* Merged cm2_dm11_mux into timer11 */
-DEFINE_CLK_OMAP_MUX_GATE(timer11_fck, "l4_per_clkdm", dmt1_clk_mux_sel,
-                         OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL,
-                         OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         abe_dpll_bypass_clk_mux_ck_parents, dmic_fck_ops);
-
-/* Merged cm2_dm2_mux into timer2 */
-DEFINE_CLK_OMAP_MUX_GATE(timer2_fck, "l4_per_clkdm", dmt1_clk_mux_sel,
-                         OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL,
-                         OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         abe_dpll_bypass_clk_mux_ck_parents, dmic_fck_ops);
-
-/* Merged cm2_dm3_mux into timer3 */
-DEFINE_CLK_OMAP_MUX_GATE(timer3_fck, "l4_per_clkdm", dmt1_clk_mux_sel,
-                         OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL,
-                         OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         abe_dpll_bypass_clk_mux_ck_parents, dmic_fck_ops);
-
-/* Merged cm2_dm4_mux into timer4 */
-DEFINE_CLK_OMAP_MUX_GATE(timer4_fck, "l4_per_clkdm", dmt1_clk_mux_sel,
-                         OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL,
-                         OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         abe_dpll_bypass_clk_mux_ck_parents, dmic_fck_ops);
+DEFINE_CLK_OMAP_MUX(dmt1_clk_mux, "l4_wkup_clkdm", dmt1_clk_mux_sel,
+                    OMAP4430_CM_WKUP_TIMER1_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    abe_dpll_bypass_clk_mux_ck_parents,
+                    func_dmic_abe_gfclk_ops);
+
+DEFINE_CLK_OMAP_MUX(cm2_dm10_mux, "l4_per_clkdm", dmt1_clk_mux_sel,
+                    OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    abe_dpll_bypass_clk_mux_ck_parents,
+                    func_dmic_abe_gfclk_ops);
+
+DEFINE_CLK_OMAP_MUX(cm2_dm11_mux, "l4_per_clkdm", dmt1_clk_mux_sel,
+                    OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    abe_dpll_bypass_clk_mux_ck_parents,
+                    func_dmic_abe_gfclk_ops);
+
+DEFINE_CLK_OMAP_MUX(cm2_dm2_mux, "l4_per_clkdm", dmt1_clk_mux_sel,
+                    OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    abe_dpll_bypass_clk_mux_ck_parents,
+                    func_dmic_abe_gfclk_ops);
+
+DEFINE_CLK_OMAP_MUX(cm2_dm3_mux, "l4_per_clkdm", dmt1_clk_mux_sel,
+                    OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    abe_dpll_bypass_clk_mux_ck_parents,
+                    func_dmic_abe_gfclk_ops);
+
+DEFINE_CLK_OMAP_MUX(cm2_dm4_mux, "l4_per_clkdm", dmt1_clk_mux_sel,
+                    OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    abe_dpll_bypass_clk_mux_ck_parents,
+                    func_dmic_abe_gfclk_ops);
 
 static const struct clksel timer5_sync_mux_sel[] = {
         { .parent = &syc_clk_div_ck, .rates = div_1_0_rates },
@@ -1324,61 +1098,30 @@ static const struct clksel timer5_sync_mux_sel[] = {
         { .parent = NULL },
 };
 
-static const char *timer5_fck_parents[] = {
+static const char *timer5_sync_mux_parents[] = {
         "syc_clk_div_ck", "sys_32k_ck",
 };
 
-/* Merged timer5_sync_mux into timer5 */
-DEFINE_CLK_OMAP_MUX_GATE(timer5_fck, "abe_clkdm", timer5_sync_mux_sel,
-                         OMAP4430_CM1_ABE_TIMER5_CLKCTRL, OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM1_ABE_TIMER5_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         timer5_fck_parents, dmic_fck_ops);
-
-/* Merged timer6_sync_mux into timer6 */
-DEFINE_CLK_OMAP_MUX_GATE(timer6_fck, "abe_clkdm", timer5_sync_mux_sel,
-                         OMAP4430_CM1_ABE_TIMER6_CLKCTRL, OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM1_ABE_TIMER6_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         timer5_fck_parents, dmic_fck_ops);
-
-/* Merged timer7_sync_mux into timer7 */
-DEFINE_CLK_OMAP_MUX_GATE(timer7_fck, "abe_clkdm", timer5_sync_mux_sel,
-                         OMAP4430_CM1_ABE_TIMER7_CLKCTRL, OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM1_ABE_TIMER7_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         timer5_fck_parents, dmic_fck_ops);
-
-/* Merged timer8_sync_mux into timer8 */
-DEFINE_CLK_OMAP_MUX_GATE(timer8_fck, "abe_clkdm", timer5_sync_mux_sel,
-                         OMAP4430_CM1_ABE_TIMER8_CLKCTRL, OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM1_ABE_TIMER8_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         timer5_fck_parents, dmic_fck_ops);
-
-/* Merged cm2_dm9_mux into timer9 */
-DEFINE_CLK_OMAP_MUX_GATE(timer9_fck, "l4_per_clkdm", dmt1_clk_mux_sel,
-                         OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL,
-                         OMAP4430_CLKSEL_MASK,
-                         OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL,
-                         OMAP4430_MODULEMODE_SWCTRL_SHIFT, NULL,
-                         abe_dpll_bypass_clk_mux_ck_parents, dmic_fck_ops);
-
-DEFINE_CLK_GATE(uart1_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_UART1_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
+DEFINE_CLK_OMAP_MUX(timer5_sync_mux, "abe_clkdm", timer5_sync_mux_sel,
+                    OMAP4430_CM1_ABE_TIMER5_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    timer5_sync_mux_parents, func_dmic_abe_gfclk_ops);
 
-DEFINE_CLK_GATE(uart2_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_UART2_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
+DEFINE_CLK_OMAP_MUX(timer6_sync_mux, "abe_clkdm", timer5_sync_mux_sel,
+                    OMAP4430_CM1_ABE_TIMER6_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    timer5_sync_mux_parents, func_dmic_abe_gfclk_ops);
 
-DEFINE_CLK_GATE(uart3_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_UART3_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
+DEFINE_CLK_OMAP_MUX(timer7_sync_mux, "abe_clkdm", timer5_sync_mux_sel,
+                    OMAP4430_CM1_ABE_TIMER7_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    timer5_sync_mux_parents, func_dmic_abe_gfclk_ops);
 
-DEFINE_CLK_GATE(uart4_fck, "func_48m_fclk", &func_48m_fclk, 0x0,
-                OMAP4430_CM_L4PER_UART4_CLKCTRL,
-                OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
+DEFINE_CLK_OMAP_MUX(timer8_sync_mux, "abe_clkdm", timer5_sync_mux_sel,
+                    OMAP4430_CM1_ABE_TIMER8_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    timer5_sync_mux_parents, func_dmic_abe_gfclk_ops);
+
+DEFINE_CLK_OMAP_MUX(cm2_dm9_mux, "l4_per_clkdm", dmt1_clk_mux_sel,
+                    OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, OMAP4430_CLKSEL_MASK,
+                    abe_dpll_bypass_clk_mux_ck_parents,
+                    func_dmic_abe_gfclk_ops);
 
 static struct clk usb_host_fs_fck;
 
@@ -1512,18 +1255,6 @@ DEFINE_CLK_GATE(usim_fclk, "usim_ck", &usim_ck, 0x0,
                 OMAP4430_CM_WKUP_USIM_CLKCTRL, OMAP4430_OPTFCLKEN_FCLK_SHIFT,
                 0x0, NULL);
 
-DEFINE_CLK_GATE(usim_fck, "sys_32k_ck", &sys_32k_ck, 0x0,
-                OMAP4430_CM_WKUP_USIM_CLKCTRL, OMAP4430_MODULEMODE_HWCTRL_SHIFT,
-                0x0, NULL);
-
-DEFINE_CLK_GATE(wd_timer2_fck, "sys_32k_ck", &sys_32k_ck, 0x0,
-                OMAP4430_CM_WKUP_WDT2_CLKCTRL, OMAP4430_MODULEMODE_SWCTRL_SHIFT,
-                0x0, NULL);
-
-DEFINE_CLK_GATE(wd_timer3_fck, "sys_32k_ck", &sys_32k_ck, 0x0,
-                OMAP4430_CM1_ABE_WDT3_CLKCTRL, OMAP4430_MODULEMODE_SWCTRL_SHIFT,
-                0x0, NULL);
-
 /* Remaining optional clocks */
 static const char *pmd_stm_clock_mux_ck_parents[] = {
         "sys_clkin_ck", "dpll_core_m6x2_ck", "tie_low_clock_ck",
@@ -1774,106 +1505,61 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "syc_clk_div_ck",               &syc_clk_div_ck,        CK_443X),
         CLK(NULL,       "aes1_fck",                     &aes1_fck,      CK_443X),
         CLK(NULL,       "aes2_fck",                     &aes2_fck,      CK_443X),
-        CLK(NULL,       "aess_fck",                     &aess_fck,      CK_443X),
         CLK(NULL,       "bandgap_fclk",                 &bandgap_fclk,  CK_443X),
         CLK(NULL,       "div_ts_ck",                    &div_ts_ck,     CK_446X),
         CLK(NULL,       "bandgap_ts_fclk",              &bandgap_ts_fclk,       CK_446X),
-        CLK(NULL,       "des3des_fck",                  &des3des_fck,   CK_443X),
         CLK(NULL,       "dmic_sync_mux_ck",             &dmic_sync_mux_ck,      CK_443X),
-        CLK(NULL,       "dmic_fck",                     &dmic_fck,      CK_443X),
-        CLK(NULL,       "dsp_fck",                      &dsp_fck,       CK_443X),
+        CLK(NULL,       "func_dmic_abe_gfclk",                  &func_dmic_abe_gfclk,   CK_443X),
         CLK(NULL,       "dss_sys_clk",                  &dss_sys_clk,   CK_443X),
         CLK(NULL,       "dss_tv_clk",                   &dss_tv_clk,    CK_443X),
         CLK(NULL,       "dss_dss_clk",                  &dss_dss_clk,   CK_443X),
         CLK(NULL,       "dss_48mhz_clk",                &dss_48mhz_clk, CK_443X),
         CLK(NULL,       "dss_fck",                      &dss_fck,       CK_443X),
         CLK("omapdss_dss",      "ick",                  &dss_fck,       CK_443X),
-        CLK(NULL,       "efuse_ctrl_cust_fck",          &efuse_ctrl_cust_fck,   CK_443X),
-        CLK(NULL,       "emif1_fck",                    &emif1_fck,     CK_443X),
-        CLK(NULL,       "emif2_fck",                    &emif2_fck,     CK_443X),
         CLK(NULL,       "fdif_fck",                     &fdif_fck,      CK_443X),
-        CLK(NULL,       "fpka_fck",                     &fpka_fck,      CK_443X),
         CLK(NULL,       "gpio1_dbclk",                  &gpio1_dbclk,   CK_443X),
-        CLK(NULL,       "gpio1_ick",                    &gpio1_ick,     CK_443X),
         CLK(NULL,       "gpio2_dbclk",                  &gpio2_dbclk,   CK_443X),
-        CLK(NULL,       "gpio2_ick",                    &gpio2_ick,     CK_443X),
         CLK(NULL,       "gpio3_dbclk",                  &gpio3_dbclk,   CK_443X),
-        CLK(NULL,       "gpio3_ick",                    &gpio3_ick,     CK_443X),
         CLK(NULL,       "gpio4_dbclk",                  &gpio4_dbclk,   CK_443X),
-        CLK(NULL,       "gpio4_ick",                    &gpio4_ick,     CK_443X),
         CLK(NULL,       "gpio5_dbclk",                  &gpio5_dbclk,   CK_443X),
-        CLK(NULL,       "gpio5_ick",                    &gpio5_ick,     CK_443X),
         CLK(NULL,       "gpio6_dbclk",                  &gpio6_dbclk,   CK_443X),
-        CLK(NULL,       "gpio6_ick",                    &gpio6_ick,     CK_443X),
-        CLK(NULL,       "gpmc_ick",                     &gpmc_ick,      CK_443X),
-        CLK(NULL,       "gpu_fck",                      &gpu_fck,       CK_443X),
-        CLK(NULL,       "hdq1w_fck",                    &hdq1w_fck,     CK_443X),
+        CLK(NULL,       "sgx_clk_mux",                  &sgx_clk_mux,   CK_443X),
         CLK(NULL,       "hsi_fck",                      &hsi_fck,       CK_443X),
-        CLK(NULL,       "i2c1_fck",                     &i2c1_fck,      CK_443X),
-        CLK(NULL,       "i2c2_fck",                     &i2c2_fck,      CK_443X),
-        CLK(NULL,       "i2c3_fck",                     &i2c3_fck,      CK_443X),
-        CLK(NULL,       "i2c4_fck",                     &i2c4_fck,      CK_443X),
-        CLK(NULL,       "ipu_fck",                      &ipu_fck,       CK_443X),
         CLK(NULL,       "iss_ctrlclk",                  &iss_ctrlclk,   CK_443X),
-        CLK(NULL,       "iss_fck",                      &iss_fck,       CK_443X),
-        CLK(NULL,       "iva_fck",                      &iva_fck,       CK_443X),
-        CLK(NULL,       "kbd_fck",                      &kbd_fck,       CK_443X),
-        CLK(NULL,       "l3_instr_ick",                 &l3_instr_ick,  CK_443X),
-        CLK(NULL,       "l3_main_3_ick",                &l3_main_3_ick, CK_443X),
         CLK(NULL,       "mcasp_sync_mux_ck",            &mcasp_sync_mux_ck,     CK_443X),
-        CLK(NULL,       "mcasp_fck",                    &mcasp_fck,     CK_443X),
+        CLK(NULL,       "func_mcasp_abe_gfclk",                 &func_mcasp_abe_gfclk,  CK_443X),
         CLK(NULL,       "mcbsp1_sync_mux_ck",           &mcbsp1_sync_mux_ck,    CK_443X),
-        CLK(NULL,       "mcbsp1_fck",                   &mcbsp1_fck,    CK_443X),
+        CLK(NULL,       "func_mcbsp1_gfclk",                    &func_mcbsp1_gfclk,     CK_443X),
         CLK(NULL,       "mcbsp2_sync_mux_ck",           &mcbsp2_sync_mux_ck,    CK_443X),
-        CLK(NULL,       "mcbsp2_fck",                   &mcbsp2_fck,    CK_443X),
+        CLK(NULL,       "func_mcbsp2_gfclk",                    &func_mcbsp2_gfclk,     CK_443X),
         CLK(NULL,       "mcbsp3_sync_mux_ck",           &mcbsp3_sync_mux_ck,    CK_443X),
-        CLK(NULL,       "mcbsp3_fck",                   &mcbsp3_fck,    CK_443X),
+        CLK(NULL,       "func_mcbsp3_gfclk",                    &func_mcbsp3_gfclk,     CK_443X),
         CLK(NULL,       "mcbsp4_sync_mux_ck",           &mcbsp4_sync_mux_ck,    CK_443X),
-        CLK(NULL,       "mcbsp4_fck",                   &mcbsp4_fck,    CK_443X),
-        CLK(NULL,       "mcpdm_fck",                    &mcpdm_fck,     CK_443X),
-        CLK(NULL,       "mcspi1_fck",                   &mcspi1_fck,    CK_443X),
-        CLK(NULL,       "mcspi2_fck",                   &mcspi2_fck,    CK_443X),
-        CLK(NULL,       "mcspi3_fck",                   &mcspi3_fck,    CK_443X),
-        CLK(NULL,       "mcspi4_fck",                   &mcspi4_fck,    CK_443X),
-        CLK(NULL,       "mmc1_fck",                     &mmc1_fck,      CK_443X),
-        CLK(NULL,       "mmc2_fck",                     &mmc2_fck,      CK_443X),
-        CLK(NULL,       "mmc3_fck",                     &mmc3_fck,      CK_443X),
-        CLK(NULL,       "mmc4_fck",                     &mmc4_fck,      CK_443X),
-        CLK(NULL,       "mmc5_fck",                     &mmc5_fck,      CK_443X),
-        CLK(NULL,       "ocp2scp_usb_phy_phy_48m",      &ocp2scp_usb_phy_phy_48m,       CK_443X),
-        CLK(NULL,       "ocp2scp_usb_phy_ick",          &ocp2scp_usb_phy_ick,   CK_443X),
-        CLK(NULL,       "ocp_wp_noc_ick",               &ocp_wp_noc_ick,        CK_443X),
-        CLK(NULL,       "rng_ick",                      &rng_ick,       CK_443X),
-        CLK("omap_rng", "ick",                          &rng_ick,       CK_443X),
+        CLK(NULL,       "per_mcbsp4_gfclk",                     &per_mcbsp4_gfclk,      CK_443X),
+        CLK(NULL,       "hsmmc1_fclk",                  &hsmmc1_fclk,   CK_443X),
+        CLK(NULL,       "hsmmc2_fclk",                  &hsmmc2_fclk,   CK_443X),
         CLK(NULL,       "sha2md5_fck",                  &sha2md5_fck,   CK_443X),
-        CLK(NULL,       "sl2if_ick",                    &sl2if_ick,     CK_443X),
         CLK(NULL,       "slimbus1_fclk_1",              &slimbus1_fclk_1,       CK_443X),
         CLK(NULL,       "slimbus1_fclk_0",              &slimbus1_fclk_0,       CK_443X),
         CLK(NULL,       "slimbus1_fclk_2",              &slimbus1_fclk_2,       CK_443X),
         CLK(NULL,       "slimbus1_slimbus_clk",         &slimbus1_slimbus_clk,  CK_443X),
-        CLK(NULL,       "slimbus1_fck",                 &slimbus1_fck,  CK_443X),
         CLK(NULL,       "slimbus2_fclk_1",              &slimbus2_fclk_1,       CK_443X),
         CLK(NULL,       "slimbus2_fclk_0",              &slimbus2_fclk_0,       CK_443X),
         CLK(NULL,       "slimbus2_slimbus_clk",         &slimbus2_slimbus_clk,  CK_443X),
-        CLK(NULL,       "slimbus2_fck",                 &slimbus2_fck,  CK_443X),
         CLK(NULL,       "smartreflex_core_fck",         &smartreflex_core_fck,  CK_443X),
         CLK(NULL,       "smartreflex_iva_fck",          &smartreflex_iva_fck,   CK_443X),
         CLK(NULL,       "smartreflex_mpu_fck",          &smartreflex_mpu_fck,   CK_443X),
-        CLK(NULL,       "timer1_fck",                   &timer1_fck,    CK_443X),
-        CLK(NULL,       "timer10_fck",                  &timer10_fck,   CK_443X),
-        CLK(NULL,       "timer11_fck",                  &timer11_fck,   CK_443X),
-        CLK(NULL,       "timer2_fck",                   &timer2_fck,    CK_443X),
-        CLK(NULL,       "timer3_fck",                   &timer3_fck,    CK_443X),
-        CLK(NULL,       "timer4_fck",                   &timer4_fck,    CK_443X),
-        CLK(NULL,       "timer5_fck",                   &timer5_fck,    CK_443X),
-        CLK(NULL,       "timer6_fck",                   &timer6_fck,    CK_443X),
-        CLK(NULL,       "timer7_fck",                   &timer7_fck,    CK_443X),
-        CLK(NULL,       "timer8_fck",                   &timer8_fck,    CK_443X),
-        CLK(NULL,       "timer9_fck",                   &timer9_fck,    CK_443X),
-        CLK(NULL,       "uart1_fck",                    &uart1_fck,     CK_443X),
-        CLK(NULL,       "uart2_fck",                    &uart2_fck,     CK_443X),
-        CLK(NULL,       "uart3_fck",                    &uart3_fck,     CK_443X),
-        CLK(NULL,       "uart4_fck",                    &uart4_fck,     CK_443X),
+        CLK(NULL,       "dmt1_clk_mux",                 &dmt1_clk_mux,  CK_443X),
+        CLK(NULL,       "cm2_dm10_mux",                 &cm2_dm10_mux,  CK_443X),
+        CLK(NULL,       "cm2_dm11_mux",                 &cm2_dm11_mux,  CK_443X),
+        CLK(NULL,       "cm2_dm2_mux",                  &cm2_dm2_mux,   CK_443X),
+        CLK(NULL,       "cm2_dm3_mux",                  &cm2_dm3_mux,   CK_443X),
+        CLK(NULL,       "cm2_dm4_mux",                  &cm2_dm4_mux,   CK_443X),
+        CLK(NULL,       "timer5_sync_mux",              &timer5_sync_mux,       CK_443X),
+        CLK(NULL,       "timer6_sync_mux",                      &timer6_sync_mux,       CK_443X),
+        CLK(NULL,       "timer7_sync_mux",                      &timer7_sync_mux,       CK_443X),
+        CLK(NULL,       "timer8_sync_mux",                      &timer8_sync_mux,       CK_443X),
+        CLK(NULL,       "cm2_dm9_mux",                  &cm2_dm9_mux,   CK_443X),
         CLK(NULL,       "usb_host_fs_fck",              &usb_host_fs_fck,       CK_443X),
         CLK("usbhs_omap",       "fs_fck",               &usb_host_fs_fck,       CK_443X),
         CLK(NULL,       "utmi_p1_gfclk",                &utmi_p1_gfclk, CK_443X),
@@ -1901,9 +1587,6 @@ static struct omap_clk omap44xx_clks[] = {
         CLK("usbhs_tll",        "usbtll_ick",           &usb_tll_hs_ick,        CK_443X),
         CLK(NULL,       "usim_ck",                      &usim_ck,       CK_443X),
         CLK(NULL,       "usim_fclk",                    &usim_fclk,     CK_443X),
-        CLK(NULL,       "usim_fck",                     &usim_fck,      CK_443X),
-        CLK(NULL,       "wd_timer2_fck",                &wd_timer2_fck, CK_443X),
-        CLK(NULL,       "wd_timer3_fck",                &wd_timer3_fck, CK_443X),
         CLK(NULL,       "pmd_stm_clock_mux_ck",         &pmd_stm_clock_mux_ck,  CK_443X),
         CLK(NULL,       "pmd_trace_clk_mux_ck",         &pmd_trace_clk_mux_ck,  CK_443X),
         CLK(NULL,       "stm_clk_div_ck",               &stm_clk_div_ck,        CK_443X),
@@ -1980,15 +1663,6 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "cpufreq_ck",   &dpll_mpu_ck,   CK_443X),
 };
 
-static const char *enable_init_clks[] = {
-        "emif1_fck",
-        "emif2_fck",
-        "gpmc_ick",
-        "l3_instr_ick",
-        "l3_main_3_ick",
-        "ocp_wp_noc_ick",
-};
-
 int __init omap4xxx_clk_init(void)
 {
         u32 cpu_clkflg;
@@ -2019,9 +1693,6 @@ int __init omap4xxx_clk_init(void)
 
         omap2_clk_disable_autoidle_all();
 
-        omap2_clk_enable_init_clocks(enable_init_clks,
-                                     ARRAY_SIZE(enable_init_clks));
-
         /*
          * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power
          * state when turning the ABE clock domain. Workaround this by
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index b40204837bd7..60ddd8612b4d 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -65,6 +65,17 @@ struct clockdomain;
                 .ops = &_clkops_name,                           \
         };
 
+#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name,      \
+                                _clkops_name, _flags)           \
+        static struct clk _name = {                             \
+                .name = #_name,                                 \
+                .hw = &_name##_hw.hw,                           \
+                .parent_names = _parent_array_name,             \
+                .num_parents = ARRAY_SIZE(_parent_array_name),  \
+                .ops = &_clkops_name,                           \
+                .flags = _flags,                                \
+        };
+
 #define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name)           \
         static struct clk_hw_omap _name##_hw = {                \
                 .hw = {                                         \
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 1ff646908627..b870f6a9e283 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -52,6 +52,6 @@ static int __init omap2xxx_clk_arch_init(void)
         return ret;
 }
 
-arch_initcall(omap2xxx_clk_arch_init);
+omap_arch_initcall(omap2xxx_clk_arch_init);
 
 
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 4eacab8f1176..0b02b4161d71 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -94,6 +94,6 @@ static int __init omap3xxx_clk_arch_init(void)
         return ret;
 }
 
-arch_initcall(omap3xxx_clk_arch_init);
+omap_arch_initcall(omap3xxx_clk_arch_init);
 
 
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 7faf82d4e85c..2da3b5ec010c 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -92,8 +92,6 @@ static int _clkdm_register(struct clockdomain *clkdm)
 
         pwrdm_add_clkdm(pwrdm, clkdm);
 
-        spin_lock_init(&clkdm->lock);
-
         pr_debug("clockdomain: registered %s\n", clkdm->name);
 
         return 0;
@@ -122,7 +120,7 @@ static struct clkdm_dep *_clkdm_deps_lookup(struct clockdomain *clkdm,
         return cd;
 }
 
-/*
+/**
  * _autodep_lookup - resolve autodep clkdm names to clkdm pointers; store
  * @autodep: struct clkdm_autodep * to resolve
  *
@@ -154,88 +152,206 @@ static void _autodep_lookup(struct clkdm_autodep *autodep)
         autodep->clkdm.ptr = clkdm;
 }
 
-/*
- * _clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable
- * @clkdm: struct clockdomain *
+/**
+ * _resolve_clkdm_deps() - resolve clkdm_names in @clkdm_deps to clkdms
+ * @clkdm: clockdomain that we are resolving dependencies for
+ * @clkdm_deps: ptr to array of struct clkdm_deps to resolve
  *
- * Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm'
- * in hardware-supervised mode.  Meant to be called from clock framework
- * when a clock inside clockdomain 'clkdm' is enabled.  No return value.
+ * Iterates through @clkdm_deps, looking up the struct clockdomain named by
+ * clkdm_name and storing the clockdomain pointer in the struct clkdm_dep.
+ * No return value.
+ */
+static void _resolve_clkdm_deps(struct clockdomain *clkdm,
+                                struct clkdm_dep *clkdm_deps)
+{
+        struct clkdm_dep *cd;
+
+        for (cd = clkdm_deps; cd && cd->clkdm_name; cd++) {
+                if (cd->clkdm)
+                        continue;
+                cd->clkdm = _clkdm_lookup(cd->clkdm_name);
+
+                WARN(!cd->clkdm, "clockdomain: %s: could not find clkdm %s while resolving dependencies - should never happen",
+                     clkdm->name, cd->clkdm_name);
+        }
+}
+
+/**
+ * _clkdm_add_wkdep - add a wakeup dependency from clkdm2 to clkdm1 (lockless)
+ * @clkdm1: wake this struct clockdomain * up (dependent)
+ * @clkdm2: when this struct clockdomain * wakes up (source)
  *
- * XXX autodeps are deprecated and should be removed at the earliest
- * opportunity
+ * When the clockdomain represented by @clkdm2 wakes up, wake up
+ * @clkdm1. Implemented in hardware on the OMAP, this feature is
+ * designed to reduce wakeup latency of the dependent clockdomain @clkdm1.
+ * Returns -EINVAL if presented with invalid clockdomain pointers,
+ * -ENOENT if @clkdm2 cannot wake up clkdm1 in hardware, or 0 upon
+ * success.
  */
-void _clkdm_add_autodeps(struct clockdomain *clkdm)
+static int _clkdm_add_wkdep(struct clockdomain *clkdm1,
+                            struct clockdomain *clkdm2)
 {
-        struct clkdm_autodep *autodep;
+        struct clkdm_dep *cd;
+        int ret = 0;
 
-        if (!autodeps || clkdm->flags & CLKDM_NO_AUTODEPS)
-                return;
+        if (!clkdm1 || !clkdm2)
+                return -EINVAL;
 
-        for (autodep = autodeps; autodep->clkdm.ptr; autodep++) {
-                if (IS_ERR(autodep->clkdm.ptr))
-                        continue;
+        cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
+        if (IS_ERR(cd))
+                ret = PTR_ERR(cd);
 
-                pr_debug("clockdomain: %s: adding %s sleepdep/wkdep\n",
-                         clkdm->name, autodep->clkdm.ptr->name);
+        if (!arch_clkdm || !arch_clkdm->clkdm_add_wkdep)
+                ret = -EINVAL;
+
+        if (ret) {
+                pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n",
+                         clkdm1->name, clkdm2->name);
+                return ret;
+        }
+
+        cd->wkdep_usecount++;
+        if (cd->wkdep_usecount == 1) {
+                pr_debug("clockdomain: hardware will wake up %s when %s wakes up\n",
+                         clkdm1->name, clkdm2->name);
 
-                clkdm_add_sleepdep(clkdm, autodep->clkdm.ptr);
-                clkdm_add_wkdep(clkdm, autodep->clkdm.ptr);
+                ret = arch_clkdm->clkdm_add_wkdep(clkdm1, clkdm2);
         }
+
+        return ret;
 }
 
-/*
- * _clkdm_add_autodeps - remove auto sleepdeps/wkdeps from clkdm
- * @clkdm: struct clockdomain *
+/**
+ * _clkdm_del_wkdep - remove a wakeup dep from clkdm2 to clkdm1 (lockless)
+ * @clkdm1: wake this struct clockdomain * up (dependent)
+ * @clkdm2: when this struct clockdomain * wakes up (source)
  *
- * Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm'
- * in hardware-supervised mode.  Meant to be called from clock framework
- * when a clock inside clockdomain 'clkdm' is disabled.  No return value.
+ * Remove a wakeup dependency causing @clkdm1 to wake up when @clkdm2
+ * wakes up.  Returns -EINVAL if presented with invalid clockdomain
+ * pointers, -ENOENT if @clkdm2 cannot wake up clkdm1 in hardware, or
+ * 0 upon success.
+ */
+static int _clkdm_del_wkdep(struct clockdomain *clkdm1,
+                            struct clockdomain *clkdm2)
+{
+        struct clkdm_dep *cd;
+        int ret = 0;
+
+        if (!clkdm1 || !clkdm2)
+                return -EINVAL;
+
+        cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
+        if (IS_ERR(cd))
+                ret = PTR_ERR(cd);
+
+        if (!arch_clkdm || !arch_clkdm->clkdm_del_wkdep)
+                ret = -EINVAL;
+
+        if (ret) {
+                pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n",
+                         clkdm1->name, clkdm2->name);
+                return ret;
+        }
+
+        cd->wkdep_usecount--;
+        if (cd->wkdep_usecount == 0) {
+                pr_debug("clockdomain: hardware will no longer wake up %s after %s wakes up\n",
+                         clkdm1->name, clkdm2->name);
+
+                ret = arch_clkdm->clkdm_del_wkdep(clkdm1, clkdm2);
+        }
+
+        return ret;
+}
+
+/**
+ * _clkdm_add_sleepdep - add a sleep dependency from clkdm2 to clkdm1 (lockless)
+ * @clkdm1: prevent this struct clockdomain * from sleeping (dependent)
+ * @clkdm2: when this struct clockdomain * is active (source)
  *
- * XXX autodeps are deprecated and should be removed at the earliest
- * opportunity
+ * Prevent @clkdm1 from automatically going inactive (and then to
+ * retention or off) if @clkdm2 is active.  Returns -EINVAL if
+ * presented with invalid clockdomain pointers or called on a machine
+ * that does not support software-configurable hardware sleep
+ * dependencies, -ENOENT if the specified dependency cannot be set in
+ * hardware, or 0 upon success.
  */
-void _clkdm_del_autodeps(struct clockdomain *clkdm)
+static int _clkdm_add_sleepdep(struct clockdomain *clkdm1,
+                               struct clockdomain *clkdm2)
 {
-        struct clkdm_autodep *autodep;
+        struct clkdm_dep *cd;
+        int ret = 0;
 
-        if (!autodeps || clkdm->flags & CLKDM_NO_AUTODEPS)
-                return;
+        if (!clkdm1 || !clkdm2)
+                return -EINVAL;
 
-        for (autodep = autodeps; autodep->clkdm.ptr; autodep++) {
-                if (IS_ERR(autodep->clkdm.ptr))
-                        continue;
+        cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs);
+        if (IS_ERR(cd))
+                ret = PTR_ERR(cd);
 
-                pr_debug("clockdomain: %s: removing %s sleepdep/wkdep\n",
-                         clkdm->name, autodep->clkdm.ptr->name);
+        if (!arch_clkdm || !arch_clkdm->clkdm_add_sleepdep)
+                ret = -EINVAL;
 
-                clkdm_del_sleepdep(clkdm, autodep->clkdm.ptr);
-                clkdm_del_wkdep(clkdm, autodep->clkdm.ptr);
+        if (ret) {
+                pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n",
+                         clkdm1->name, clkdm2->name);
+                return ret;
+        }
+
+        cd->sleepdep_usecount++;
+        if (cd->sleepdep_usecount == 1) {
+                pr_debug("clockdomain: will prevent %s from sleeping if %s is active\n",
+                         clkdm1->name, clkdm2->name);
+
+                ret = arch_clkdm->clkdm_add_sleepdep(clkdm1, clkdm2);
         }
+
+        return ret;
 }
 
 /**
- * _resolve_clkdm_deps() - resolve clkdm_names in @clkdm_deps to clkdms
- * @clkdm: clockdomain that we are resolving dependencies for
- * @clkdm_deps: ptr to array of struct clkdm_deps to resolve
+ * _clkdm_del_sleepdep - remove a sleep dep from clkdm2 to clkdm1 (lockless)
+ * @clkdm1: prevent this struct clockdomain * from sleeping (dependent)
+ * @clkdm2: when this struct clockdomain * is active (source)
  *
- * Iterates through @clkdm_deps, looking up the struct clockdomain named by
- * clkdm_name and storing the clockdomain pointer in the struct clkdm_dep.
- * No return value.
+ * Allow @clkdm1 to automatically go inactive (and then to retention or
+ * off), independent of the activity state of @clkdm2.  Returns -EINVAL
+ * if presented with invalid clockdomain pointers or called on a machine
+ * that does not support software-configurable hardware sleep dependencies,
+ * -ENOENT if the specified dependency cannot be cleared in hardware, or
+ * 0 upon success.
  */
-static void _resolve_clkdm_deps(struct clockdomain *clkdm,
-                                struct clkdm_dep *clkdm_deps)
+static int _clkdm_del_sleepdep(struct clockdomain *clkdm1,
+                               struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
+        int ret = 0;
 
-        for (cd = clkdm_deps; cd && cd->clkdm_name; cd++) {
-                if (cd->clkdm)
-                        continue;
-                cd->clkdm = _clkdm_lookup(cd->clkdm_name);
+        if (!clkdm1 || !clkdm2)
+                return -EINVAL;
 
-                WARN(!cd->clkdm, "clockdomain: %s: could not find clkdm %s while resolving dependencies - should never happen",
-                     clkdm->name, cd->clkdm_name);
+        cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs);
+        if (IS_ERR(cd))
+                ret = PTR_ERR(cd);
+
+        if (!arch_clkdm || !arch_clkdm->clkdm_del_sleepdep)
+                ret = -EINVAL;
+
+        if (ret) {
+                pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n",
+                         clkdm1->name, clkdm2->name);
+                return ret;
         }
+
+        cd->sleepdep_usecount--;
+        if (cd->sleepdep_usecount == 0) {
+                pr_debug("clockdomain: will no longer prevent %s from sleeping if %s is active\n",
+                         clkdm1->name, clkdm2->name);
+
+                ret = arch_clkdm->clkdm_del_sleepdep(clkdm1, clkdm2);
+        }
+
+        return ret;
 }
 
 /* Public functions */
@@ -456,30 +572,18 @@ struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm)
 int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
-        int ret = 0;
+        int ret;
 
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
         cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
         if (IS_ERR(cd))
-                ret = PTR_ERR(cd);
+                return PTR_ERR(cd);
 
-        if (!arch_clkdm || !arch_clkdm->clkdm_add_wkdep)
-                ret = -EINVAL;
-
-        if (ret) {
-                pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n",
-                         clkdm1->name, clkdm2->name);
-                return ret;
-        }
-
-        if (atomic_inc_return(&cd->wkdep_usecount) == 1) {
-                pr_debug("clockdomain: hardware will wake up %s when %s wakes up\n",
-                         clkdm1->name, clkdm2->name);
-
-                ret = arch_clkdm->clkdm_add_wkdep(clkdm1, clkdm2);
-        }
+        pwrdm_lock(cd->clkdm->pwrdm.ptr);
+        ret = _clkdm_add_wkdep(clkdm1, clkdm2);
+        pwrdm_unlock(cd->clkdm->pwrdm.ptr);
 
         return ret;
 }
@@ -497,30 +601,18 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
-        int ret = 0;
+        int ret;
 
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
         cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
         if (IS_ERR(cd))
-                ret = PTR_ERR(cd);
+                return PTR_ERR(cd);
 
-        if (!arch_clkdm || !arch_clkdm->clkdm_del_wkdep)
-                ret = -EINVAL;
-
-        if (ret) {
-                pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n",
-                         clkdm1->name, clkdm2->name);
-                return ret;
-        }
-
-        if (atomic_dec_return(&cd->wkdep_usecount) == 0) {
-                pr_debug("clockdomain: hardware will no longer wake up %s after %s wakes up\n",
-                         clkdm1->name, clkdm2->name);
-
-                ret = arch_clkdm->clkdm_del_wkdep(clkdm1, clkdm2);
-        }
+        pwrdm_lock(cd->clkdm->pwrdm.ptr);
+        ret = _clkdm_del_wkdep(clkdm1, clkdm2);
+        pwrdm_unlock(cd->clkdm->pwrdm.ptr);
 
         return ret;
 }
@@ -560,7 +652,7 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
                 return ret;
         }
 
-        /* XXX It's faster to return the atomic wkdep_usecount */
+        /* XXX It's faster to return the wkdep_usecount */
         return arch_clkdm->clkdm_read_wkdep(clkdm1, clkdm2);
 }
 
@@ -600,30 +692,18 @@ int clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
 int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
-        int ret = 0;
+        int ret;
 
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
-        cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs);
+        cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
         if (IS_ERR(cd))
-                ret = PTR_ERR(cd);
+                return PTR_ERR(cd);
 
-        if (!arch_clkdm || !arch_clkdm->clkdm_add_sleepdep)
-                ret = -EINVAL;
-
-        if (ret) {
-                pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n",
-                         clkdm1->name, clkdm2->name);
-                return ret;
-        }
-
-        if (atomic_inc_return(&cd->sleepdep_usecount) == 1) {
-                pr_debug("clockdomain: will prevent %s from sleeping if %s is active\n",
-                         clkdm1->name, clkdm2->name);
-
-                ret = arch_clkdm->clkdm_add_sleepdep(clkdm1, clkdm2);
-        }
+        pwrdm_lock(cd->clkdm->pwrdm.ptr);
+        ret = _clkdm_add_sleepdep(clkdm1, clkdm2);
+        pwrdm_unlock(cd->clkdm->pwrdm.ptr);
 
         return ret;
 }
@@ -643,30 +723,18 @@ int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
 {
         struct clkdm_dep *cd;
-        int ret = 0;
+        int ret;
 
         if (!clkdm1 || !clkdm2)
                 return -EINVAL;
 
-        cd = _clkdm_deps_lookup(clkdm2, clkdm1->sleepdep_srcs);
+        cd = _clkdm_deps_lookup(clkdm2, clkdm1->wkdep_srcs);
         if (IS_ERR(cd))
-                ret = PTR_ERR(cd);
+                return PTR_ERR(cd);
 
-        if (!arch_clkdm || !arch_clkdm->clkdm_del_sleepdep)
-                ret = -EINVAL;
-
-        if (ret) {
-                pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n",
-                         clkdm1->name, clkdm2->name);
-                return ret;
-        }
-
-        if (atomic_dec_return(&cd->sleepdep_usecount) == 0) {
-                pr_debug("clockdomain: will no longer prevent %s from sleeping if %s is active\n",
-                         clkdm1->name, clkdm2->name);
-
-                ret = arch_clkdm->clkdm_del_sleepdep(clkdm1, clkdm2);
-        }
+        pwrdm_lock(cd->clkdm->pwrdm.ptr);
+        ret = _clkdm_del_sleepdep(clkdm1, clkdm2);
+        pwrdm_unlock(cd->clkdm->pwrdm.ptr);
 
         return ret;
 }
@@ -708,7 +776,7 @@ int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2)
                 return ret;
         }
 
-        /* XXX It's faster to return the atomic sleepdep_usecount */
+        /* XXX It's faster to return the sleepdep_usecount */
         return arch_clkdm->clkdm_read_sleepdep(clkdm1, clkdm2);
 }
 
@@ -734,18 +802,17 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
 }
 
 /**
- * clkdm_sleep - force clockdomain sleep transition
+ * clkdm_sleep_nolock - force clockdomain sleep transition (lockless)
  * @clkdm: struct clockdomain *
  *
  * Instruct the CM to force a sleep transition on the specified
- * clockdomain @clkdm.  Returns -EINVAL if @clkdm is NULL or if
- * clockdomain does not support software-initiated sleep; 0 upon
- * success.
+ * clockdomain @clkdm.  Only for use by the powerdomain code.  Returns
+ * -EINVAL if @clkdm is NULL or if clockdomain does not support
+ * software-initiated sleep; 0 upon success.
  */
-int clkdm_sleep(struct clockdomain *clkdm)
+int clkdm_sleep_nolock(struct clockdomain *clkdm)
 {
         int ret;
-        unsigned long flags;
 
         if (!clkdm)
                 return -EINVAL;
@@ -761,26 +828,45 @@ int clkdm_sleep(struct clockdomain *clkdm)
 
         pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name);
 
-        spin_lock_irqsave(&clkdm->lock, flags);
         clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
         ret = arch_clkdm->clkdm_sleep(clkdm);
-        spin_unlock_irqrestore(&clkdm->lock, flags);
+        ret |= pwrdm_state_switch_nolock(clkdm->pwrdm.ptr);
+
         return ret;
 }
 
 /**
- * clkdm_wakeup - force clockdomain wakeup transition
+ * clkdm_sleep - force clockdomain sleep transition
  * @clkdm: struct clockdomain *
  *
- * Instruct the CM to force a wakeup transition on the specified
- * clockdomain @clkdm.  Returns -EINVAL if @clkdm is NULL or if the
- * clockdomain does not support software-controlled wakeup; 0 upon
+ * Instruct the CM to force a sleep transition on the specified
+ * clockdomain @clkdm.  Returns -EINVAL if @clkdm is NULL or if
+ * clockdomain does not support software-initiated sleep; 0 upon
  * success.
  */
-int clkdm_wakeup(struct clockdomain *clkdm)
+int clkdm_sleep(struct clockdomain *clkdm)
+{
+        int ret;
+
+        pwrdm_lock(clkdm->pwrdm.ptr);
+        ret = clkdm_sleep_nolock(clkdm);
+        pwrdm_unlock(clkdm->pwrdm.ptr);
+
+        return ret;
+}
+
+/**
+ * clkdm_wakeup_nolock - force clockdomain wakeup transition (lockless)
+ * @clkdm: struct clockdomain *
+ *
+ * Instruct the CM to force a wakeup transition on the specified
+ * clockdomain @clkdm.  Only for use by the powerdomain code.  Returns
+ * -EINVAL if @clkdm is NULL or if the clockdomain does not support
+ * software-controlled wakeup; 0 upon success.
+ */
+int clkdm_wakeup_nolock(struct clockdomain *clkdm)
 {
         int ret;
-        unsigned long flags;
 
         if (!clkdm)
                 return -EINVAL;
@@ -796,28 +882,46 @@ int clkdm_wakeup(struct clockdomain *clkdm)
 
         pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name);
 
-        spin_lock_irqsave(&clkdm->lock, flags);
         clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
         ret = arch_clkdm->clkdm_wakeup(clkdm);
-        ret |= pwrdm_state_switch(clkdm->pwrdm.ptr);
-        spin_unlock_irqrestore(&clkdm->lock, flags);
+        ret |= pwrdm_state_switch_nolock(clkdm->pwrdm.ptr);
+
         return ret;
 }
 
 /**
- * clkdm_allow_idle - enable hwsup idle transitions for clkdm
+ * clkdm_wakeup - force clockdomain wakeup transition
  * @clkdm: struct clockdomain *
  *
- * Allow the hardware to automatically switch the clockdomain @clkdm into
- * active or idle states, as needed by downstream clocks.  If the
+ * Instruct the CM to force a wakeup transition on the specified
+ * clockdomain @clkdm.  Returns -EINVAL if @clkdm is NULL or if the
+ * clockdomain does not support software-controlled wakeup; 0 upon
+ * success.
+ */
+int clkdm_wakeup(struct clockdomain *clkdm)
+{
+        int ret;
+
+        pwrdm_lock(clkdm->pwrdm.ptr);
+        ret = clkdm_wakeup_nolock(clkdm);
+        pwrdm_unlock(clkdm->pwrdm.ptr);
+
+        return ret;
+}
+
+/**
+ * clkdm_allow_idle_nolock - enable hwsup idle transitions for clkdm
+ * @clkdm: struct clockdomain *
+ *
+ * Allow the hardware to automatically switch the clockdomain @clkdm
+ * into active or idle states, as needed by downstream clocks.  If the
  * clockdomain has any downstream clocks enabled in the clock
  * framework, wkdep/sleepdep autodependencies are added; this is so
- * device drivers can read and write to the device.  No return value.
+ * device drivers can read and write to the device.  Only for use by
+ * the powerdomain code.  No return value.
  */
-void clkdm_allow_idle(struct clockdomain *clkdm)
+void clkdm_allow_idle_nolock(struct clockdomain *clkdm)
 {
-        unsigned long flags;
-
         if (!clkdm)
                 return;
 
@@ -833,11 +937,26 @@ void clkdm_allow_idle(struct clockdomain *clkdm)
         pr_debug("clockdomain: enabling automatic idle transitions for %s\n",
                  clkdm->name);
 
-        spin_lock_irqsave(&clkdm->lock, flags);
         clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED;
         arch_clkdm->clkdm_allow_idle(clkdm);
-        pwrdm_state_switch(clkdm->pwrdm.ptr);
-        spin_unlock_irqrestore(&clkdm->lock, flags);
+        pwrdm_state_switch_nolock(clkdm->pwrdm.ptr);
+}
+
+/**
+ * clkdm_allow_idle - enable hwsup idle transitions for clkdm
+ * @clkdm: struct clockdomain *
+ *
+ * Allow the hardware to automatically switch the clockdomain @clkdm into
+ * active or idle states, as needed by downstream clocks.  If the
+ * clockdomain has any downstream clocks enabled in the clock
+ * framework, wkdep/sleepdep autodependencies are added; this is so
+ * device drivers can read and write to the device.  No return value.
+ */
+void clkdm_allow_idle(struct clockdomain *clkdm)
+{
+        pwrdm_lock(clkdm->pwrdm.ptr);
+        clkdm_allow_idle_nolock(clkdm);
+        pwrdm_unlock(clkdm->pwrdm.ptr);
 }
 
 /**
@@ -847,12 +966,11 @@ void clkdm_allow_idle(struct clockdomain *clkdm)
  * Prevent the hardware from automatically switching the clockdomain
  * @clkdm into inactive or idle states.  If the clockdomain has
  * downstream clocks enabled in the clock framework, wkdep/sleepdep
- * autodependencies are removed.  No return value.
+ * autodependencies are removed.  Only for use by the powerdomain
+ * code.  No return value.
  */
-void clkdm_deny_idle(struct clockdomain *clkdm)
+void clkdm_deny_idle_nolock(struct clockdomain *clkdm)
 {
-        unsigned long flags;
-
         if (!clkdm)
                 return;
 
@@ -868,11 +986,25 @@ void clkdm_deny_idle(struct clockdomain *clkdm)
         pr_debug("clockdomain: disabling automatic idle transitions for %s\n",
                  clkdm->name);
 
-        spin_lock_irqsave(&clkdm->lock, flags);
         clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
         arch_clkdm->clkdm_deny_idle(clkdm);
-        pwrdm_state_switch(clkdm->pwrdm.ptr);
-        spin_unlock_irqrestore(&clkdm->lock, flags);
+        pwrdm_state_switch_nolock(clkdm->pwrdm.ptr);
+}
+
+/**
+ * clkdm_deny_idle - disable hwsup idle transitions for clkdm
+ * @clkdm: struct clockdomain *
+ *
+ * Prevent the hardware from automatically switching the clockdomain
+ * @clkdm into inactive or idle states.  If the clockdomain has
+ * downstream clocks enabled in the clock framework, wkdep/sleepdep
+ * autodependencies are removed.  No return value.
+ */
+void clkdm_deny_idle(struct clockdomain *clkdm)
+{
+        pwrdm_lock(clkdm->pwrdm.ptr);
+        clkdm_deny_idle_nolock(clkdm);
+        pwrdm_unlock(clkdm->pwrdm.ptr);
 }
 
 /**
@@ -889,14 +1021,11 @@ void clkdm_deny_idle(struct clockdomain *clkdm)
 bool clkdm_in_hwsup(struct clockdomain *clkdm)
 {
         bool ret;
-        unsigned long flags;
 
         if (!clkdm)
                 return false;
 
-        spin_lock_irqsave(&clkdm->lock, flags);
         ret = (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false;
-        spin_unlock_irqrestore(&clkdm->lock, flags);
 
         return ret;
 }
@@ -918,30 +1047,91 @@ bool clkdm_missing_idle_reporting(struct clockdomain *clkdm)
         return (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) ? true : false;
 }
 
+/* Public autodep handling functions (deprecated) */
+
+/**
+ * clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable
+ * @clkdm: struct clockdomain *
+ *
+ * Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm'
+ * in hardware-supervised mode.  Meant to be called from clock framework
+ * when a clock inside clockdomain 'clkdm' is enabled.  No return value.
+ *
+ * XXX autodeps are deprecated and should be removed at the earliest
+ * opportunity
+ */
+void clkdm_add_autodeps(struct clockdomain *clkdm)
+{
+        struct clkdm_autodep *autodep;
+
+        if (!autodeps || clkdm->flags & CLKDM_NO_AUTODEPS)
+                return;
+
+        for (autodep = autodeps; autodep->clkdm.ptr; autodep++) {
+                if (IS_ERR(autodep->clkdm.ptr))
+                        continue;
+
+                pr_debug("clockdomain: %s: adding %s sleepdep/wkdep\n",
+                         clkdm->name, autodep->clkdm.ptr->name);
+
+                _clkdm_add_sleepdep(clkdm, autodep->clkdm.ptr);
+                _clkdm_add_wkdep(clkdm, autodep->clkdm.ptr);
+        }
+}
+
+/**
+ * clkdm_del_autodeps - remove auto sleepdeps/wkdeps from clkdm
+ * @clkdm: struct clockdomain *
+ *
+ * Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm'
+ * in hardware-supervised mode.  Meant to be called from clock framework
+ * when a clock inside clockdomain 'clkdm' is disabled.  No return value.
+ *
+ * XXX autodeps are deprecated and should be removed at the earliest
+ * opportunity
+ */
+void clkdm_del_autodeps(struct clockdomain *clkdm)
+{
+        struct clkdm_autodep *autodep;
+
+        if (!autodeps || clkdm->flags & CLKDM_NO_AUTODEPS)
+                return;
+
+        for (autodep = autodeps; autodep->clkdm.ptr; autodep++) {
+                if (IS_ERR(autodep->clkdm.ptr))
+                        continue;
+
+                pr_debug("clockdomain: %s: removing %s sleepdep/wkdep\n",
+                         clkdm->name, autodep->clkdm.ptr->name);
+
+                _clkdm_del_sleepdep(clkdm, autodep->clkdm.ptr);
+                _clkdm_del_wkdep(clkdm, autodep->clkdm.ptr);
+        }
+}
+
 /* Clockdomain-to-clock/hwmod framework interface code */
 
 static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
 {
-        unsigned long flags;
-
         if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable)
                 return -EINVAL;
 
-        spin_lock_irqsave(&clkdm->lock, flags);
+        pwrdm_lock(clkdm->pwrdm.ptr);
 
         /*
          * For arch's with no autodeps, clkcm_clk_enable
          * should be called for every clock instance or hwmod that is
          * enabled, so the clkdm can be force woken up.
          */
-        if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) {
-                spin_unlock_irqrestore(&clkdm->lock, flags);
+        clkdm->usecount++;
+        if (clkdm->usecount > 1 && autodeps) {
+                pwrdm_unlock(clkdm->pwrdm.ptr);
                 return 0;
         }
 
         arch_clkdm->clkdm_clk_enable(clkdm);
-        pwrdm_state_switch(clkdm->pwrdm.ptr);
-        spin_unlock_irqrestore(&clkdm->lock, flags);
+        pwrdm_state_switch_nolock(clkdm->pwrdm.ptr);
+        pwrdm_unlock(clkdm->pwrdm.ptr);
 
         pr_debug("clockdomain: %s: enabled\n", clkdm->name);
 
@@ -990,36 +1180,34 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
  */
 int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
 {
-        unsigned long flags;
-
         if (!clkdm || !clk || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
                 return -EINVAL;
 
-        spin_lock_irqsave(&clkdm->lock, flags);
+        pwrdm_lock(clkdm->pwrdm.ptr);
 
         /* corner case: disabling unused clocks */
-        if ((__clk_get_enable_count(clk) == 0) &&
-            (atomic_read(&clkdm->usecount) == 0))
+        if ((__clk_get_enable_count(clk) == 0) && clkdm->usecount == 0)
                 goto ccd_exit;
 
-        if (atomic_read(&clkdm->usecount) == 0) {
-                spin_unlock_irqrestore(&clkdm->lock, flags);
+        if (clkdm->usecount == 0) {
+                pwrdm_unlock(clkdm->pwrdm.ptr);
                 WARN_ON(1); /* underflow */
                 return -ERANGE;
         }
 
-        if (atomic_dec_return(&clkdm->usecount) > 0) {
-                spin_unlock_irqrestore(&clkdm->lock, flags);
+        clkdm->usecount--;
+        if (clkdm->usecount > 0) {
+                pwrdm_unlock(clkdm->pwrdm.ptr);
                 return 0;
         }
 
         arch_clkdm->clkdm_clk_disable(clkdm);
-        pwrdm_state_switch(clkdm->pwrdm.ptr);
+        pwrdm_state_switch_nolock(clkdm->pwrdm.ptr);
 
         pr_debug("clockdomain: %s: disabled\n", clkdm->name);
 
 ccd_exit:
-        spin_unlock_irqrestore(&clkdm->lock, flags);
+        pwrdm_unlock(clkdm->pwrdm.ptr);
 
         return 0;
 }
@@ -1072,8 +1260,6 @@ int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh)
  */
 int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh)
 {
-        unsigned long flags;
-
         /* The clkdm attribute does not exist yet prior OMAP4 */
         if (cpu_is_omap24xx() || cpu_is_omap34xx())
                 return 0;
@@ -1086,22 +1272,23 @@ int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh)
         if (!clkdm || !oh || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
                 return -EINVAL;
 
-        spin_lock_irqsave(&clkdm->lock, flags);
+        pwrdm_lock(clkdm->pwrdm.ptr);
 
-        if (atomic_read(&clkdm->usecount) == 0) {
-                spin_unlock_irqrestore(&clkdm->lock, flags);
+        if (clkdm->usecount == 0) {
+                pwrdm_unlock(clkdm->pwrdm.ptr);
                 WARN_ON(1); /* underflow */
                 return -ERANGE;
         }
 
-        if (atomic_dec_return(&clkdm->usecount) > 0) {
-                spin_unlock_irqrestore(&clkdm->lock, flags);
+        clkdm->usecount--;
+        if (clkdm->usecount > 0) {
+                pwrdm_unlock(clkdm->pwrdm.ptr);
                 return 0;
         }
 
         arch_clkdm->clkdm_clk_disable(clkdm);
-        pwrdm_state_switch(clkdm->pwrdm.ptr);
-        spin_unlock_irqrestore(&clkdm->lock, flags);
+        pwrdm_state_switch_nolock(clkdm->pwrdm.ptr);
+        pwrdm_unlock(clkdm->pwrdm.ptr);
 
         pr_debug("clockdomain: %s: disabled\n", clkdm->name);
 
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index bc42446e23ab..2da37656a693 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -15,7 +15,6 @@
 #define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H
 
 #include <linux/init.h>
-#include <linux/spinlock.h>
 
 #include "powerdomain.h"
 #include "clock.h"
@@ -92,8 +91,8 @@ struct clkdm_autodep {
 struct clkdm_dep {
         const char *clkdm_name;
         struct clockdomain *clkdm;
-        atomic_t wkdep_usecount;
-        atomic_t sleepdep_usecount;
+        s16 wkdep_usecount;
+        s16 sleepdep_usecount;
 };
 
 /* Possible flags for struct clockdomain._flags */
@@ -137,9 +136,8 @@ struct clockdomain {
         const u16 clkdm_offs;
         struct clkdm_dep *wkdep_srcs;
         struct clkdm_dep *sleepdep_srcs;
-        atomic_t usecount;
+        int usecount;
         struct list_head node;
-        spinlock_t lock;
 };
 
 /**
@@ -196,12 +194,16 @@ int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
 int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2);
 int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm);
 
+void clkdm_allow_idle_nolock(struct clockdomain *clkdm);
 void clkdm_allow_idle(struct clockdomain *clkdm);
+void clkdm_deny_idle_nolock(struct clockdomain *clkdm);
 void clkdm_deny_idle(struct clockdomain *clkdm);
 bool clkdm_in_hwsup(struct clockdomain *clkdm);
 bool clkdm_missing_idle_reporting(struct clockdomain *clkdm);
 
+int clkdm_wakeup_nolock(struct clockdomain *clkdm);
 int clkdm_wakeup(struct clockdomain *clkdm);
+int clkdm_sleep_nolock(struct clockdomain *clkdm);
 int clkdm_sleep(struct clockdomain *clkdm);
 
 int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);
@@ -214,8 +216,9 @@ extern void __init omap243x_clockdomains_init(void);
 extern void __init omap3xxx_clockdomains_init(void);
 extern void __init am33xx_clockdomains_init(void);
 extern void __init omap44xx_clockdomains_init(void);
-extern void _clkdm_add_autodeps(struct clockdomain *clkdm);
-extern void _clkdm_del_autodeps(struct clockdomain *clkdm);
+
+extern void clkdm_add_autodeps(struct clockdomain *clkdm);
+extern void clkdm_del_autodeps(struct clockdomain *clkdm);
 
 extern struct clkdm_ops omap2_clkdm_operations;
 extern struct clkdm_ops omap3_clkdm_operations;
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index db650690e9d0..6774a53a3874 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -273,9 +273,6 @@ int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
 
 static void omap2xxx_clkdm_allow_idle(struct clockdomain *clkdm)
 {
-        if (atomic_read(&clkdm->usecount) > 0)
-                _clkdm_add_autodeps(clkdm);
-
         omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                        clkdm->clktrctrl_mask);
 }
@@ -284,9 +281,6 @@ static void omap2xxx_clkdm_deny_idle(struct clockdomain *clkdm)
 {
         omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                         clkdm->clktrctrl_mask);
-
-        if (atomic_read(&clkdm->usecount) > 0)
-                _clkdm_del_autodeps(clkdm);
 }
 
 static int omap2xxx_clkdm_clk_enable(struct clockdomain *clkdm)
@@ -298,18 +292,8 @@ static int omap2xxx_clkdm_clk_enable(struct clockdomain *clkdm)
 
         hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                               clkdm->clktrctrl_mask);
-
-        if (hwsup) {
-                /* Disable HW transitions when we are changing deps */
-                omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                                clkdm->clktrctrl_mask);
-                _clkdm_add_autodeps(clkdm);
-                omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                               clkdm->clktrctrl_mask);
-        } else {
-                if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
-                        omap2xxx_clkdm_wakeup(clkdm);
-        }
+        if (!hwsup && clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
+                omap2xxx_clkdm_wakeup(clkdm);
 
         return 0;
 }
@@ -324,17 +308,8 @@ static int omap2xxx_clkdm_clk_disable(struct clockdomain *clkdm)
         hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                               clkdm->clktrctrl_mask);
 
-        if (hwsup) {
-                /* Disable HW transitions when we are changing deps */
-                omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                                clkdm->clktrctrl_mask);
-                _clkdm_del_autodeps(clkdm);
-                omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                               clkdm->clktrctrl_mask);
-        } else {
-                if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
-                        omap2xxx_clkdm_sleep(clkdm);
-        }
+        if (!hwsup && clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
+                omap2xxx_clkdm_sleep(clkdm);
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index 058ce3c0873e..325a51576576 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -241,9 +241,6 @@ int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
 {
         int i = 0;
 
-        if (!clkctrl_offs)
-                return 0;
-
         omap_test_timeout(_is_module_ready(inst, cdoffs, clkctrl_offs),
                           MAX_MODULE_READY_TIME, i);
 
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 5fa0b62e1a79..64f4bafe7bd9 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -17,16 +17,11 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
 
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
 #include "common.h"
 
 #include "cm.h"
 #include "cm-regbits-33xx.h"
-#include "cm33xx.h"
+#include "iomap.h"
 
 /* CM base address */
 #define AM33XX_CM_BASE          0x44e00000
@@ -381,6 +376,7 @@
 #define AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL                 AM33XX_CM_REGADDR(AM33XX_CM_CEFUSE_MOD, 0x0020)
 
 
+#ifndef __ASSEMBLER__
 extern bool am33xx_cm_is_clkdm_in_hwsup(s16 inst, u16 cdoffs);
 extern void am33xx_cm_clkdm_enable_hwsup(s16 inst, u16 cdoffs);
 extern void am33xx_cm_clkdm_disable_hwsup(s16 inst, u16 cdoffs);
@@ -417,4 +413,5 @@ static inline int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs,
 }
 #endif
 
+#endif /* ASSEMBLER */
 #endif
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index c2086f2e86b6..9061c307d915 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -186,7 +186,7 @@ static int omap3xxx_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
                         continue; /* only happens if data is erroneous */
 
                 mask |= 1 << cd->clkdm->dep_bit;
-                atomic_set(&cd->sleepdep_usecount, 0);
+                cd->sleepdep_usecount = 0;
         }
         omap2_cm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
                                     OMAP3430_CM_SLEEPDEP);
@@ -209,8 +209,8 @@ static int omap3xxx_clkdm_wakeup(struct clockdomain *clkdm)
 
 static void omap3xxx_clkdm_allow_idle(struct clockdomain *clkdm)
 {
-        if (atomic_read(&clkdm->usecount) > 0)
-                _clkdm_add_autodeps(clkdm);
+        if (clkdm->usecount > 0)
+                clkdm_add_autodeps(clkdm);
 
         omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                        clkdm->clktrctrl_mask);
@@ -221,8 +221,8 @@ static void omap3xxx_clkdm_deny_idle(struct clockdomain *clkdm)
         omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                         clkdm->clktrctrl_mask);
 
-        if (atomic_read(&clkdm->usecount) > 0)
-                _clkdm_del_autodeps(clkdm);
+        if (clkdm->usecount > 0)
+                clkdm_del_autodeps(clkdm);
 }
 
 static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
@@ -250,7 +250,7 @@ static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
                 /* Disable HW transitions when we are changing deps */
                 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                                 clkdm->clktrctrl_mask);
-                _clkdm_add_autodeps(clkdm);
+                clkdm_add_autodeps(clkdm);
                 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                                clkdm->clktrctrl_mask);
         } else {
@@ -287,7 +287,7 @@ static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
                 /* Disable HW transitions when we are changing deps */
                 omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                                 clkdm->clktrctrl_mask);
-                _clkdm_del_autodeps(clkdm);
+                clkdm_del_autodeps(clkdm);
                 omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
                                                clkdm->clktrctrl_mask);
         } else {
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 7f9a464f01e9..f0290f5566fe 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -393,7 +393,7 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
                         continue; /* only happens if data is erroneous */
 
                 mask |= 1 << cd->clkdm->dep_bit;
-                atomic_set(&cd->wkdep_usecount, 0);
+                cd->wkdep_usecount = 0;
         }
 
         omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 948bcaa82eb6..0a6b9c7a63da 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -79,13 +79,13 @@ static inline int omap_mux_late_init(void)
 
 extern void omap2_init_common_infrastructure(void);
 
-extern struct sys_timer omap2_timer;
-extern struct sys_timer omap3_timer;
-extern struct sys_timer omap3_secure_timer;
-extern struct sys_timer omap3_gp_timer;
-extern struct sys_timer omap3_am33xx_timer;
-extern struct sys_timer omap4_timer;
-extern struct sys_timer omap5_timer;
+extern void omap2_sync32k_timer_init(void);
+extern void omap3_sync32k_timer_init(void);
+extern void omap3_secure_sync32k_timer_init(void);
+extern void omap3_gp_gptimer_timer_init(void);
+extern void omap3_am33xx_gptimer_timer_init(void);
+extern void omap4_local_timer_init(void);
+extern void omap5_realtime_timer_init(void);
 
 void omap2420_init_early(void);
 void omap2430_init_early(void);
@@ -119,6 +119,14 @@ static inline void omap2xxx_restart(char mode, const char *cmd)
 }
 #endif
 
+#ifdef CONFIG_SOC_AM33XX
+void am33xx_restart(char mode, const char *cmd);
+#else
+static inline void am33xx_restart(char mode, const char *cmd)
+{
+}
+#endif
+
 #ifdef CONFIG_ARCH_OMAP3
 void omap3xxx_restart(char mode, const char *cmd);
 #else
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 22590dbe8f14..80392fca86c6 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -36,40 +36,66 @@
 
 /* Mach specific information to be recorded in the C-state driver_data */
 struct omap3_idle_statedata {
-        u32 mpu_state;
-        u32 core_state;
+        u8 mpu_state;
+        u8 core_state;
+        u8 per_min_state;
+        u8 flags;
 };
 
 static struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd;
 
+/*
+ * Possible flag bits for struct omap3_idle_statedata.flags:
+ *
+ * OMAP_CPUIDLE_CX_NO_CLKDM_IDLE: don't allow the MPU clockdomain to go
+ *    inactive.  This in turn prevents the MPU DPLL from entering autoidle
+ *    mode, so wakeup latency is greatly reduced, at the cost of additional
+ *    energy consumption.  This also prevents the CORE clockdomain from
+ *    entering idle.
+ */
+#define OMAP_CPUIDLE_CX_NO_CLKDM_IDLE           BIT(0)
+
+/*
+ * Prevent PER OFF if CORE is not in RETention or OFF as this would
+ * disable PER wakeups completely.
+ */
 static struct omap3_idle_statedata omap3_idle_data[] = {
         {
                 .mpu_state = PWRDM_POWER_ON,
                 .core_state = PWRDM_POWER_ON,
+                /* In C1 do not allow PER state lower than CORE state */
+                .per_min_state = PWRDM_POWER_ON,
+                .flags = OMAP_CPUIDLE_CX_NO_CLKDM_IDLE,
         },
         {
                 .mpu_state = PWRDM_POWER_ON,
                 .core_state = PWRDM_POWER_ON,
+                .per_min_state = PWRDM_POWER_RET,
         },
         {
                 .mpu_state = PWRDM_POWER_RET,
                 .core_state = PWRDM_POWER_ON,
+                .per_min_state = PWRDM_POWER_RET,
         },
         {
                 .mpu_state = PWRDM_POWER_OFF,
                 .core_state = PWRDM_POWER_ON,
+                .per_min_state = PWRDM_POWER_RET,
         },
         {
                 .mpu_state = PWRDM_POWER_RET,
                 .core_state = PWRDM_POWER_RET,
+                .per_min_state = PWRDM_POWER_OFF,
         },
         {
                 .mpu_state = PWRDM_POWER_OFF,
                 .core_state = PWRDM_POWER_RET,
+                .per_min_state = PWRDM_POWER_OFF,
         },
         {
                 .mpu_state = PWRDM_POWER_OFF,
                 .core_state = PWRDM_POWER_OFF,
+                .per_min_state = PWRDM_POWER_OFF,
         },
 };
 
@@ -80,27 +106,25 @@ static int __omap3_enter_idle(struct cpuidle_device *dev,
                                 int index)
 {
         struct omap3_idle_statedata *cx = &omap3_idle_data[index];
-        u32 mpu_state = cx->mpu_state, core_state = cx->core_state;
 
         local_fiq_disable();
 
-        pwrdm_set_next_pwrst(mpu_pd, mpu_state);
-        pwrdm_set_next_pwrst(core_pd, core_state);
-
         if (omap_irq_pending() || need_resched())
                 goto return_sleep_time;
 
         /* Deny idle for C1 */
-        if (index == 0) {
+        if (cx->flags & OMAP_CPUIDLE_CX_NO_CLKDM_IDLE) {
                 clkdm_deny_idle(mpu_pd->pwrdm_clkdms[0]);
-                clkdm_deny_idle(core_pd->pwrdm_clkdms[0]);
+        } else {
+                pwrdm_set_next_pwrst(mpu_pd, cx->mpu_state);
+                pwrdm_set_next_pwrst(core_pd, cx->core_state);
         }
 
         /*
          * Call idle CPU PM enter notifier chain so that
          * VFP context is saved.
          */
-        if (mpu_state == PWRDM_POWER_OFF)
+        if (cx->mpu_state == PWRDM_POWER_OFF)
                 cpu_pm_enter();
 
         /* Execute ARM wfi */
@@ -110,17 +134,15 @@ static int __omap3_enter_idle(struct cpuidle_device *dev,
          * Call idle CPU PM enter notifier chain to restore
          * VFP context.
          */
-        if (pwrdm_read_prev_pwrst(mpu_pd) == PWRDM_POWER_OFF)
+        if (cx->mpu_state == PWRDM_POWER_OFF &&
+            pwrdm_read_prev_pwrst(mpu_pd) == PWRDM_POWER_OFF)
                 cpu_pm_exit();
 
         /* Re-allow idle for C1 */
-        if (index == 0) {
+        if (cx->flags & OMAP_CPUIDLE_CX_NO_CLKDM_IDLE)
                 clkdm_allow_idle(mpu_pd->pwrdm_clkdms[0]);
-                clkdm_allow_idle(core_pd->pwrdm_clkdms[0]);
-        }
 
 return_sleep_time:
-
         local_fiq_enable();
 
         return index;
@@ -185,7 +207,7 @@ static int next_valid_state(struct cpuidle_device *dev,
          * Start search from the next (lower) state.
          */
         for (idx = index - 1; idx >= 0; idx--) {
-                cx =  &omap3_idle_data[idx];
+                cx = &omap3_idle_data[idx];
                 if ((cx->mpu_state >= mpu_deepest_state) &&
                     (cx->core_state >= core_deepest_state)) {
                         next_index = idx;
@@ -209,10 +231,9 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
                                struct cpuidle_driver *drv,
                                int index)
 {
-        int new_state_idx;
-        u32 core_next_state, per_next_state = 0, per_saved_state = 0;
+        int new_state_idx, ret;
+        u8 per_next_state, per_saved_state;
         struct omap3_idle_statedata *cx;
-        int ret;
 
         /*
          * Use only C1 if CAM is active.
@@ -233,25 +254,13 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
 
         /* Program PER state */
         cx = &omap3_idle_data[new_state_idx];
-        core_next_state = cx->core_state;
-        per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd);
-        if (new_state_idx == 0) {
-                /* In C1 do not allow PER state lower than CORE state */
-                if (per_next_state < core_next_state)
-                        per_next_state = core_next_state;
-        } else {
-                /*
-                 * Prevent PER OFF if CORE is not in RETention or OFF as this
-                 * would disable PER wakeups completely.
-                 */
-                if ((per_next_state == PWRDM_POWER_OFF) &&
-                    (core_next_state > PWRDM_POWER_RET))
-                        per_next_state = PWRDM_POWER_RET;
-        }
 
-        /* Are we changing PER target state? */
-        if (per_next_state != per_saved_state)
+        per_next_state = pwrdm_read_next_pwrst(per_pd);
+        per_saved_state = per_next_state;
+        if (per_next_state < cx->per_min_state) {
+                per_next_state = cx->per_min_state;
                 pwrdm_set_next_pwrst(per_pd, per_next_state);
+        }
 
         ret = omap3_enter_idle(dev, drv, new_state_idx);
 
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 626f3ea3142f..1ec7f0597710 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -20,6 +20,7 @@
 #include <linux/pinctrl/machine.h>
 #include <linux/platform_data/omap4-keypad.h>
 #include <linux/platform_data/omap_ocp2scp.h>
+#include <linux/usb/omap_control_usb.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
@@ -61,14 +62,13 @@ static int __init omap3_l3_init(void)
         if (!oh)
                 pr_err("could not look up %s\n", oh_name);
 
-        pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
-                                                           NULL, 0, 0);
+        pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0);
 
         WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
 
         return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
 }
-postcore_initcall(omap3_l3_init);
+omap_postcore_initcall(omap3_l3_init);
 
 static int __init omap4_l3_init(void)
 {
@@ -96,14 +96,13 @@ static int __init omap4_l3_init(void)
                         pr_err("could not look up %s\n", oh_name);
         }
 
-        pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
-                                                     0, NULL, 0, 0);
+        pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, 0);
 
         WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
 
         return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
 }
-postcore_initcall(omap4_l3_init);
+omap_postcore_initcall(omap4_l3_init);
 
 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
 
@@ -254,6 +253,49 @@ static inline void omap_init_camera(void)
 #endif
 }
 
+#if IS_ENABLED(CONFIG_OMAP_CONTROL_USB)
+static struct omap_control_usb_platform_data omap4_control_usb_pdata = {
+        .type = 1,
+};
+
+struct resource omap4_control_usb_res[] = {
+        {
+                .name   = "control_dev_conf",
+                .start  = 0x4a002300,
+                .end    = 0x4a002303,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "otghs_control",
+                .start  = 0x4a00233c,
+                .end    = 0x4a00233f,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device omap4_control_usb = {
+        .name = "omap-control-usb",
+        .id = -1,
+        .dev = {
+                .platform_data = &omap4_control_usb_pdata,
+        },
+        .num_resources = 2,
+        .resource = omap4_control_usb_res,
+};
+
+static inline void __init omap_init_control_usb(void)
+{
+        if (!cpu_is_omap44xx())
+                return;
+
+        if (platform_device_register(&omap4_control_usb))
+                pr_err("Error registering omap_control_usb device\n");
+}
+
+#else
+static inline void omap_init_control_usb(void) { }
+#endif /* CONFIG_OMAP_CONTROL_USB */
+
 int __init omap4_keyboard_init(struct omap4_keypad_platform_data
                         *sdp4430_keypad_data, struct omap_board_data *bdata)
 {
@@ -273,7 +315,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
         keypad_data = sdp4430_keypad_data;
 
         pdev = omap_device_build(name, id, oh, keypad_data,
-                        sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
+                                 sizeof(struct omap4_keypad_platform_data));
 
         if (IS_ERR(pdev)) {
                 WARN(1, "Can't build omap_device for %s:%s.\n",
@@ -297,7 +339,7 @@ static inline void __init omap_init_mbox(void)
                 return;
         }
 
-        pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
+        pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0);
         WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
                                                 __func__, PTR_ERR(pdev));
 }
@@ -337,7 +379,7 @@ static void __init omap_init_mcpdm(void)
                 return;
         }
 
-        pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
+        pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0);
         WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
 }
 #else
@@ -358,7 +400,7 @@ static void __init omap_init_dmic(void)
                 return;
         }
 
-        pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
+        pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0);
         WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
 }
 #else
@@ -384,8 +426,7 @@ static void __init omap_init_hdmi_audio(void)
                 return;
         }
 
-        pdev = omap_device_build("omap-hdmi-audio-dai",
-                -1, oh, NULL, 0, NULL, 0, 0);
+        pdev = omap_device_build("omap-hdmi-audio-dai", -1, oh, NULL, 0);
         WARN(IS_ERR(pdev),
              "Can't build omap_device for omap-hdmi-audio-dai.\n");
 
@@ -429,8 +470,7 @@ static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
         }
 
         spi_num++;
-        pdev = omap_device_build(name, spi_num, oh, pdata,
-                                sizeof(*pdata), NULL, 0, 0);
+        pdev = omap_device_build(name, spi_num, oh, pdata, sizeof(*pdata));
         WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
                                 name, oh->name);
         kfree(pdata);
@@ -460,7 +500,7 @@ static void omap_init_rng(void)
         if (!oh)
                 return;
 
-        pdev = omap_device_build("omap_rng", -1, oh, NULL, 0, NULL, 0, 0);
+        pdev = omap_device_build("omap_rng", -1, oh, NULL, 0);
         WARN(IS_ERR(pdev), "Can't build omap_device for omap_rng\n");
 }
 
@@ -689,8 +729,7 @@ static void __init omap_init_ocp2scp(void)
 
         pdata->dev_cnt  = dev_cnt;
 
-        pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL,
-                                                                0, false);
+        pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata));
         if (IS_ERR(pdev)) {
                 pr_err("Could not build omap_device for %s %s\n",
                                                 name, oh_name);
@@ -721,6 +760,7 @@ static int __init omap2_init_devices(void)
         omap_init_mbox();
         /* If dtb is there, the devices will be created dynamically */
         if (!of_have_populated_dt()) {
+                omap_init_control_usb();
                 omap_init_dmic();
                 omap_init_mcpdm();
                 omap_init_mcspi();
@@ -734,4 +774,4 @@ static int __init omap2_init_devices(void)
 
         return 0;
 }
-arch_initcall(omap2_init_devices);
+omap_arch_initcall(omap2_init_devices);
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index cc75aaf6e764..ff37be1f6f93 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -226,7 +226,7 @@ static struct platform_device *create_dss_pdev(const char *pdev_name,
                 dev_set_name(&pdev->dev, "%s", pdev->name);
 
         ohs[0] = oh;
-        od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
+        od = omap_device_alloc(pdev, ohs, 1);
         if (IS_ERR(od)) {
                 pr_err("Could not alloc omap_device for %s\n", pdev_name);
                 r = -ENOMEM;
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 612b98249873..dab9fc014b97 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -27,7 +27,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/device.h>
-
+#include <linux/dma-mapping.h>
 #include <linux/omap-dma.h>
 
 #include "soc.h"
@@ -248,7 +248,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
 
         p->errata               = configure_dma_errata();
 
-        pdev = omap_device_build(name, 0, oh, p, sizeof(*p), NULL, 0, 0);
+        pdev = omap_device_build(name, 0, oh, p, sizeof(*p));
         kfree(p);
         if (IS_ERR(pdev)) {
                 pr_err("%s: Can't build omap_device for %s:%s.\n",
@@ -288,9 +288,26 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
         return 0;
 }
 
+static const struct platform_device_info omap_dma_dev_info = {
+        .name = "omap-dma-engine",
+        .id = -1,
+        .dma_mask = DMA_BIT_MASK(32),
+};
+
 static int __init omap2_system_dma_init(void)
 {
-        return omap_hwmod_for_each_by_class("dma",
+        struct platform_device *pdev;
+        int res;
+
+        res = omap_hwmod_for_each_by_class("dma",
                         omap2_system_dma_init_dev, NULL);
+        if (res)
+                return res;
+
+        pdev = platform_device_register_full(&omap_dma_dev_info);
+        if (IS_ERR(pdev))
+                return PTR_ERR(pdev);
+
+        return res;
 }
-arch_initcall(omap2_system_dma_init);
+omap_arch_initcall(omap2_system_dma_init);
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 0a02aab5df67..3aed4b0b9563 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -500,8 +500,9 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
                 if (dd->last_rounded_rate == 0)
                         return -EINVAL;
 
-                /* No freqsel on OMAP4 and OMAP3630 */
-                if (!cpu_is_omap44xx() && !cpu_is_omap3630()) {
+                /* No freqsel on AM335x, OMAP4 and OMAP3630 */
+                if (!soc_is_am33xx() && !cpu_is_omap44xx() &&
+                    !cpu_is_omap3630()) {
                         freqsel = _omap3_dpll_compute_freqsel(clk,
                                                 dd->last_rounded_n);
                         WARN_ON(!freqsel);
diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c
index 2a2cfa88ddbf..59a4af779f42 100644
--- a/arch/arm/mach-omap2/drm.c
+++ b/arch/arm/mach-omap2/drm.c
@@ -51,8 +51,7 @@ static int __init omap_init_drm(void)
         oh = omap_hwmod_lookup("dmm");
 
         if (oh) {
-                pdev = omap_device_build(oh->name, -1, oh, NULL, 0, NULL, 0,
-                                        false);
+                pdev = omap_device_build(oh->name, -1, oh, NULL, 0);
                 WARN(IS_ERR(pdev), "Could not build omap_device for %s\n",
                         oh->name);
         }
@@ -63,6 +62,6 @@ static int __init omap_init_drm(void)
 
 }
 
-arch_initcall(omap_init_drm);
+omap_arch_initcall(omap_init_drm);
 
 #endif
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c
index b3566f68a559..cbeaca2d7695 100644
--- a/arch/arm/mach-omap2/emu.c
+++ b/arch/arm/mach-omap2/emu.c
@@ -47,4 +47,4 @@ static int __init emu_init(void)
         return 0;
 }
 
-subsys_initcall(emu_init);
+omap_subsys_initcall(emu_init);
diff --git a/arch/arm/mach-omap2/fb.c b/arch/arm/mach-omap2/fb.c
index d9bd965f6d07..190ae493c6ef 100644
--- a/arch/arm/mach-omap2/fb.c
+++ b/arch/arm/mach-omap2/fb.c
@@ -89,7 +89,7 @@ static int __init omap_init_vrfb(void)
                 return 0;
 }
 
-arch_initcall(omap_init_vrfb);
+omap_arch_initcall(omap_init_vrfb);
 #endif
 
 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
@@ -113,6 +113,6 @@ static int __init omap_init_fb(void)
         return platform_device_register(&omap_fb_device);
 }
 
-arch_initcall(omap_init_fb);
+omap_arch_initcall(omap_init_fb);
 
 #endif
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 399acabc3d0b..7a577145b68b 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -23,6 +23,7 @@
 #include <linux/of.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include "soc.h"
 #include "omap_hwmod.h"
 #include "omap_device.h"
 #include "omap-pm.h"
@@ -131,8 +132,7 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
         pwrdm = omap_hwmod_get_pwrdm(oh);
         pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
 
-        pdev = omap_device_build(name, id - 1, oh, pdata,
-                                sizeof(*pdata), NULL, 0, false);
+        pdev = omap_device_build(name, id - 1, oh, pdata, sizeof(*pdata));
         kfree(pdata);
 
         if (IS_ERR(pdev)) {
@@ -147,7 +147,7 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
 /*
  * gpio_init needs to be done before
  * machine_init functions access gpio APIs.
- * Hence gpio_init is a postcore_initcall.
+ * Hence gpio_init is a omap_postcore_initcall.
  */
 static int __init omap2_gpio_init(void)
 {
@@ -157,4 +157,4 @@ static int __init omap2_gpio_init(void)
 
         return omap_hwmod_for_each_by_class("gpio", omap2_gpio_dev_init, NULL);
 }
-postcore_initcall(omap2_gpio_init);
+omap_postcore_initcall(omap2_gpio_init);
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index db969a5c4998..afc1e8c32d6c 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -89,20 +89,21 @@ static int omap2_nand_gpmc_retime(
         return 0;
 }
 
-static bool __init gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
+static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
 {
         /* support only OMAP3 class */
-        if (!cpu_is_omap34xx()) {
+        if (!cpu_is_omap34xx() && !soc_is_am33xx()) {
                 pr_err("BCH ecc is not supported on this CPU\n");
                 return 0;
         }
 
         /*
-         * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1.
-         * Other chips may be added if confirmed to work.
+         * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
+         * and AM33xx derivates. Other chips may be added if confirmed to work.
          */
         if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) &&
-            (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {
+            (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)) &&
+            (!soc_is_am33xx())) {
                 pr_err("BCH 4-bit mode is not supported on this CPU\n");
                 return 0;
         }
@@ -110,8 +111,8 @@ static bool __init gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
         return 1;
 }
 
-int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
-                          struct gpmc_timings *gpmc_t)
+int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
+                   struct gpmc_timings *gpmc_t)
 {
         int err = 0;
         struct device *dev = &gpmc_nand_device.dev;
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 7f369b4f3917..0d75889c0a6f 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -356,7 +356,7 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
         return ret;
 }
 
-void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
+void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
 {
         int err;
 
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index c0a2c26ed5a4..6de31739b45c 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -25,6 +25,10 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_mtd.h>
+#include <linux/of_device.h>
+#include <linux/mtd/nand.h>
 
 #include <linux/platform_data/mtd-nand-omap2.h>
 
@@ -34,6 +38,8 @@
 #include "common.h"
 #include "omap_device.h"
 #include "gpmc.h"
+#include "gpmc-nand.h"
+#include "gpmc-onenand.h"
 
 #define DEVICE_NAME             "omap-gpmc"
 
@@ -145,7 +151,8 @@ static unsigned gpmc_irq_start;
 static struct resource  gpmc_mem_root;
 static struct resource  gpmc_cs_mem[GPMC_CS_NUM];
 static DEFINE_SPINLOCK(gpmc_mem_lock);
-static unsigned int gpmc_cs_map;        /* flag for cs which are initialized */
+/* Define chip-selects as reserved by default until probe completes */
+static unsigned int gpmc_cs_map = ((1 << GPMC_CS_NUM) - 1);
 static struct device *gpmc_dev;
 static int gpmc_irq;
 static resource_size_t phys_base, mem_size;
@@ -783,9 +790,6 @@ static int gpmc_mem_init(void)
          * even if we didn't boot from ROM.
          */
         boot_rom_space = BOOT_ROM_SPACE;
-        /* In apollon the CS0 is mapped as 0x0000 0000 */
-        if (machine_is_omap_apollon())
-                boot_rom_space = 0;
         gpmc_mem_root.start = GPMC_MEM_START + boot_rom_space;
         gpmc_mem_root.end = GPMC_MEM_END;
 
@@ -1121,6 +1125,210 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
         return 0;
 }
 
+#ifdef CONFIG_OF
+static struct of_device_id gpmc_dt_ids[] = {
+        { .compatible = "ti,omap2420-gpmc" },
+        { .compatible = "ti,omap2430-gpmc" },
+        { .compatible = "ti,omap3430-gpmc" },   /* omap3430 & omap3630 */
+        { .compatible = "ti,omap4430-gpmc" },   /* omap4430 & omap4460 & omap543x */
+        { .compatible = "ti,am3352-gpmc" },     /* am335x devices */
+        { }
+};
+MODULE_DEVICE_TABLE(of, gpmc_dt_ids);
+
+static void __maybe_unused gpmc_read_timings_dt(struct device_node *np,
+                                                struct gpmc_timings *gpmc_t)
+{
+        u32 val;
+
+        memset(gpmc_t, 0, sizeof(*gpmc_t));
+
+        /* minimum clock period for syncronous mode */
+        if (!of_property_read_u32(np, "gpmc,sync-clk", &val))
+                gpmc_t->sync_clk = val;
+
+        /* chip select timtings */
+        if (!of_property_read_u32(np, "gpmc,cs-on", &val))
+                gpmc_t->cs_on = val;
+
+        if (!of_property_read_u32(np, "gpmc,cs-rd-off", &val))
+                gpmc_t->cs_rd_off = val;
+
+        if (!of_property_read_u32(np, "gpmc,cs-wr-off", &val))
+                gpmc_t->cs_wr_off = val;
+
+        /* ADV signal timings */
+        if (!of_property_read_u32(np, "gpmc,adv-on", &val))
+                gpmc_t->adv_on = val;
+
+        if (!of_property_read_u32(np, "gpmc,adv-rd-off", &val))
+                gpmc_t->adv_rd_off = val;
+
+        if (!of_property_read_u32(np, "gpmc,adv-wr-off", &val))
+                gpmc_t->adv_wr_off = val;
+
+        /* WE signal timings */
+        if (!of_property_read_u32(np, "gpmc,we-on", &val))
+                gpmc_t->we_on = val;
+
+        if (!of_property_read_u32(np, "gpmc,we-off", &val))
+                gpmc_t->we_off = val;
+
+        /* OE signal timings */
+        if (!of_property_read_u32(np, "gpmc,oe-on", &val))
+                gpmc_t->oe_on = val;
+
+        if (!of_property_read_u32(np, "gpmc,oe-off", &val))
+                gpmc_t->oe_off = val;
+
+        /* access and cycle timings */
+        if (!of_property_read_u32(np, "gpmc,page-burst-access", &val))
+                gpmc_t->page_burst_access = val;
+
+        if (!of_property_read_u32(np, "gpmc,access", &val))
+                gpmc_t->access = val;
+
+        if (!of_property_read_u32(np, "gpmc,rd-cycle", &val))
+                gpmc_t->rd_cycle = val;
+
+        if (!of_property_read_u32(np, "gpmc,wr-cycle", &val))
+                gpmc_t->wr_cycle = val;
+
+        /* only for OMAP3430 */
+        if (!of_property_read_u32(np, "gpmc,wr-access", &val))
+                gpmc_t->wr_access = val;
+
+        if (!of_property_read_u32(np, "gpmc,wr-data-mux-bus", &val))
+                gpmc_t->wr_data_mux_bus = val;
+}
+
+#ifdef CONFIG_MTD_NAND
+
+static const char * const nand_ecc_opts[] = {
+        [OMAP_ECC_HAMMING_CODE_DEFAULT]         = "sw",
+        [OMAP_ECC_HAMMING_CODE_HW]              = "hw",
+        [OMAP_ECC_HAMMING_CODE_HW_ROMCODE]      = "hw-romcode",
+        [OMAP_ECC_BCH4_CODE_HW]                 = "bch4",
+        [OMAP_ECC_BCH8_CODE_HW]                 = "bch8",
+};
+
+static int gpmc_probe_nand_child(struct platform_device *pdev,
+                                 struct device_node *child)
+{
+        u32 val;
+        const char *s;
+        struct gpmc_timings gpmc_t;
+        struct omap_nand_platform_data *gpmc_nand_data;
+
+        if (of_property_read_u32(child, "reg", &val) < 0) {
+                dev_err(&pdev->dev, "%s has no 'reg' property\n",
+                        child->full_name);
+                return -ENODEV;
+        }
+
+        gpmc_nand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_nand_data),
+                                      GFP_KERNEL);
+        if (!gpmc_nand_data)
+                return -ENOMEM;
+
+        gpmc_nand_data->cs = val;
+        gpmc_nand_data->of_node = child;
+
+        if (!of_property_read_string(child, "ti,nand-ecc-opt", &s))
+                for (val = 0; val < ARRAY_SIZE(nand_ecc_opts); val++)
+                        if (!strcasecmp(s, nand_ecc_opts[val])) {
+                                gpmc_nand_data->ecc_opt = val;
+                                break;
+                        }
+
+        val = of_get_nand_bus_width(child);
+        if (val == 16)
+                gpmc_nand_data->devsize = NAND_BUSWIDTH_16;
+
+        gpmc_read_timings_dt(child, &gpmc_t);
+        gpmc_nand_init(gpmc_nand_data, &gpmc_t);
+
+        return 0;
+}
+#else
+static int gpmc_probe_nand_child(struct platform_device *pdev,
+                                 struct device_node *child)
+{
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_MTD_ONENAND
+static int gpmc_probe_onenand_child(struct platform_device *pdev,
+                                 struct device_node *child)
+{
+        u32 val;
+        struct omap_onenand_platform_data *gpmc_onenand_data;
+
+        if (of_property_read_u32(child, "reg", &val) < 0) {
+                dev_err(&pdev->dev, "%s has no 'reg' property\n",
+                        child->full_name);
+                return -ENODEV;
+        }
+
+        gpmc_onenand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_onenand_data),
+                                         GFP_KERNEL);
+        if (!gpmc_onenand_data)
+                return -ENOMEM;
+
+        gpmc_onenand_data->cs = val;
+        gpmc_onenand_data->of_node = child;
+        gpmc_onenand_data->dma_channel = -1;
+
+        if (!of_property_read_u32(child, "dma-channel", &val))
+                gpmc_onenand_data->dma_channel = val;
+
+        gpmc_onenand_init(gpmc_onenand_data);
+
+        return 0;
+}
+#else
+static int gpmc_probe_onenand_child(struct platform_device *pdev,
+                                    struct device_node *child)
+{
+        return 0;
+}
+#endif
+
+static int gpmc_probe_dt(struct platform_device *pdev)
+{
+        int ret;
+        struct device_node *child;
+        const struct of_device_id *of_id =
+                of_match_device(gpmc_dt_ids, &pdev->dev);
+
+        if (!of_id)
+                return 0;
+
+        for_each_node_by_name(child, "nand") {
+                ret = gpmc_probe_nand_child(pdev, child);
+                if (ret < 0) {
+                        of_node_put(child);
+                        return ret;
+                }
+        }
+
+        for_each_node_by_name(child, "onenand") {
+                ret = gpmc_probe_onenand_child(pdev, child);
+                if (ret < 0) {
+                        of_node_put(child);
+                        return ret;
+                }
+        }
+        return 0;
+}
+#else
+static int gpmc_probe_dt(struct platform_device *pdev)
+{
+        return 0;
+}
+#endif
+
 static int gpmc_probe(struct platform_device *pdev)
 {
         int rc;
@@ -1134,11 +1342,9 @@ static int gpmc_probe(struct platform_device *pdev)
         phys_base = res->start;
         mem_size = resource_size(res);
 
-        gpmc_base = devm_request_and_ioremap(&pdev->dev, res);
-        if (!gpmc_base) {
-                dev_err(&pdev->dev, "error: request memory / ioremap\n");
-                return -EADDRNOTAVAIL;
-        }
+        gpmc_base = devm_ioremap_resource(&pdev->dev, res);
+        if (IS_ERR(gpmc_base))
+                return PTR_ERR(gpmc_base);
 
         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
         if (res == NULL)
@@ -1174,6 +1380,17 @@ static int gpmc_probe(struct platform_device *pdev)
         if (gpmc_setup_irq() < 0)
                 dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
 
+        /* Now the GPMC is initialised, unreserve the chip-selects */
+        gpmc_cs_map = 0;
+
+        rc = gpmc_probe_dt(pdev);
+        if (rc < 0) {
+                clk_disable_unprepare(gpmc_l3_clk);
+                clk_put(gpmc_l3_clk);
+                dev_err(gpmc_dev, "failed to probe DT parameters\n");
+                return rc;
+        }
+
         return 0;
 }
 
@@ -1191,6 +1408,7 @@ static struct platform_driver gpmc_driver = {
         .driver         = {
                 .name   = DEVICE_NAME,
                 .owner  = THIS_MODULE,
+                .of_match_table = of_match_ptr(gpmc_dt_ids),
         },
 };
 
@@ -1205,7 +1423,7 @@ static __exit void gpmc_exit(void)
 
 }
 
-postcore_initcall(gpmc_init);
+omap_postcore_initcall(gpmc_init);
 module_exit(gpmc_exit);
 
 static int __init omap_gpmc_init(void)
@@ -1214,18 +1432,25 @@ static int __init omap_gpmc_init(void)
         struct platform_device *pdev;
         char *oh_name = "gpmc";
 
+        /*
+         * if the board boots up with a populated DT, do not
+         * manually add the device from this initcall
+         */
+        if (of_have_populated_dt())
+                return -ENODEV;
+
         oh = omap_hwmod_lookup(oh_name);
         if (!oh) {
                 pr_err("Could not look up %s\n", oh_name);
                 return -ENODEV;
         }
 
-        pdev = omap_device_build(DEVICE_NAME, -1, oh, NULL, 0, NULL, 0, 0);
+        pdev = omap_device_build(DEVICE_NAME, -1, oh, NULL, 0);
         WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
 
         return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
 }
-postcore_initcall(omap_gpmc_init);
+omap_postcore_initcall(omap_gpmc_init);
 
 static irqreturn_t gpmc_handle_irq(int irq, void *dev)
 {
diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c
index ab7bf181a105..cbc8e3c480e0 100644
--- a/arch/arm/mach-omap2/hdq1w.c
+++ b/arch/arm/mach-omap2/hdq1w.c
@@ -27,6 +27,7 @@
 #include <linux/err.h>
 #include <linux/platform_device.h>
 
+#include "soc.h"
 #include "omap_hwmod.h"
 #include "omap_device.h"
 #include "hdq1w.h"
@@ -87,10 +88,10 @@ static int __init omap_init_hdq(void)
         if (!oh)
                 return 0;
 
-        pdev = omap_device_build(devname, id, oh, NULL, 0, NULL, 0, 0);
+        pdev = omap_device_build(devname, id, oh, NULL, 0);
         WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
              devname, oh->name);
 
         return 0;
 }
-arch_initcall(omap_init_hdq);
+omap_arch_initcall(omap_init_hdq);
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 4a964338992a..2ef1f8714fcf 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -522,7 +522,7 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
         }
         dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
 
-        od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
+        od = omap_device_alloc(pdev, ohs, 1);
         if (IS_ERR(od)) {
                 pr_err("Could not allocate od for %s\n", name);
                 goto put_pdev;
diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c
index 1df9b5feda16..ef175acaeaa2 100644
--- a/arch/arm/mach-omap2/hwspinlock.c
+++ b/arch/arm/mach-omap2/hwspinlock.c
@@ -21,6 +21,7 @@
 #include <linux/err.h>
 #include <linux/hwspinlock.h>
 
+#include "soc.h"
 #include "omap_hwmod.h"
 #include "omap_device.h"
 
@@ -46,8 +47,7 @@ static int __init hwspinlocks_init(void)
                 return -EINVAL;
 
         pdev = omap_device_build(dev_name, 0, oh, &omap_hwspinlock_pdata,
-                                sizeof(struct hwspinlock_pdata),
-                                NULL, 0, false);
+                                sizeof(struct hwspinlock_pdata));
         if (IS_ERR(pdev)) {
                 pr_err("Can't build omap_device for %s:%s\n", dev_name,
                                                                 oh_name);
@@ -57,4 +57,4 @@ static int __init hwspinlocks_init(void)
         return retval;
 }
 /* early board code might need to reserve specific hwspinlock instances */
-postcore_initcall(hwspinlocks_init);
+omap_postcore_initcall(hwspinlocks_init);
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index b9074dde3b9c..d940e53dd9f2 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -178,10 +178,14 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
         if (cpu_is_omap34xx())
                 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
         pdev = omap_device_build(name, bus_id, oh, pdata,
-                        sizeof(struct omap_i2c_bus_platform_data),
-                        NULL, 0, 0);
+                                 sizeof(struct omap_i2c_bus_platform_data));
         WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
 
         return PTR_RET(pdev);
 }
 
+static  int __init omap_i2c_cmdline(void)
+{
+        return omap_register_i2c_bus_cmdline();
+}
+omap_subsys_initcall(omap_i2c_cmdline);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 45cc7ed4dd58..8a68f1ec66b9 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -399,8 +399,18 @@ void __init omap3xxx_check_revision(void)
                 }
                 break;
         case 0xb944:
-                omap_revision = AM335X_REV_ES1_0;
-                cpu_rev = "1.0";
+                switch (rev) {
+                case 0:
+                        omap_revision = AM335X_REV_ES1_0;
+                        cpu_rev = "1.0";
+                        break;
+                case 1:
+                /* FALLTHROUGH */
+                default:
+                        omap_revision = AM335X_REV_ES2_0;
+                        cpu_rev = "2.0";
+                        break;
+                }
                 break;
         case 0xb8f2:
                 switch (rev) {
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
deleted file mode 100644
index cfaed13d0040..000000000000
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ /dev/null
@@ -1,165 +0,0 @@
-/* arch/arm/mach-omap2/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
-
-#include <linux/serial_reg.h>
-
-#include <mach/serial.h>
-
-#define UART_OFFSET(addr)       ((addr) & 0x00ffffff)
-
-                .pushsection .data
-omap_uart_phys: .word   0
-omap_uart_virt: .word   0
-omap_uart_lsr:  .word   0
-                .popsection
-
-                /*
-                 * Note that this code won't work if the bootloader passes
-                 * a wrong machine ID number in r1. To debug, just hardcode
-                 * the desired UART phys and virt addresses temporarily into
-                 * the omap_uart_phys and omap_uart_virt above.
-                 */
-                .macro  addruart, rp, rv, tmp
-
-                /* Use omap_uart_phys/virt if already configured */
-10:             adr     \rp, 99f                @ get effective addr of 99f
-                ldr     \rv, [\rp]              @ get absolute addr of 99f
-                sub     \rv, \rv, \rp           @ offset between the two
-                ldr     \rp, [\rp, #4]          @ abs addr of omap_uart_phys
-                sub     \tmp, \rp, \rv          @ make it effective
-                ldr     \rp, [\tmp, #0]         @ omap_uart_phys
-                ldr     \rv, [\tmp, #4]         @ omap_uart_virt
-                cmp     \rp, #0                 @ is port configured?
-                cmpne   \rv, #0
-                bne     100f                    @ already configured
-
-                /* Check the debug UART configuration set in uncompress.h */
-                mov     \rp, pc
-                ldr     \rv, =OMAP_UART_INFO_OFS
-                and     \rp, \rp, #0xff000000
-                ldr     \rp, [\rp, \rv]
-
-                /* Select the UART to use based on the UART1 scratchpad value */
-                cmp     \rp, #0                 @ no port configured?
-                beq     21f                     @ if none, try to use UART1
-                cmp     \rp, #OMAP2UART1        @ OMAP2/3/4UART1
-                beq     21f                     @ configure OMAP2/3/4UART1
-                cmp     \rp, #OMAP2UART2        @ OMAP2/3/4UART2
-                beq     22f                     @ configure OMAP2/3/4UART2
-                cmp     \rp, #OMAP2UART3        @ only on 24xx
-                beq     23f                     @ configure OMAP2UART3
-                cmp     \rp, #OMAP3UART3        @ only on 34xx
-                beq     33f                     @ configure OMAP3UART3
-                cmp     \rp, #OMAP4UART3        @ only on 44xx/54xx
-                beq     43f                     @ configure OMAP4/5UART3
-                cmp     \rp, #OMAP3UART4        @ only on 36xx
-                beq     34f                     @ configure OMAP3UART4
-                cmp     \rp, #OMAP4UART4        @ only on 44xx/54xx
-                beq     44f                     @ configure OMAP4/5UART4
-                cmp     \rp, #TI81XXUART1       @ ti81Xx UART offsets different
-                beq     81f                     @ configure UART1
-                cmp     \rp, #TI81XXUART2       @ ti81Xx UART offsets different
-                beq     82f                     @ configure UART2
-                cmp     \rp, #TI81XXUART3       @ ti81Xx UART offsets different
-                beq     83f                     @ configure UART3
-                cmp     \rp, #AM33XXUART1       @ AM33XX UART offsets different
-                beq     84f                     @ configure UART1
-                cmp     \rp, #ZOOM_UART         @ only on zoom2/3
-                beq     95f                     @ configure ZOOM_UART
-
-                /* Configure the UART offset from the phys/virt base */
-21:             mov     \rp, #UART_OFFSET(OMAP2_UART1_BASE)     @ omap2/3/4
-                b       98f
-22:             mov     \rp, #UART_OFFSET(OMAP2_UART2_BASE)     @ omap2/3/4
-                b       98f
-23:             mov     \rp, #UART_OFFSET(OMAP2_UART3_BASE)
-                b       98f
-33:             mov     \rp, #UART_OFFSET(OMAP3_UART1_BASE)
-                add     \rp, \rp, #0x00fb0000
-                add     \rp, \rp, #0x00006000           @ OMAP3_UART3_BASE
-                b       98f
-34:             mov     \rp, #UART_OFFSET(OMAP3_UART1_BASE)
-                add     \rp, \rp, #0x00fb0000
-                add     \rp, \rp, #0x00028000           @ OMAP3_UART4_BASE
-                b       98f
-43:             mov     \rp, #UART_OFFSET(OMAP4_UART3_BASE)
-                b       98f
-44:             mov     \rp, #UART_OFFSET(OMAP4_UART4_BASE)
-                b       98f
-81:             mov     \rp, #UART_OFFSET(TI81XX_UART1_BASE)
-                b       98f
-82:             mov     \rp, #UART_OFFSET(TI81XX_UART2_BASE)
-                b       98f
-83:             mov     \rp, #UART_OFFSET(TI81XX_UART3_BASE)
-                b       98f
-84:             ldr     \rp, =AM33XX_UART1_BASE
-                and     \rp, \rp, #0x00ffffff
-                b       97f
-95:             ldr     \rp, =ZOOM_UART_BASE
-                str     \rp, [\tmp, #0]         @ omap_uart_phys
-                ldr     \rp, =ZOOM_UART_VIRT
-                str     \rp, [\tmp, #4]         @ omap_uart_virt
-                mov     \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
-                str     \rp, [\tmp, #8]         @ omap_uart_lsr
-                b       10b
-
-                /* AM33XX: Store both phys and virt address for the uart */
-97:             add     \rp, \rp, #0x44000000   @ phys base
-                str     \rp, [\tmp, #0]         @ omap_uart_phys
-                sub     \rp, \rp, #0x44000000   @ phys base
-                add     \rp, \rp, #0xf9000000   @ virt base
-                str     \rp, [\tmp, #4]         @ omap_uart_virt
-                mov     \rp, #(UART_LSR << OMAP_PORT_SHIFT)
-                str     \rp, [\tmp, #8]         @ omap_uart_lsr
-
-                b       10b
-
-                /* Store both phys and virt address for the uart */
-98:             add     \rp, \rp, #0x48000000   @ phys base
-                str     \rp, [\tmp, #0]         @ omap_uart_phys
-                sub     \rp, \rp, #0x48000000   @ phys base
-                add     \rp, \rp, #0xfa000000   @ virt base
-                str     \rp, [\tmp, #4]         @ omap_uart_virt
-                mov     \rp, #(UART_LSR << OMAP_PORT_SHIFT)
-                str     \rp, [\tmp, #8]         @ omap_uart_lsr
-
-                b       10b
-
-                .align
-99:             .word   .
-                .word   omap_uart_phys
-                .ltorg
-
-100:            /* Pass the UART_LSR reg address */
-                ldr     \tmp, [\tmp, #8]        @ omap_uart_lsr
-                add     \rp, \rp, \tmp
-                add     \rv, \rv, \tmp
-                .endm
-
-                .macro  senduart,rd,rx
-                orr     \rd, \rd, \rx, lsl #24  @ preserve LSR reg offset
-                bic     \rx, \rx, #0xff         @ get base (THR) reg address
-                strb    \rd, [\rx]              @ send lower byte of rd
-                orr     \rx, \rx, \rd, lsr #24  @ restore original rx (LSR)
-                bic     \rd, \rd, #(0xff << 24) @ restore original rd
-                .endm
-
-                .macro  busyuart,rd,rx
-1001:           ldrb    \rd, [\rx]              @ rx contains UART_LSR address
-                and     \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
-                teq     \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
-                bne     1001b
-                .endm
-
-                .macro  waituart,rd,rx
-                .endm
diff --git a/arch/arm/mach-omap2/include/mach/serial.h b/arch/arm/mach-omap2/include/mach/serial.h
index 70eda00db7a4..7ca1fcff453b 100644
--- a/arch/arm/mach-omap2/include/mach/serial.h
+++ b/arch/arm/mach-omap2/include/mach/serial.h
@@ -8,20 +8,6 @@
  * GNU General Public License for more details.
  */
 
-/*
- * Memory entry used for the DEBUG_LL UART configuration, relative to
- * start of RAM. See also uncompress.h and debug-macro.S.
- *
- * Note that using a memory location for storing the UART configuration
- * has at least two limitations:
- *
- * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
- *    uncompress code could then partially overwrite itself
- * 2. We assume printascii is called at least once before paging_init,
- *    and addruart has a chance to read OMAP_UART_INFO
- */
-#define OMAP_UART_INFO_OFS      0x3ffc
-
 /* OMAP2 serial ports */
 #define OMAP2_UART1_BASE        0x4806a000
 #define OMAP2_UART2_BASE        0x4806c000
@@ -68,29 +54,6 @@
 
 #define OMAP24XX_BASE_BAUD      (48000000/16)
 
-/*
- * DEBUG_LL port encoding stored into the UART1 scratchpad register by
- * decomp_setup in uncompress.h
- */
-#define OMAP2UART1              21
-#define OMAP2UART2              22
-#define OMAP2UART3              23
-#define OMAP3UART1              OMAP2UART1
-#define OMAP3UART2              OMAP2UART2
-#define OMAP3UART3              33
-#define OMAP3UART4              34              /* Only on 36xx */
-#define OMAP4UART1              OMAP2UART1
-#define OMAP4UART2              OMAP2UART2
-#define OMAP4UART3              43
-#define OMAP4UART4              44
-#define TI81XXUART1             81
-#define TI81XXUART2             82
-#define TI81XXUART3             83
-#define AM33XXUART1             84
-#define OMAP5UART3              OMAP4UART3
-#define OMAP5UART4              OMAP4UART4
-#define ZOOM_UART               95              /* Only on zoom2/3 */
-
 #ifndef __ASSEMBLER__
 
 struct omap_board_data;
diff --git a/arch/arm/mach-omap2/include/mach/uncompress.h b/arch/arm/mach-omap2/include/mach/uncompress.h
deleted file mode 100644
index 8e3546d3e041..000000000000
--- a/arch/arm/mach-omap2/include/mach/uncompress.h
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/uncompress.h
- *
- * Serial port stubs for kernel decompress status messages
- *
- * Initially based on:
- * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: Greg Lonnon <glonnon@ridgerun.com>
- *
- * Rewritten by:
- * Author: <source@mvista.com>
- * 2004 (c) MontaVista Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/types.h>
-#include <linux/serial_reg.h>
-
-#include <asm/memory.h>
-#include <asm/mach-types.h>
-
-#include <mach/serial.h>
-
-#define MDR1_MODE_MASK                  0x07
-
-volatile u8 *uart_base;
-int uart_shift;
-
-/*
- * Store the DEBUG_LL uart number into memory.
- * See also debug-macro.S, and serial.c for related code.
- */
-static void set_omap_uart_info(unsigned char port)
-{
-        /*
-         * Get address of some.bss variable and round it down
-         * a la CONFIG_AUTO_ZRELADDR.
-         */
-        u32 ram_start = (u32)&uart_shift & 0xf8000000;
-        u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
-        *uart_info = port;
-}
-
-static void putc(int c)
-{
-        if (!uart_base)
-                return;
-
-        /* Check for UART 16x mode */
-        if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
-                return;
-
-        while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
-                barrier();
-        uart_base[UART_TX << uart_shift] = c;
-}
-
-static inline void flush(void)
-{
-}
-
-/*
- * Macros to configure UART1 and debug UART
- */
-#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id)               \
-        if (machine_is_##mach()) {                                      \
-                uart_base = (volatile u8 *)(dbg_uart);                  \
-                uart_shift = (dbg_shft);                                \
-                port = (dbg_id);                                        \
-                set_omap_uart_info(port);                               \
-                break;                                                  \
-        }
-
-#define DEBUG_LL_OMAP2(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP2UART##p)
-
-#define DEBUG_LL_OMAP3(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP3UART##p)
-
-#define DEBUG_LL_OMAP4(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP4UART##p)
-
-#define DEBUG_LL_OMAP5(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP5UART##p)
-/* Zoom2/3 shift is different for UART1 and external port */
-#define DEBUG_LL_ZOOM(mach)                                             \
-        _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
-
-#define DEBUG_LL_TI81XX(p, mach)                                        \
-        _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT,   \
-                TI81XXUART##p)
-
-#define DEBUG_LL_AM33XX(p, mach)                                        \
-        _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT,   \
-                AM33XXUART##p)
-
-static inline void arch_decomp_setup(void)
-{
-        int port = 0;
-
-        /*
-         * Initialize the port based on the machine ID from the bootloader.
-         * Note that we're using macros here instead of switch statement
-         * as machine_is functions are optimized out for the boards that
-         * are not selected.
-         */
-        do {
-                /* omap2 based boards using UART1 */
-                DEBUG_LL_OMAP2(1, omap_2430sdp);
-                DEBUG_LL_OMAP2(1, omap_apollon);
-                DEBUG_LL_OMAP2(1, omap_h4);
-
-                /* omap2 based boards using UART3 */
-                DEBUG_LL_OMAP2(3, nokia_n800);
-                DEBUG_LL_OMAP2(3, nokia_n810);
-                DEBUG_LL_OMAP2(3, nokia_n810_wimax);
-
-                /* omap3 based boards using UART1 */
-                DEBUG_LL_OMAP2(1, omap3evm);
-                DEBUG_LL_OMAP3(1, omap_3430sdp);
-                DEBUG_LL_OMAP3(1, omap_3630sdp);
-                DEBUG_LL_OMAP3(1, omap3530_lv_som);
-                DEBUG_LL_OMAP3(1, omap3_torpedo);
-
-                /* omap3 based boards using UART3 */
-                DEBUG_LL_OMAP3(3, cm_t35);
-                DEBUG_LL_OMAP3(3, cm_t3517);
-                DEBUG_LL_OMAP3(3, cm_t3730);
-                DEBUG_LL_OMAP3(3, craneboard);
-                DEBUG_LL_OMAP3(3, devkit8000);
-                DEBUG_LL_OMAP3(3, igep0020);
-                DEBUG_LL_OMAP3(3, igep0030);
-                DEBUG_LL_OMAP3(3, nokia_rm680);
-                DEBUG_LL_OMAP3(3, nokia_rm696);
-                DEBUG_LL_OMAP3(3, nokia_rx51);
-                DEBUG_LL_OMAP3(3, omap3517evm);
-                DEBUG_LL_OMAP3(3, omap3_beagle);
-                DEBUG_LL_OMAP3(3, omap3_pandora);
-                DEBUG_LL_OMAP3(3, omap_ldp);
-                DEBUG_LL_OMAP3(3, overo);
-                DEBUG_LL_OMAP3(3, touchbook);
-
-                /* omap4 based boards using UART3 */
-                DEBUG_LL_OMAP4(3, omap_4430sdp);
-                DEBUG_LL_OMAP4(3, omap4_panda);
-
-                /* omap5 based boards using UART3 */
-                DEBUG_LL_OMAP5(3, omap5_sevm);
-
-                /* zoom2/3 external uart */
-                DEBUG_LL_ZOOM(omap_zoom2);
-                DEBUG_LL_ZOOM(omap_zoom3);
-
-                /* TI8168 base boards using UART3 */
-                DEBUG_LL_TI81XX(3, ti8168evm);
-
-                /* TI8148 base boards using UART1 */
-                DEBUG_LL_TI81XX(1, ti8148evm);
-
-                /* AM33XX base boards using UART1 */
-                DEBUG_LL_AM33XX(1, am335xevm);
-        } while (0);
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_wdog()
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index df49f2a49461..5d8768075dd9 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -23,6 +23,7 @@
 
 #include <linux/omap-dma.h>
 
+#include "soc.h"
 #include "omap_device.h"
 
 /*
@@ -101,7 +102,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
                 count++;
         }
         pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
-                                sizeof(*pdata), NULL, 0, false);
+                                    sizeof(*pdata));
         kfree(pdata);
         if (IS_ERR(pdev))  {
                 pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
@@ -118,4 +119,4 @@ static int __init omap2_mcbsp_init(void)
 
         return 0;
 }
-arch_initcall(omap2_mcbsp_init);
+omap_arch_initcall(omap2_mcbsp_init);
diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c
index aafdd4ca9f4f..c52d8b4a3e91 100644
--- a/arch/arm/mach-omap2/msdi.c
+++ b/arch/arm/mach-omap2/msdi.c
@@ -150,7 +150,7 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
                 return;
         }
         pdev = omap_device_build(dev_name, id, oh, mmc_data[0],
-                                 sizeof(struct omap_mmc_platform_data), NULL, 0, 0);
+                                 sizeof(struct omap_mmc_platform_data));
         if (IS_ERR(pdev))
                 WARN(1, "Can'd build omap_device for %s:%s.\n",
                                         dev_name, oh->name);
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index 6da4f7ae9d7f..f6daae821ebb 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -16,6 +16,7 @@
 #include <linux/slab.h>
 
 #include <linux/platform_data/iommu-omap.h>
+#include "soc.h"
 #include "omap_hwmod.h"
 #include "omap_device.h"
 
@@ -41,8 +42,7 @@ static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused)
                 pdata->deassert_reset = omap_device_deassert_hardreset;
         }
 
-        pdev = omap_device_build("omap-iommu", i, oh, pdata, sizeof(*pdata),
-                                NULL, 0, 0);
+        pdev = omap_device_build("omap-iommu", i, oh, pdata, sizeof(*pdata));
 
         kfree(pdata);
 
@@ -61,7 +61,7 @@ static int __init omap_iommu_init(void)
         return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
 }
 /* must be ready before omap3isp is probed */
-subsys_initcall(omap_iommu_init);
+omap_subsys_initcall(omap_iommu_init);
 
 static void __exit omap_iommu_exit(void)
 {
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index aac46bfdbeb2..8bcb64bcdcdb 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -87,37 +87,6 @@ static inline void set_cpu_wakeup_addr(unsigned int cpu_id, u32 addr)
 }
 
 /*
- * Set the CPUx powerdomain's previous power state
- */
-static inline void set_cpu_next_pwrst(unsigned int cpu_id,
-                                unsigned int power_state)
-{
-        struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
-
-        pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
-}
-
-/*
- * Read CPU's previous power state
- */
-static inline unsigned int read_cpu_prev_pwrst(unsigned int cpu_id)
-{
-        struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
-
-        return pwrdm_read_prev_pwrst(pm_info->pwrdm);
-}
-
-/*
- * Clear the CPUx powerdomain's previous power state
- */
-static inline void clear_cpu_prev_pwrst(unsigned int cpu_id)
-{
-        struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
-
-        pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
-}
-
-/*
  * Store the SCU power status value to scratchpad memory
  */
 static void scu_pwrst_prepare(unsigned int cpu_id, unsigned int cpu_state)
@@ -230,6 +199,7 @@ static void save_l2x0_context(void)
  */
 int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
 {
+        struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
         unsigned int save_state = 0;
         unsigned int wakeup_cpu;
 
@@ -268,7 +238,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
                 save_state = 2;
 
         cpu_clear_prev_logic_pwrst(cpu);
-        set_cpu_next_pwrst(cpu, power_state);
+        pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
         set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume));
         scu_pwrst_prepare(cpu, power_state);
         l2x0_pwrst_prepare(cpu, save_state);
@@ -286,7 +256,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
          * domain transition
          */
         wakeup_cpu = smp_processor_id();
-        set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
+        pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON);
 
         pwrdm_post_transition(NULL);
 
@@ -300,8 +270,8 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
  */
 int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
 {
-        unsigned int cpu_state = 0;
         struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
+        unsigned int cpu_state = 0;
 
         if (omap_rev() == OMAP4430_REV_ES1_0)
                 return -ENXIO;
@@ -309,8 +279,8 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
         if (power_state == PWRDM_POWER_OFF)
                 cpu_state = 1;
 
-        clear_cpu_prev_pwrst(cpu);
-        set_cpu_next_pwrst(cpu, power_state);
+        pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
+        pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
         set_cpu_wakeup_addr(cpu, virt_to_phys(pm_info->secondary_startup));
         scu_pwrst_prepare(cpu, power_state);
 
@@ -321,7 +291,7 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
          */
         omap4_finish_suspend(cpu_state);
 
-        set_cpu_next_pwrst(cpu, PWRDM_POWER_ON);
+        pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON);
         return 0;
 }
 
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index cd42d921940d..d9727218dd0a 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -19,9 +19,9 @@
 #include <linux/device.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <linux/irqchip/arm-gic.h>
 
 #include <asm/cacheflush.h>
-#include <asm/hardware/gic.h>
 #include <asm/smp_scu.h>
 
 #include "omap-secure.h"
@@ -157,7 +157,7 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *
                 booted = true;
         }
 
-        gic_raise_softirq(cpumask_of(cpu), 0);
+        arch_send_wakeup_ipi_mask(cpumask_of(cpu));
 
         /*
          * Now the secondary core is starting up let it run its
@@ -215,7 +215,7 @@ static void __init omap4_smp_init_cpus(void)
                  * Currently we can't call ioremap here because
                  * SoC detection won't work until after init_early.
                  */
-                scu_base =  OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE);
+                scu_base =  OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
                 BUG_ON(!scu_base);
                 ncores = scu_get_core_count(scu_base);
         } else if (cpu_id == CPU_CORTEX_A15) {
@@ -231,8 +231,6 @@ static void __init omap4_smp_init_cpus(void)
 
         for (i = 0; i < ncores; i++)
                 set_cpu_possible(i, true);
-
-        set_smp_cross_call(gic_raise_softirq);
 }
 
 static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 5d3b4f4f81ae..f8bb3b9b6a76 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -24,8 +24,7 @@
 #include <linux/cpu.h>
 #include <linux/notifier.h>
 #include <linux/cpu_pm.h>
-
-#include <asm/hardware/gic.h>
+#include <linux/irqchip/arm-gic.h>
 
 #include "omap-wakeupgen.h"
 #include "omap-secure.h"
@@ -46,7 +45,7 @@
 
 static void __iomem *wakeupgen_base;
 static void __iomem *sar_base;
-static DEFINE_SPINLOCK(wakeupgen_lock);
+static DEFINE_RAW_SPINLOCK(wakeupgen_lock);
 static unsigned int irq_target_cpu[MAX_IRQS];
 static unsigned int irq_banks = MAX_NR_REG_BANKS;
 static unsigned int max_irqs = MAX_IRQS;
@@ -134,9 +133,9 @@ static void wakeupgen_mask(struct irq_data *d)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&wakeupgen_lock, flags);
+        raw_spin_lock_irqsave(&wakeupgen_lock, flags);
         _wakeupgen_clear(d->irq, irq_target_cpu[d->irq]);
-        spin_unlock_irqrestore(&wakeupgen_lock, flags);
+        raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
 }
 
 /*
@@ -146,9 +145,9 @@ static void wakeupgen_unmask(struct irq_data *d)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&wakeupgen_lock, flags);
+        raw_spin_lock_irqsave(&wakeupgen_lock, flags);
         _wakeupgen_set(d->irq, irq_target_cpu[d->irq]);
-        spin_unlock_irqrestore(&wakeupgen_lock, flags);
+        raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
@@ -189,7 +188,7 @@ static void wakeupgen_irqmask_all(unsigned int cpu, unsigned int set)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&wakeupgen_lock, flags);
+        raw_spin_lock_irqsave(&wakeupgen_lock, flags);
         if (set) {
                 _wakeupgen_save_masks(cpu);
                 _wakeupgen_set_all(cpu, WKG_MASK_ALL);
@@ -197,7 +196,7 @@ static void wakeupgen_irqmask_all(unsigned int cpu, unsigned int set)
                 _wakeupgen_set_all(cpu, WKG_UNMASK_ALL);
                 _wakeupgen_restore_masks(cpu);
         }
-        spin_unlock_irqrestore(&wakeupgen_lock, flags);
+        raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
 }
 #endif
 
diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c
index be6bc89ab1e8..719b716a4494 100644
--- a/arch/arm/mach-omap2/omap2-restart.c
+++ b/arch/arm/mach-omap2/omap2-restart.c
@@ -13,6 +13,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
+#include "soc.h"
 #include "common.h"
 #include "prm2xxx.h"
 
@@ -62,4 +63,4 @@ static int __init omap2xxx_common_look_up_clks_for_reset(void)
 
         return 0;
 }
-core_initcall(omap2xxx_common_look_up_clks_for_reset);
+omap_core_initcall(omap2xxx_common_look_up_clks_for_reset);
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 6897ae21bb82..708bb115a27f 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -15,13 +15,14 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqchip.h>
 #include <linux/platform_device.h>
 #include <linux/memblock.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/export.h>
+#include <linux/irqchip/arm-gic.h>
 
-#include <asm/hardware/gic.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
@@ -225,7 +226,7 @@ static int __init omap_l2_cache_init(void)
 
         return 0;
 }
-early_initcall(omap_l2_cache_init);
+omap_early_initcall(omap_l2_cache_init);
 #endif
 
 void __iomem *omap4_get_sar_ram_base(void)
@@ -253,18 +254,12 @@ static int __init omap4_sar_ram_init(void)
 
         return 0;
 }
-early_initcall(omap4_sar_ram_init);
-
-static struct of_device_id irq_match[] __initdata = {
-        { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
-        { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
-        { }
-};
+omap_early_initcall(omap4_sar_ram_init);
 
 void __init omap_gic_of_init(void)
 {
         omap_wakeupgen_init();
-        of_irq_init(irq_match);
+        irqchip_init();
 }
 
 #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
diff --git a/arch/arm/mach-omap2/omap44xx.h b/arch/arm/mach-omap2/omap44xx.h
index 43b927b2e2e8..8a515bb74639 100644
--- a/arch/arm/mach-omap2/omap44xx.h
+++ b/arch/arm/mach-omap2/omap44xx.h
@@ -40,7 +40,6 @@
 #define OMAP44XX_GIC_DIST_BASE          0x48241000
 #define OMAP44XX_GIC_CPU_BASE           0x48240100
 #define OMAP44XX_IRQ_GIC_START          32
-#define OMAP44XX_SCU_BASE               0x48240000
 #define OMAP44XX_LOCAL_TWD_BASE         0x48240600
 #define OMAP44XX_L2CACHE_BASE           0x48242000
 #define OMAP44XX_WKUPGEN_BASE           0x48281000
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index b21ad59604d1..2448c7a273d2 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -17,68 +17,15 @@
  * to control power management and interconnect properties of their
  * devices.
  *
- * In the medium- to long-term, this code should either be
- * a) implemented via arch-specific pointers in platform_data
- * or
- * b) implemented as a proper omap_bus/omap_device in Linux, no more
- *    platform_data func pointers
+ * In the medium- to long-term, this code should be implemented as a
+ * proper omap_bus/omap_device in Linux, no more platform_data func
+ * pointers
  *
  *
- * Guidelines for usage by driver authors:
- *
- * 1. These functions are intended to be used by device drivers via
- * function pointers in struct platform_data.  As an example,
- * omap_device_enable() should be passed to the driver as
- *
- * struct foo_driver_platform_data {
- * ...
- *      int (*device_enable)(struct platform_device *pdev);
- * ...
- * }
- *
- * Note that the generic "device_enable" name is used, rather than
- * "omap_device_enable".  This is so other architectures can pass in their
- * own enable/disable functions here.
- *
- * This should be populated during device setup:
- *
- * ...
- * pdata->device_enable = omap_device_enable;
- * ...
- *
- * 2. Drivers should first check to ensure the function pointer is not null
- * before calling it, as in:
- *
- * if (pdata->device_enable)
- *     pdata->device_enable(pdev);
- *
- * This allows other architectures that don't use similar device_enable()/
- * device_shutdown() functions to execute normally.
- *
- * ...
- *
- * Suggested usage by device drivers:
- *
- * During device initialization:
- * device_enable()
- *
- * During device idle:
- * (save remaining device context if necessary)
- * device_idle();
- *
- * During device resume:
- * device_enable();
- * (restore context if necessary)
- *
- * During device shutdown:
- * device_shutdown()
- * (device must be reinitialized at this point to use it again)
- *
  */
 #undef DEBUG
 
 #include <linux/kernel.h>
-#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/err.h>
@@ -89,158 +36,12 @@
 #include <linux/of.h>
 #include <linux/notifier.h>
 
+#include "soc.h"
 #include "omap_device.h"
 #include "omap_hwmod.h"
 
-/* These parameters are passed to _omap_device_{de,}activate() */
-#define USE_WAKEUP_LAT                  0
-#define IGNORE_WAKEUP_LAT               1
-
-static int omap_early_device_register(struct platform_device *pdev);
-
-static struct omap_device_pm_latency omap_default_latency[] = {
-        {
-                .deactivate_func = omap_device_idle_hwmods,
-                .activate_func   = omap_device_enable_hwmods,
-                .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
-        }
-};
-
 /* Private functions */
 
-/**
- * _omap_device_activate - increase device readiness
- * @od: struct omap_device *
- * @ignore_lat: increase to latency target (0) or full readiness (1)?
- *
- * Increase readiness of omap_device @od (thus decreasing device
- * wakeup latency, but consuming more power).  If @ignore_lat is
- * IGNORE_WAKEUP_LAT, make the omap_device fully active.  Otherwise,
- * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
- * latency is greater than the requested maximum wakeup latency, step
- * backwards in the omap_device_pm_latency table to ensure the
- * device's maximum wakeup latency is less than or equal to the
- * requested maximum wakeup latency.  Returns 0.
- */
-static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
-{
-        struct timespec a, b, c;
-
-        dev_dbg(&od->pdev->dev, "omap_device: activating\n");
-
-        while (od->pm_lat_level > 0) {
-                struct omap_device_pm_latency *odpl;
-                unsigned long long act_lat = 0;
-
-                od->pm_lat_level--;
-
-                odpl = od->pm_lats + od->pm_lat_level;
-
-                if (!ignore_lat &&
-                    (od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit))
-                        break;
-
-                read_persistent_clock(&a);
-
-                /* XXX check return code */
-                odpl->activate_func(od);
-
-                read_persistent_clock(&b);
-
-                c = timespec_sub(b, a);
-                act_lat = timespec_to_ns(&c);
-
-                dev_dbg(&od->pdev->dev,
-                        "omap_device: pm_lat %d: activate: elapsed time %llu nsec\n",
-                        od->pm_lat_level, act_lat);
-
-                if (act_lat > odpl->activate_lat) {
-                        odpl->activate_lat_worst = act_lat;
-                        if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) {
-                                odpl->activate_lat = act_lat;
-                                dev_dbg(&od->pdev->dev,
-                                        "new worst case activate latency %d: %llu\n",
-                                        od->pm_lat_level, act_lat);
-                        } else
-                                dev_warn(&od->pdev->dev,
-                                         "activate latency %d higher than expected. (%llu > %d)\n",
-                                         od->pm_lat_level, act_lat,
-                                         odpl->activate_lat);
-                }
-
-                od->dev_wakeup_lat -= odpl->activate_lat;
-        }
-
-        return 0;
-}
-
-/**
- * _omap_device_deactivate - decrease device readiness
- * @od: struct omap_device *
- * @ignore_lat: decrease to latency target (0) or full inactivity (1)?
- *
- * Decrease readiness of omap_device @od (thus increasing device
- * wakeup latency, but conserving power).  If @ignore_lat is
- * IGNORE_WAKEUP_LAT, make the omap_device fully inactive.  Otherwise,
- * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
- * latency is less than the requested maximum wakeup latency, step
- * forwards in the omap_device_pm_latency table to ensure the device's
- * maximum wakeup latency is less than or equal to the requested
- * maximum wakeup latency.  Returns 0.
- */
-static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
-{
-        struct timespec a, b, c;
-
-        dev_dbg(&od->pdev->dev, "omap_device: deactivating\n");
-
-        while (od->pm_lat_level < od->pm_lats_cnt) {
-                struct omap_device_pm_latency *odpl;
-                unsigned long long deact_lat = 0;
-
-                odpl = od->pm_lats + od->pm_lat_level;
-
-                if (!ignore_lat &&
-                    ((od->dev_wakeup_lat + odpl->activate_lat) >
-                     od->_dev_wakeup_lat_limit))
-                        break;
-
-                read_persistent_clock(&a);
-
-                /* XXX check return code */
-                odpl->deactivate_func(od);
-
-                read_persistent_clock(&b);
-
-                c = timespec_sub(b, a);
-                deact_lat = timespec_to_ns(&c);
-
-                dev_dbg(&od->pdev->dev,
-                        "omap_device: pm_lat %d: deactivate: elapsed time %llu nsec\n",
-                        od->pm_lat_level, deact_lat);
-
-                if (deact_lat > odpl->deactivate_lat) {
-                        odpl->deactivate_lat_worst = deact_lat;
-                        if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) {
-                                odpl->deactivate_lat = deact_lat;
-                                dev_dbg(&od->pdev->dev,
-                                        "new worst case deactivate latency %d: %llu\n",
-                                        od->pm_lat_level, deact_lat);
-                        } else
-                                dev_warn(&od->pdev->dev,
-                                         "deactivate latency %d higher than expected. (%llu > %d)\n",
-                                         od->pm_lat_level, deact_lat,
-                                         odpl->deactivate_lat);
-                }
-
-                od->dev_wakeup_lat += odpl->activate_lat;
-
-                od->pm_lat_level++;
-        }
-
-        return 0;
-}
-
 static void _add_clkdev(struct omap_device *od, const char *clk_alias,
                        const char *clk_name)
 {
@@ -315,9 +116,6 @@ static void _add_hwmod_clocks_clkdev(struct omap_device *od,
  * @oh: ptr to the single omap_hwmod that backs this omap_device
  * @pdata: platform_data ptr to associate with the platform_device
  * @pdata_len: amount of memory pointed to by @pdata
- * @pm_lats: pointer to a omap_device_pm_latency array for this device
- * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
- * @is_early_device: should the device be registered as an early device or not
  *
  * Function for building an omap_device already registered from device-tree
  *
@@ -356,7 +154,7 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
                 hwmods[i] = oh;
         }
 
-        od = omap_device_alloc(pdev, hwmods, oh_cnt, NULL, 0);
+        od = omap_device_alloc(pdev, hwmods, oh_cnt);
         if (!od) {
                 dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n",
                         oh_name);
@@ -407,6 +205,39 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
         return NOTIFY_DONE;
 }
 
+/**
+ * _omap_device_enable_hwmods - call omap_hwmod_enable() on all hwmods
+ * @od: struct omap_device *od
+ *
+ * Enable all underlying hwmods.  Returns 0.
+ */
+static int _omap_device_enable_hwmods(struct omap_device *od)
+{
+        int i;
+
+        for (i = 0; i < od->hwmods_cnt; i++)
+                omap_hwmod_enable(od->hwmods[i]);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
+
+/**
+ * _omap_device_idle_hwmods - call omap_hwmod_idle() on all hwmods
+ * @od: struct omap_device *od
+ *
+ * Idle all underlying hwmods.  Returns 0.
+ */
+static int _omap_device_idle_hwmods(struct omap_device *od)
+{
+        int i;
+
+        for (i = 0; i < od->hwmods_cnt; i++)
+                omap_hwmod_idle(od->hwmods[i]);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
 
 /* Public functions for use by core code */
 
@@ -526,18 +357,14 @@ static int _od_fill_dma_resources(struct omap_device *od,
  * @oh: ptr to the single omap_hwmod that backs this omap_device
  * @pdata: platform_data ptr to associate with the platform_device
  * @pdata_len: amount of memory pointed to by @pdata
- * @pm_lats: pointer to a omap_device_pm_latency array for this device
- * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
  *
  * Convenience function for allocating an omap_device structure and filling
- * hwmods, resources and pm_latency attributes.
+ * hwmods, and resources.
  *
  * Returns an struct omap_device pointer or ERR_PTR() on error;
  */
 struct omap_device *omap_device_alloc(struct platform_device *pdev,
-                                        struct omap_hwmod **ohs, int oh_cnt,
-                                        struct omap_device_pm_latency *pm_lats,
-                                        int pm_lats_cnt)
+                                        struct omap_hwmod **ohs, int oh_cnt)
 {
         int ret = -ENOMEM;
         struct omap_device *od;
@@ -626,18 +453,6 @@ struct omap_device *omap_device_alloc(struct platform_device *pdev,
                 goto oda_exit3;
 
 have_everything:
-        if (!pm_lats) {
-                pm_lats = omap_default_latency;
-                pm_lats_cnt = ARRAY_SIZE(omap_default_latency);
-        }
-
-        od->pm_lats_cnt = pm_lats_cnt;
-        od->pm_lats = kmemdup(pm_lats,
-                        sizeof(struct omap_device_pm_latency) * pm_lats_cnt,
-                        GFP_KERNEL);
-        if (!od->pm_lats)
-                goto oda_exit3;
-
         pdev->archdata.od = od;
 
         for (i = 0; i < oh_cnt; i++) {
@@ -663,7 +478,6 @@ void omap_device_delete(struct omap_device *od)
                 return;
 
         od->pdev->archdata.od = NULL;
-        kfree(od->pm_lats);
         kfree(od->hwmods);
         kfree(od);
 }
@@ -675,9 +489,6 @@ void omap_device_delete(struct omap_device *od)
  * @oh: ptr to the single omap_hwmod that backs this omap_device
  * @pdata: platform_data ptr to associate with the platform_device
  * @pdata_len: amount of memory pointed to by @pdata
- * @pm_lats: pointer to a omap_device_pm_latency array for this device
- * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
- * @is_early_device: should the device be registered as an early device or not
  *
  * Convenience function for building and registering a single
  * omap_device record, which in turn builds and registers a
@@ -685,11 +496,10 @@ void omap_device_delete(struct omap_device *od)
  * information.  Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise,
  * passes along the return value of omap_device_build_ss().
  */
-struct platform_device __init *omap_device_build(const char *pdev_name, int pdev_id,
-                                      struct omap_hwmod *oh, void *pdata,
-                                      int pdata_len,
-                                      struct omap_device_pm_latency *pm_lats,
-                                      int pm_lats_cnt, int is_early_device)
+struct platform_device __init *omap_device_build(const char *pdev_name,
+                                                 int pdev_id,
+                                                 struct omap_hwmod *oh,
+                                                 void *pdata, int pdata_len)
 {
         struct omap_hwmod *ohs[] = { oh };
 
@@ -697,8 +507,7 @@ struct platform_device __init *omap_device_build(const char *pdev_name, int pdev
                 return ERR_PTR(-EINVAL);
 
         return omap_device_build_ss(pdev_name, pdev_id, ohs, 1, pdata,
-                                    pdata_len, pm_lats, pm_lats_cnt,
-                                    is_early_device);
+                                    pdata_len);
 }
 
 /**
@@ -708,9 +517,6 @@ struct platform_device __init *omap_device_build(const char *pdev_name, int pdev
  * @oh: ptr to the single omap_hwmod that backs this omap_device
  * @pdata: platform_data ptr to associate with the platform_device
  * @pdata_len: amount of memory pointed to by @pdata
- * @pm_lats: pointer to a omap_device_pm_latency array for this device
- * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
- * @is_early_device: should the device be registered as an early device or not
  *
  * Convenience function for building and registering an omap_device
  * subsystem record.  Subsystem records consist of multiple
@@ -718,11 +524,11 @@ struct platform_device __init *omap_device_build(const char *pdev_name, int pdev
  * platform_device record.  Returns an ERR_PTR() on error, or passes
  * along the return value of omap_device_register().
  */
-struct platform_device __init *omap_device_build_ss(const char *pdev_name, int pdev_id,
-                                         struct omap_hwmod **ohs, int oh_cnt,
-                                         void *pdata, int pdata_len,
-                                         struct omap_device_pm_latency *pm_lats,
-                                         int pm_lats_cnt, int is_early_device)
+struct platform_device __init *omap_device_build_ss(const char *pdev_name,
+                                                    int pdev_id,
+                                                    struct omap_hwmod **ohs,
+                                                    int oh_cnt, void *pdata,
+                                                    int pdata_len)
 {
         int ret = -ENOMEM;
         struct platform_device *pdev;
@@ -746,7 +552,7 @@ struct platform_device __init *omap_device_build_ss(const char *pdev_name, int p
         else
                 dev_set_name(&pdev->dev, "%s", pdev->name);
 
-        od = omap_device_alloc(pdev, ohs, oh_cnt, pm_lats, pm_lats_cnt);
+        od = omap_device_alloc(pdev, ohs, oh_cnt);
         if (IS_ERR(od))
                 goto odbs_exit1;
 
@@ -754,10 +560,7 @@ struct platform_device __init *omap_device_build_ss(const char *pdev_name, int p
         if (ret)
                 goto odbs_exit2;
 
-        if (is_early_device)
-                ret = omap_early_device_register(pdev);
-        else
-                ret = omap_device_register(pdev);
+        ret = omap_device_register(pdev);
         if (ret)
                 goto odbs_exit2;
 
@@ -774,24 +577,6 @@ odbs_exit:
         return ERR_PTR(ret);
 }
 
-/**
- * omap_early_device_register - register an omap_device as an early platform
- * device.
- * @od: struct omap_device * to register
- *
- * Register the omap_device structure.  This currently just calls
- * platform_early_add_device() on the underlying platform_device.
- * Returns 0 by default.
- */
-static int __init omap_early_device_register(struct platform_device *pdev)
-{
-        struct platform_device *devices[1];
-
-        devices[0] = pdev;
-        early_platform_add_devices(devices, 1);
-        return 0;
-}
-
 #ifdef CONFIG_PM_RUNTIME
 static int _od_runtime_suspend(struct device *dev)
 {
@@ -902,10 +687,9 @@ int omap_device_register(struct platform_device *pdev)
  * to be accessible and ready to operate.  This generally involves
  * enabling clocks, setting SYSCONFIG registers; and in the future may
  * involve remuxing pins.  Device drivers should call this function
- * (through platform_data function pointers) where they would normally
- * enable clocks, etc.  Returns -EINVAL if called when the omap_device
- * is already enabled, or passes along the return value of
- * _omap_device_activate().
+ * indirectly via pm_runtime_get*().  Returns -EINVAL if called when
+ * the omap_device is already enabled, or passes along the return
+ * value of _omap_device_enable_hwmods().
  */
 int omap_device_enable(struct platform_device *pdev)
 {
@@ -921,14 +705,8 @@ int omap_device_enable(struct platform_device *pdev)
                 return -EINVAL;
         }
 
-        /* Enable everything if we're enabling this device from scratch */
-        if (od->_state == OMAP_DEVICE_STATE_UNKNOWN)
-                od->pm_lat_level = od->pm_lats_cnt;
-
-        ret = _omap_device_activate(od, IGNORE_WAKEUP_LAT);
+        ret = _omap_device_enable_hwmods(od);
 
-        od->dev_wakeup_lat = 0;
-        od->_dev_wakeup_lat_limit = UINT_MAX;
         od->_state = OMAP_DEVICE_STATE_ENABLED;
 
         return ret;
@@ -938,14 +716,10 @@ int omap_device_enable(struct platform_device *pdev)
  * omap_device_idle - idle an omap_device
  * @od: struct omap_device * to idle
  *
- * Idle omap_device @od by calling as many .deactivate_func() entries
- * in the omap_device's pm_lats table as is possible without exceeding
- * the device's maximum wakeup latency limit, pm_lat_limit.  Device
- * drivers should call this function (through platform_data function
- * pointers) where they would normally disable clocks after operations
- * complete, etc..  Returns -EINVAL if the omap_device is not
+ * Idle omap_device @od.  Device drivers call this function indirectly
+ * via pm_runtime_put*().  Returns -EINVAL if the omap_device is not
  * currently enabled, or passes along the return value of
- * _omap_device_deactivate().
+ * _omap_device_idle_hwmods().
  */
 int omap_device_idle(struct platform_device *pdev)
 {
@@ -961,7 +735,7 @@ int omap_device_idle(struct platform_device *pdev)
                 return -EINVAL;
         }
 
-        ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
+        ret = _omap_device_idle_hwmods(od);
 
         od->_state = OMAP_DEVICE_STATE_IDLE;
 
@@ -969,42 +743,6 @@ int omap_device_idle(struct platform_device *pdev)
 }
 
 /**
- * omap_device_shutdown - shut down an omap_device
- * @od: struct omap_device * to shut down
- *
- * Shut down omap_device @od by calling all .deactivate_func() entries
- * in the omap_device's pm_lats table and then shutting down all of
- * the underlying omap_hwmods.  Used when a device is being "removed"
- * or a device driver is being unloaded.  Returns -EINVAL if the
- * omap_device is not currently enabled or idle, or passes along the
- * return value of _omap_device_deactivate().
- */
-int omap_device_shutdown(struct platform_device *pdev)
-{
-        int ret, i;
-        struct omap_device *od;
-
-        od = to_omap_device(pdev);
-
-        if (od->_state != OMAP_DEVICE_STATE_ENABLED &&
-            od->_state != OMAP_DEVICE_STATE_IDLE) {
-                dev_warn(&pdev->dev,
-                         "omap_device: %s() called from invalid state %d\n",
-                         __func__, od->_state);
-                return -EINVAL;
-        }
-
-        ret = _omap_device_deactivate(od, IGNORE_WAKEUP_LAT);
-
-        for (i = 0; i < od->hwmods_cnt; i++)
-                omap_hwmod_shutdown(od->hwmods[i]);
-
-        od->_state = OMAP_DEVICE_STATE_SHUTDOWN;
-
-        return ret;
-}
-
-/**
  * omap_device_assert_hardreset - set a device's hardreset line
  * @pdev: struct platform_device * to reset
  * @name: const char * name of the reset line
@@ -1060,86 +798,6 @@ int omap_device_deassert_hardreset(struct platform_device *pdev,
 }
 
 /**
- * omap_device_align_pm_lat - activate/deactivate device to match wakeup lat lim
- * @od: struct omap_device *
- *
- * When a device's maximum wakeup latency limit changes, call some of
- * the .activate_func or .deactivate_func function pointers in the
- * omap_device's pm_lats array to ensure that the device's maximum
- * wakeup latency is less than or equal to the new latency limit.
- * Intended to be called by OMAP PM code whenever a device's maximum
- * wakeup latency limit changes (e.g., via
- * omap_pm_set_dev_wakeup_lat()).  Returns 0 if nothing needs to be
- * done (e.g., if the omap_device is not currently idle, or if the
- * wakeup latency is already current with the new limit) or passes
- * along the return value of _omap_device_deactivate() or
- * _omap_device_activate().
- */
-int omap_device_align_pm_lat(struct platform_device *pdev,
-                             u32 new_wakeup_lat_limit)
-{
-        int ret = -EINVAL;
-        struct omap_device *od;
-
-        od = to_omap_device(pdev);
-
-        if (new_wakeup_lat_limit == od->dev_wakeup_lat)
-                return 0;
-
-        od->_dev_wakeup_lat_limit = new_wakeup_lat_limit;
-
-        if (od->_state != OMAP_DEVICE_STATE_IDLE)
-                return 0;
-        else if (new_wakeup_lat_limit > od->dev_wakeup_lat)
-                ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
-        else if (new_wakeup_lat_limit < od->dev_wakeup_lat)
-                ret = _omap_device_activate(od, USE_WAKEUP_LAT);
-
-        return ret;
-}
-
-/**
- * omap_device_get_pwrdm - return the powerdomain * associated with @od
- * @od: struct omap_device *
- *
- * Return the powerdomain associated with the first underlying
- * omap_hwmod for this omap_device.  Intended for use by core OMAP PM
- * code.  Returns NULL on error or a struct powerdomain * upon
- * success.
- */
-struct powerdomain *omap_device_get_pwrdm(struct omap_device *od)
-{
-        /*
-         * XXX Assumes that all omap_hwmod powerdomains are identical.
-         * This may not necessarily be true.  There should be a sanity
-         * check in here to WARN() if any difference appears.
-         */
-        if (!od->hwmods_cnt)
-                return NULL;
-
-        return omap_hwmod_get_pwrdm(od->hwmods[0]);
-}
-
-/**
- * omap_device_get_mpu_rt_va - return the MPU's virtual addr for the hwmod base
- * @od: struct omap_device *
- *
- * Return the MPU's virtual address for the base of the hwmod, from
- * the ioremap() that the hwmod code does.  Only valid if there is one
- * hwmod associated with this device.  Returns NULL if there are zero
- * or more than one hwmods associated with this omap_device;
- * otherwise, passes along the return value from
- * omap_hwmod_get_mpu_rt_va().
- */
-void __iomem *omap_device_get_rt_va(struct omap_device *od)
-{
-        if (od->hwmods_cnt != 1)
-                return NULL;
-
-        return omap_hwmod_get_mpu_rt_va(od->hwmods[0]);
-}
-
-/**
  * omap_device_get_by_hwmod_name() - convert a hwmod name to
  * device pointer.
  * @oh_name: name of the hwmod device
@@ -1170,82 +828,6 @@ struct device *omap_device_get_by_hwmod_name(const char *oh_name)
 
         return &oh->od->pdev->dev;
 }
-EXPORT_SYMBOL(omap_device_get_by_hwmod_name);
-
-/*
- * Public functions intended for use in omap_device_pm_latency
- * .activate_func and .deactivate_func function pointers
- */
-
-/**
- * omap_device_enable_hwmods - call omap_hwmod_enable() on all hwmods
- * @od: struct omap_device *od
- *
- * Enable all underlying hwmods.  Returns 0.
- */
-int omap_device_enable_hwmods(struct omap_device *od)
-{
-        int i;
-
-        for (i = 0; i < od->hwmods_cnt; i++)
-                omap_hwmod_enable(od->hwmods[i]);
-
-        /* XXX pass along return value here? */
-        return 0;
-}
-
-/**
- * omap_device_idle_hwmods - call omap_hwmod_idle() on all hwmods
- * @od: struct omap_device *od
- *
- * Idle all underlying hwmods.  Returns 0.
- */
-int omap_device_idle_hwmods(struct omap_device *od)
-{
-        int i;
-
-        for (i = 0; i < od->hwmods_cnt; i++)
-                omap_hwmod_idle(od->hwmods[i]);
-
-        /* XXX pass along return value here? */
-        return 0;
-}
-
-/**
- * omap_device_disable_clocks - disable all main and interface clocks
- * @od: struct omap_device *od
- *
- * Disable the main functional clock and interface clock for all of the
- * omap_hwmods associated with the omap_device.  Returns 0.
- */
-int omap_device_disable_clocks(struct omap_device *od)
-{
-        int i;
-
-        for (i = 0; i < od->hwmods_cnt; i++)
-                omap_hwmod_disable_clocks(od->hwmods[i]);
-
-        /* XXX pass along return value here? */
-        return 0;
-}
-
-/**
- * omap_device_enable_clocks - enable all main and interface clocks
- * @od: struct omap_device *od
- *
- * Enable the main functional clock and interface clock for all of the
- * omap_hwmods associated with the omap_device.  Returns 0.
- */
-int omap_device_enable_clocks(struct omap_device *od)
-{
-        int i;
-
-        for (i = 0; i < od->hwmods_cnt; i++)
-                omap_hwmod_enable_clocks(od->hwmods[i]);
-
-        /* XXX pass along return value here? */
-        return 0;
-}
 
 static struct notifier_block platform_nb = {
         .notifier_call = _omap_device_notifier_call,
@@ -1256,7 +838,7 @@ static int __init omap_device_init(void)
         bus_register_notifier(&platform_bus_type, &platform_nb);
         return 0;
 }
-core_initcall(omap_device_init);
+omap_core_initcall(omap_device_init);
 
 /**
  * omap_device_late_idle - idle devices without drivers
@@ -1294,4 +876,4 @@ static int __init omap_device_late_init(void)
         bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle);
         return 0;
 }
-late_initcall(omap_device_late_init);
+omap_late_initcall(omap_device_late_init);
diff --git a/arch/arm/mach-omap2/omap_device.h b/arch/arm/mach-omap2/omap_device.h
index 0933c599bf89..044c31d50e5b 100644
--- a/arch/arm/mach-omap2/omap_device.h
+++ b/arch/arm/mach-omap2/omap_device.h
@@ -13,20 +13,12 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
- * Eventually this type of functionality should either be
- * a) implemented via arch-specific pointers in platform_device
- * or
- * b) implemented as a proper omap_bus/omap_device in Linux, no more
- *    platform_device
+ * This type of functionality should be implemented as a proper
+ * omap_bus/omap_device in Linux.
  *
  * omap_device differs from omap_hwmod in that it includes external
  * (e.g., board- and system-level) integration details.  omap_hwmod
  * stores hardware data that is invariant for a given OMAP chip.
- *
- * To do:
- * - GPIO integration
- * - regulator integration
- *
  */
 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
@@ -45,19 +37,14 @@ extern struct dev_pm_domain omap_device_pm_domain;
 #define OMAP_DEVICE_STATE_SHUTDOWN      3
 
 /* omap_device.flags values */
-#define OMAP_DEVICE_SUSPENDED BIT(0)
-#define OMAP_DEVICE_NO_IDLE_ON_SUSPEND BIT(1)
+#define OMAP_DEVICE_SUSPENDED           BIT(0)
+#define OMAP_DEVICE_NO_IDLE_ON_SUSPEND  BIT(1)
 
 /**
  * struct omap_device - omap_device wrapper for platform_devices
  * @pdev: platform_device
  * @hwmods: (one .. many per omap_device)
  * @hwmods_cnt: ARRAY_SIZE() of @hwmods
- * @pm_lats: ptr to an omap_device_pm_latency table
- * @pm_lats_cnt: ARRAY_SIZE() of what is passed to @pm_lats
- * @pm_lat_level: array index of the last odpl entry executed - -1 if never
- * @dev_wakeup_lat: dev wakeup latency in nanoseconds
- * @_dev_wakeup_lat_limit: dev wakeup latency limit in nsec - set by OMAP PM
  * @_state: one of OMAP_DEVICE_STATE_* (see above)
  * @flags: device flags
  * @_driver_status: one of BUS_NOTIFY_*_DRIVER from <linux/device.h>
@@ -71,12 +58,7 @@ extern struct dev_pm_domain omap_device_pm_domain;
 struct omap_device {
         struct platform_device          *pdev;
         struct omap_hwmod               **hwmods;
-        struct omap_device_pm_latency   *pm_lats;
-        u32                             dev_wakeup_lat;
-        u32                             _dev_wakeup_lat_limit;
         unsigned long                   _driver_status;
-        u8                              pm_lats_cnt;
-        s8                              pm_lat_level;
         u8                              hwmods_cnt;
         u8                              _state;
         u8                              flags;
@@ -86,36 +68,25 @@ struct omap_device {
 
 int omap_device_enable(struct platform_device *pdev);
 int omap_device_idle(struct platform_device *pdev);
-int omap_device_shutdown(struct platform_device *pdev);
 
 /* Core code interface */
 
 struct platform_device *omap_device_build(const char *pdev_name, int pdev_id,
-                                      struct omap_hwmod *oh, void *pdata,
-                                      int pdata_len,
-                                      struct omap_device_pm_latency *pm_lats,
-                                      int pm_lats_cnt, int is_early_device);
+                                          struct omap_hwmod *oh, void *pdata,
+                                          int pdata_len);
 
 struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
                                          struct omap_hwmod **oh, int oh_cnt,
-                                         void *pdata, int pdata_len,
-                                         struct omap_device_pm_latency *pm_lats,
-                                         int pm_lats_cnt, int is_early_device);
+                                         void *pdata, int pdata_len);
 
 struct omap_device *omap_device_alloc(struct platform_device *pdev,
-                                      struct omap_hwmod **ohs, int oh_cnt,
-                                      struct omap_device_pm_latency *pm_lats,
-                                      int pm_lats_cnt);
+                                      struct omap_hwmod **ohs, int oh_cnt);
 void omap_device_delete(struct omap_device *od);
 int omap_device_register(struct platform_device *pdev);
 
-void __iomem *omap_device_get_rt_va(struct omap_device *od);
 struct device *omap_device_get_by_hwmod_name(const char *oh_name);
 
 /* OMAP PM interface */
-int omap_device_align_pm_lat(struct platform_device *pdev,
-                             u32 new_wakeup_lat_limit);
-struct powerdomain *omap_device_get_pwrdm(struct omap_device *od);
 int omap_device_get_context_loss_count(struct platform_device *pdev);
 
 /* Other */
@@ -124,40 +95,6 @@ int omap_device_assert_hardreset(struct platform_device *pdev,
                                  const char *name);
 int omap_device_deassert_hardreset(struct platform_device *pdev,
                                  const char *name);
-int omap_device_idle_hwmods(struct omap_device *od);
-int omap_device_enable_hwmods(struct omap_device *od);
-
-int omap_device_disable_clocks(struct omap_device *od);
-int omap_device_enable_clocks(struct omap_device *od);
-
-/*
- * Entries should be kept in latency order ascending
- *
- * deact_lat is the maximum number of microseconds required to complete
- * deactivate_func() at the device's slowest OPP.
- *
- * act_lat is the maximum number of microseconds required to complete
- * activate_func() at the device's slowest OPP.
- *
- * This will result in some suboptimal power management decisions at fast
- * OPPs, but avoids having to recompute all device power management decisions
- * if the system shifts from a fast OPP to a slow OPP (in order to meet
- * latency requirements).
- *
- * XXX should deactivate_func/activate_func() take platform_device pointers
- * rather than omap_device pointers?
- */
-struct omap_device_pm_latency {
-        u32 deactivate_lat;
-        u32 deactivate_lat_worst;
-        int (*deactivate_func)(struct omap_device *od);
-        u32 activate_lat;
-        u32 activate_lat_worst;
-        int (*activate_func)(struct omap_device *od);
-        u32 flags;
-};
-
-#define OMAP_DEVICE_LATENCY_AUTO_ADJUST BIT(1)
 
 /* Get omap_device pointer from platform_device pointer */
 static inline struct omap_device *to_omap_device(struct platform_device *pdev)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index b7c0a2d3f2c7..a62213e2d526 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,6 +139,8 @@
 #include <linux/slab.h>
 #include <linux/bootmem.h>
 
+#include <asm/system_misc.h>
+
 #include "clock.h"
 #include "omap_hwmod.h"
 
@@ -2053,6 +2055,23 @@ static int _omap4_get_context_lost(struct omap_hwmod *oh)
 }
 
 /**
+ * _enable_preprogram - Pre-program an IP block during the _enable() process
+ * @oh: struct omap_hwmod *
+ *
+ * Some IP blocks (such as AESS) require some additional programming
+ * after enable before they can enter idle.  If a function pointer to
+ * do so is present in the hwmod data, then call it and pass along the
+ * return value; otherwise, return 0.
+ */
+static int __init _enable_preprogram(struct omap_hwmod *oh)
+{
+        if (!oh->class->enable_preprogram)
+                return 0;
+
+        return oh->class->enable_preprogram(oh);
+}
+
+/**
  * _enable - enable an omap_hwmod
  * @oh: struct omap_hwmod *
  *
@@ -2134,6 +2153,8 @@ static int _enable(struct omap_hwmod *oh)
         _enable_clocks(oh);
         if (soc_ops.enable_module)
                 soc_ops.enable_module(oh);
+        if (oh->flags & HWMOD_BLOCK_WFI)
+                disable_hlt();
 
         if (soc_ops.update_context_lost)
                 soc_ops.update_context_lost(oh);
@@ -2156,6 +2177,7 @@ static int _enable(struct omap_hwmod *oh)
                                 _update_sysc_cache(oh);
                         _enable_sysc(oh);
                 }
+                r = _enable_preprogram(oh);
         } else {
                 if (soc_ops.disable_module)
                         soc_ops.disable_module(oh);
@@ -2195,6 +2217,8 @@ static int _idle(struct omap_hwmod *oh)
                 _idle_sysc(oh);
         _del_initiator_dep(oh, mpu_oh);
 
+        if (oh->flags & HWMOD_BLOCK_WFI)
+                enable_hlt();
         if (soc_ops.disable_module)
                 soc_ops.disable_module(oh);
 
@@ -2303,6 +2327,8 @@ static int _shutdown(struct omap_hwmod *oh)
         if (oh->_state == _HWMOD_STATE_ENABLED) {
                 _del_initiator_dep(oh, mpu_oh);
                 /* XXX what about the other system initiators here? dma, dsp */
+                if (oh->flags & HWMOD_BLOCK_WFI)
+                        enable_hlt();
                 if (soc_ops.disable_module)
                         soc_ops.disable_module(oh);
                 _disable_clocks(oh);
@@ -3041,11 +3067,8 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
                                      struct omap_hwmod_rst_info *ohri)
 {
-        if (ohri->st_shift)
-                pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
-                       oh->name, ohri->name);
-
         return am33xx_prm_deassert_hardreset(ohri->rst_shift,
+                                ohri->st_shift,
                                 oh->clkdm->pwrdm.ptr->prcm_offs,
                                 oh->prcm.omap4.rstctrl_offs,
                                 oh->prcm.omap4.rstst_offs);
@@ -3303,7 +3326,7 @@ static int __init omap_hwmod_setup_all(void)
 
         return 0;
 }
-core_initcall(omap_hwmod_setup_all);
+omap_core_initcall(omap_hwmod_setup_all);
 
 /**
  * omap_hwmod_enable - enable an omap_hwmod
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 3ae852a522f9..d43d9b608eda 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -451,6 +451,14 @@ struct omap_hwmod_omap4_prcm {
  *     enabled.  This prevents the hwmod code from being able to
  *     enable and reset the IP block early.  XXX Eventually it should
  *     be possible to query the clock framework for this information.
+ * HWMOD_BLOCK_WFI: Some OMAP peripherals apparently don't work
+ *     correctly if the MPU is allowed to go idle while the
+ *     peripherals are active.  This is apparently true for the I2C on
+ *     OMAP2420, and also the EMAC on AM3517/3505.  It's unlikely that
+ *     this is really true -- we're probably not configuring something
+ *     correctly, or this is being abused to deal with some PM latency
+ *     issues -- but we're currently suffering from a shortage of
+ *     folks who are able to track these issues down properly.
  */
 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
@@ -462,6 +470,7 @@ struct omap_hwmod_omap4_prcm {
 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET         (1 << 7)
 #define HWMOD_16BIT_REG                         (1 << 8)
 #define HWMOD_EXT_OPT_MAIN_CLK                  (1 << 9)
+#define HWMOD_BLOCK_WFI                         (1 << 10)
 
 /*
  * omap_hwmod._int_flags definitions
@@ -501,6 +510,7 @@ struct omap_hwmod_omap4_prcm {
  * @rev: revision of the IP class
  * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
  * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
+ * @enable_preprogram:  ptr to fn to be executed during device enable
  *
  * Represent the class of a OMAP hardware "modules" (e.g. timer,
  * smartreflex, gpio, uart...)
@@ -524,6 +534,7 @@ struct omap_hwmod_class {
         u32                                     rev;
         int                                     (*pre_shutdown)(struct omap_hwmod *oh);
         int                                     (*reset)(struct omap_hwmod *oh);
+        int                                     (*enable_preprogram)(struct omap_hwmod *oh);
 };
 
 /**
@@ -671,6 +682,12 @@ extern void __init omap_hwmod_init(void);
 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh);
 
 /*
+ *
+ */
+
+extern int omap_hwmod_aess_preprogram(struct omap_hwmod *oh);
+
+/*
  * Chip variant-specific hwmod init routines - XXX should be converted
  * to use initcalls once the initial boot ordering is straightened out
  */
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index b5efe58c0be0..6a764af6c6d3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -121,7 +121,12 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
         },
         .class          = &i2c_class,
         .dev_attr       = &i2c_dev_attr,
-        .flags          = HWMOD_16BIT_REG,
+        /*
+         * From mach-omap2/pm24xx.c: "Putting MPU into the WFI state
+         * while a transfer is active seems to cause the I2C block to
+         * timeout. Why? Good question."
+         */
+        .flags          = (HWMOD_16BIT_REG | HWMOD_BLOCK_WFI),
 };
 
 /* I2C2 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 646c14d9fdb9..26eee4a556ad 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -262,13 +262,15 @@ static struct omap_hwmod am33xx_wkup_m3_hwmod = {
         .name           = "wkup_m3",
         .class          = &am33xx_wkup_m3_hwmod_class,
         .clkdm_name     = "l4_wkup_aon_clkdm",
-        .flags          = HWMOD_INIT_NO_RESET,  /* Keep hardreset asserted */
+        /* Keep hardreset asserted */
+        .flags          = HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
         .mpu_irqs       = am33xx_wkup_m3_irqs,
         .main_clk       = "dpll_core_m4_div2_ck",
         .prcm           = {
                 .omap4  = {
                         .clkctrl_offs   = AM33XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
                         .rstctrl_offs   = AM33XX_RM_WKUP_RSTCTRL_OFFSET,
+                        .rstst_offs     = AM33XX_RM_WKUP_RSTST_OFFSET,
                         .modulemode     = MODULEMODE_SWCTRL,
                 },
         },
@@ -414,7 +416,6 @@ static struct omap_hwmod am33xx_adc_tsc_hwmod = {
  *    - cEFUSE (doesn't fall under any ocp_if)
  *    - clkdiv32k
  *    - debugss
- *    - ocmc ram
  *    - ocp watch point
  *    - aes0
  *    - sha0
@@ -481,25 +482,6 @@ static struct omap_hwmod am33xx_debugss_hwmod = {
         },
 };
 
-/* ocmcram */
-static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
-        .name = "ocmcram",
-};
-
-static struct omap_hwmod am33xx_ocmcram_hwmod = {
-        .name           = "ocmcram",
-        .class          = &am33xx_ocmcram_hwmod_class,
-        .clkdm_name     = "l3_clkdm",
-        .flags          = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
-        .main_clk       = "l3_gclk",
-        .prcm           = {
-                .omap4  = {
-                        .clkctrl_offs   = AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET,
-                        .modulemode     = MODULEMODE_SWCTRL,
-                },
-        },
-};
-
 /* ocpwp */
 static struct omap_hwmod_class am33xx_ocpwp_hwmod_class = {
         .name           = "ocpwp",
@@ -570,6 +552,25 @@ static struct omap_hwmod am33xx_sha0_hwmod = {
 
 #endif
 
+/* ocmcram */
+static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
+        .name = "ocmcram",
+};
+
+static struct omap_hwmod am33xx_ocmcram_hwmod = {
+        .name           = "ocmcram",
+        .class          = &am33xx_ocmcram_hwmod_class,
+        .clkdm_name     = "l3_clkdm",
+        .flags          = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+        .main_clk       = "l3_gclk",
+        .prcm           = {
+                .omap4  = {
+                        .clkctrl_offs   = AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET,
+                        .modulemode     = MODULEMODE_SWCTRL,
+                },
+        },
+};
+
 /* 'smartreflex' class */
 static struct omap_hwmod_class am33xx_smartreflex_hwmod_class = {
         .name           = "smartreflex",
@@ -783,9 +784,7 @@ static struct omap_hwmod am33xx_elm_hwmod = {
         },
 };
 
-/*
- * 'epwmss' class: ecap0,1,2,  ehrpwm0,1,2
- */
+/* pwmss  */
 static struct omap_hwmod_class_sysconfig am33xx_epwmss_sysc = {
         .rev_offs       = 0x0,
         .sysc_offs      = 0x4,
@@ -801,18 +800,23 @@ static struct omap_hwmod_class am33xx_epwmss_hwmod_class = {
         .sysc           = &am33xx_epwmss_sysc,
 };
 
-/* ehrpwm0 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
-        { .name = "int", .irq = 86 + OMAP_INTC_START, },
-        { .name = "tzint", .irq = 58 + OMAP_INTC_START, },
-        { .irq = -1 },
+static struct omap_hwmod_class am33xx_ecap_hwmod_class = {
+        .name           = "ecap",
 };
 
-static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
-        .name           = "ehrpwm0",
+static struct omap_hwmod_class am33xx_eqep_hwmod_class = {
+        .name           = "eqep",
+};
+
+static struct omap_hwmod_class am33xx_ehrpwm_hwmod_class = {
+        .name           = "ehrpwm",
+};
+
+/* epwmss0 */
+static struct omap_hwmod am33xx_epwmss0_hwmod = {
+        .name           = "epwmss0",
         .class          = &am33xx_epwmss_hwmod_class,
         .clkdm_name     = "l4ls_clkdm",
-        .mpu_irqs       = am33xx_ehrpwm0_irqs,
         .main_clk       = "l4ls_gclk",
         .prcm           = {
                 .omap4  = {
@@ -822,63 +826,58 @@ static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
         },
 };
 
-/* ehrpwm1 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm1_irqs[] = {
-        { .name = "int", .irq = 87 + OMAP_INTC_START, },
-        { .name = "tzint", .irq = 59 + OMAP_INTC_START, },
+/* ecap0 */
+static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
+        { .irq = 31 + OMAP_INTC_START, },
         { .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ehrpwm1_hwmod = {
-        .name           = "ehrpwm1",
-        .class          = &am33xx_epwmss_hwmod_class,
+static struct omap_hwmod am33xx_ecap0_hwmod = {
+        .name           = "ecap0",
+        .class          = &am33xx_ecap_hwmod_class,
         .clkdm_name     = "l4ls_clkdm",
-        .mpu_irqs       = am33xx_ehrpwm1_irqs,
+        .mpu_irqs       = am33xx_ecap0_irqs,
         .main_clk       = "l4ls_gclk",
-        .prcm           = {
-                .omap4  = {
-                        .clkctrl_offs   = AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET,
-                        .modulemode     = MODULEMODE_SWCTRL,
-                },
-        },
 };
 
-/* ehrpwm2 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm2_irqs[] = {
-        { .name = "int", .irq = 39 + OMAP_INTC_START, },
-        { .name = "tzint", .irq = 60 + OMAP_INTC_START, },
+/* eqep0 */
+static struct omap_hwmod_irq_info am33xx_eqep0_irqs[] = {
+        { .irq = 79 + OMAP_INTC_START, },
         { .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ehrpwm2_hwmod = {
-        .name           = "ehrpwm2",
-        .class          = &am33xx_epwmss_hwmod_class,
+static struct omap_hwmod am33xx_eqep0_hwmod = {
+        .name           = "eqep0",
+        .class          = &am33xx_eqep_hwmod_class,
         .clkdm_name     = "l4ls_clkdm",
-        .mpu_irqs       = am33xx_ehrpwm2_irqs,
+        .mpu_irqs       = am33xx_eqep0_irqs,
         .main_clk       = "l4ls_gclk",
-        .prcm           = {
-                .omap4  = {
-                        .clkctrl_offs   = AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET,
-                        .modulemode     = MODULEMODE_SWCTRL,
-                },
-        },
 };
 
-/* ecap0 */
-static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
-        { .irq = 31 + OMAP_INTC_START, },
+/* ehrpwm0 */
+static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
+        { .name = "int", .irq = 86 + OMAP_INTC_START, },
+        { .name = "tzint", .irq = 58 + OMAP_INTC_START, },
         { .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ecap0_hwmod = {
-        .name           = "ecap0",
+static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
+        .name           = "ehrpwm0",
+        .class          = &am33xx_ehrpwm_hwmod_class,
+        .clkdm_name     = "l4ls_clkdm",
+        .mpu_irqs       = am33xx_ehrpwm0_irqs,
+        .main_clk       = "l4ls_gclk",
+};
+
+/* epwmss1 */
+static struct omap_hwmod am33xx_epwmss1_hwmod = {
+        .name           = "epwmss1",
         .class          = &am33xx_epwmss_hwmod_class,
         .clkdm_name     = "l4ls_clkdm",
-        .mpu_irqs       = am33xx_ecap0_irqs,
         .main_clk       = "l4ls_gclk",
         .prcm           = {
                 .omap4  = {
-                        .clkctrl_offs   = AM33XX_CM_PER_EPWMSS0_CLKCTRL_OFFSET,
+                        .clkctrl_offs   = AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET,
                         .modulemode     = MODULEMODE_SWCTRL,
                 },
         },
@@ -892,13 +891,50 @@ static struct omap_hwmod_irq_info am33xx_ecap1_irqs[] = {
 
 static struct omap_hwmod am33xx_ecap1_hwmod = {
         .name           = "ecap1",
-        .class          = &am33xx_epwmss_hwmod_class,
+        .class          = &am33xx_ecap_hwmod_class,
         .clkdm_name     = "l4ls_clkdm",
         .mpu_irqs       = am33xx_ecap1_irqs,
         .main_clk       = "l4ls_gclk",
+};
+
+/* eqep1 */
+static struct omap_hwmod_irq_info am33xx_eqep1_irqs[] = {
+        { .irq = 88 + OMAP_INTC_START, },
+        { .irq = -1 },
+};
+
+static struct omap_hwmod am33xx_eqep1_hwmod = {
+        .name           = "eqep1",
+        .class          = &am33xx_eqep_hwmod_class,
+        .clkdm_name     = "l4ls_clkdm",
+        .mpu_irqs       = am33xx_eqep1_irqs,
+        .main_clk       = "l4ls_gclk",
+};
+
+/* ehrpwm1 */
+static struct omap_hwmod_irq_info am33xx_ehrpwm1_irqs[] = {
+        { .name = "int", .irq = 87 + OMAP_INTC_START, },
+        { .name = "tzint", .irq = 59 + OMAP_INTC_START, },
+        { .irq = -1 },
+};
+
+static struct omap_hwmod am33xx_ehrpwm1_hwmod = {
+        .name           = "ehrpwm1",
+        .class          = &am33xx_ehrpwm_hwmod_class,
+        .clkdm_name     = "l4ls_clkdm",
+        .mpu_irqs       = am33xx_ehrpwm1_irqs,
+        .main_clk       = "l4ls_gclk",
+};
+
+/* epwmss2 */
+static struct omap_hwmod am33xx_epwmss2_hwmod = {
+        .name           = "epwmss2",
+        .class          = &am33xx_epwmss_hwmod_class,
+        .clkdm_name     = "l4ls_clkdm",
+        .main_clk       = "l4ls_gclk",
         .prcm           = {
                 .omap4  = {
-                        .clkctrl_offs   = AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET,
+                        .clkctrl_offs   = AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET,
                         .modulemode     = MODULEMODE_SWCTRL,
                 },
         },
@@ -912,16 +948,39 @@ static struct omap_hwmod_irq_info am33xx_ecap2_irqs[] = {
 
 static struct omap_hwmod am33xx_ecap2_hwmod = {
         .name           = "ecap2",
+        .class          = &am33xx_ecap_hwmod_class,
+        .clkdm_name     = "l4ls_clkdm",
         .mpu_irqs       = am33xx_ecap2_irqs,
-        .class          = &am33xx_epwmss_hwmod_class,
+        .main_clk       = "l4ls_gclk",
+};
+
+/* eqep2 */
+static struct omap_hwmod_irq_info am33xx_eqep2_irqs[] = {
+        { .irq = 89 + OMAP_INTC_START, },
+        { .irq = -1 },
+};
+
+static struct omap_hwmod am33xx_eqep2_hwmod = {
+        .name           = "eqep2",
+        .class          = &am33xx_eqep_hwmod_class,
         .clkdm_name     = "l4ls_clkdm",
+        .mpu_irqs       = am33xx_eqep2_irqs,
+        .main_clk       = "l4ls_gclk",
+};
+
+/* ehrpwm2 */
+static struct omap_hwmod_irq_info am33xx_ehrpwm2_irqs[] = {
+        { .name = "int", .irq = 39 + OMAP_INTC_START, },
+        { .name = "tzint", .irq = 60 + OMAP_INTC_START, },
+        { .irq = -1 },
+};
+
+static struct omap_hwmod am33xx_ehrpwm2_hwmod = {
+        .name           = "ehrpwm2",
+        .class          = &am33xx_ehrpwm_hwmod_class,
+        .clkdm_name     = "l4ls_clkdm",
+        .mpu_irqs       = am33xx_ehrpwm2_irqs,
         .main_clk       = "l4ls_gclk",
-        .prcm           = {
-                .omap4  = {
-                        .clkctrl_offs   = AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET,
-                        .modulemode     = MODULEMODE_SWCTRL,
-                },
-        },
 };
 
 /*
@@ -1824,6 +1883,7 @@ static struct omap_hwmod am33xx_tptc0_hwmod = {
         .class          = &am33xx_tptc_hwmod_class,
         .clkdm_name     = "l3_clkdm",
         .mpu_irqs       = am33xx_tptc0_irqs,
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
         .main_clk       = "l3_gclk",
         .prcm           = {
                 .omap4  = {
@@ -2496,7 +2556,6 @@ static struct omap_hwmod_addr_space am33xx_cpgmac0_addr_space[] = {
         {
                 .pa_start       = 0x4a100000,
                 .pa_end         = 0x4a100000 + SZ_2K - 1,
-                .flags          = ADDR_TYPE_RT,
         },
         /* cpsw wr */
         {
@@ -2547,162 +2606,202 @@ static struct omap_hwmod_ocp_if am33xx_l4_ls__elm = {
         .user           = OCP_USER_MPU,
 };
 
-/*
- * Splitting the resources to handle access of PWMSS config space
- * and module specific part independently
- */
-static struct omap_hwmod_addr_space am33xx_ehrpwm0_addr_space[] = {
+static struct omap_hwmod_addr_space am33xx_epwmss0_addr_space[] = {
         {
                 .pa_start       = 0x48300000,
                 .pa_end         = 0x48300000 + SZ_16 - 1,
                 .flags          = ADDR_TYPE_RT
         },
-        {
-                .pa_start       = 0x48300200,
-                .pa_end         = 0x48300200 + SZ_256 - 1,
-                .flags          = ADDR_TYPE_RT
-        },
         { }
 };
 
-static struct omap_hwmod_ocp_if am33xx_l4_ls__ehrpwm0 = {
+static struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0 = {
         .master         = &am33xx_l4_ls_hwmod,
-        .slave          = &am33xx_ehrpwm0_hwmod,
+        .slave          = &am33xx_epwmss0_hwmod,
         .clk            = "l4ls_gclk",
-        .addr           = am33xx_ehrpwm0_addr_space,
+        .addr           = am33xx_epwmss0_addr_space,
         .user           = OCP_USER_MPU,
 };
 
-/*
- * Splitting the resources to handle access of PWMSS config space
- * and module specific part independently
- */
-static struct omap_hwmod_addr_space am33xx_ehrpwm1_addr_space[] = {
-        {
-                .pa_start       = 0x48302000,
-                .pa_end         = 0x48302000 + SZ_16 - 1,
-                .flags          = ADDR_TYPE_RT
-        },
+static struct omap_hwmod_addr_space am33xx_ecap0_addr_space[] = {
         {
-                .pa_start       = 0x48302200,
-                .pa_end         = 0x48302200 + SZ_256 - 1,
-                .flags          = ADDR_TYPE_RT
+                .pa_start       = 0x48300100,
+                .pa_end         = 0x48300100 + SZ_128 - 1,
         },
         { }
 };
 
-static struct omap_hwmod_ocp_if am33xx_l4_ls__ehrpwm1 = {
-        .master         = &am33xx_l4_ls_hwmod,
-        .slave          = &am33xx_ehrpwm1_hwmod,
+static struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0 = {
+        .master         = &am33xx_epwmss0_hwmod,
+        .slave          = &am33xx_ecap0_hwmod,
         .clk            = "l4ls_gclk",
-        .addr           = am33xx_ehrpwm1_addr_space,
+        .addr           = am33xx_ecap0_addr_space,
         .user           = OCP_USER_MPU,
 };
 
-/*
- * Splitting the resources to handle access of PWMSS config space
- * and module specific part independently
- */
-static struct omap_hwmod_addr_space am33xx_ehrpwm2_addr_space[] = {
+static struct omap_hwmod_addr_space am33xx_eqep0_addr_space[] = {
         {
-                .pa_start       = 0x48304000,
-                .pa_end         = 0x48304000 + SZ_16 - 1,
-                .flags          = ADDR_TYPE_RT
-        },
-        {
-                .pa_start       = 0x48304200,
-                .pa_end         = 0x48304200 + SZ_256 - 1,
-                .flags          = ADDR_TYPE_RT
+                .pa_start       = 0x48300180,
+                .pa_end         = 0x48300180 + SZ_128 - 1,
         },
         { }
 };
 
-static struct omap_hwmod_ocp_if am33xx_l4_ls__ehrpwm2 = {
-        .master         = &am33xx_l4_ls_hwmod,
-        .slave          = &am33xx_ehrpwm2_hwmod,
+static struct omap_hwmod_ocp_if am33xx_epwmss0__eqep0 = {
+        .master         = &am33xx_epwmss0_hwmod,
+        .slave          = &am33xx_eqep0_hwmod,
         .clk            = "l4ls_gclk",
-        .addr           = am33xx_ehrpwm2_addr_space,
+        .addr           = am33xx_eqep0_addr_space,
         .user           = OCP_USER_MPU,
 };
 
-/*
- * Splitting the resources to handle access of PWMSS config space
- * and module specific part independently
- */
-static struct omap_hwmod_addr_space am33xx_ecap0_addr_space[] = {
-        {
-                .pa_start       = 0x48300000,
-                .pa_end         = 0x48300000 + SZ_16 - 1,
-                .flags          = ADDR_TYPE_RT
-        },
+static struct omap_hwmod_addr_space am33xx_ehrpwm0_addr_space[] = {
         {
-                .pa_start       = 0x48300100,
-                .pa_end         = 0x48300100 + SZ_256 - 1,
-                .flags          = ADDR_TYPE_RT
+                .pa_start       = 0x48300200,
+                .pa_end         = 0x48300200 + SZ_128 - 1,
         },
         { }
 };
 
-static struct omap_hwmod_ocp_if am33xx_l4_ls__ecap0 = {
-        .master         = &am33xx_l4_ls_hwmod,
-        .slave          = &am33xx_ecap0_hwmod,
+static struct omap_hwmod_ocp_if am33xx_epwmss0__ehrpwm0 = {
+        .master         = &am33xx_epwmss0_hwmod,
+        .slave          = &am33xx_ehrpwm0_hwmod,
         .clk            = "l4ls_gclk",
-        .addr           = am33xx_ecap0_addr_space,
+        .addr           = am33xx_ehrpwm0_addr_space,
         .user           = OCP_USER_MPU,
 };
 
-/*
- * Splitting the resources to handle access of PWMSS config space
- * and module specific part independently
- */
-static struct omap_hwmod_addr_space am33xx_ecap1_addr_space[] = {
+
+static struct omap_hwmod_addr_space am33xx_epwmss1_addr_space[] = {
         {
                 .pa_start       = 0x48302000,
                 .pa_end         = 0x48302000 + SZ_16 - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
+};
+
+static struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1 = {
+        .master         = &am33xx_l4_ls_hwmod,
+        .slave          = &am33xx_epwmss1_hwmod,
+        .clk            = "l4ls_gclk",
+        .addr           = am33xx_epwmss1_addr_space,
+        .user           = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space am33xx_ecap1_addr_space[] = {
         {
                 .pa_start       = 0x48302100,
-                .pa_end         = 0x48302100 + SZ_256 - 1,
-                .flags          = ADDR_TYPE_RT
+                .pa_end         = 0x48302100 + SZ_128 - 1,
         },
         { }
 };
 
-static struct omap_hwmod_ocp_if am33xx_l4_ls__ecap1 = {
-        .master         = &am33xx_l4_ls_hwmod,
+static struct omap_hwmod_ocp_if am33xx_epwmss1__ecap1 = {
+        .master         = &am33xx_epwmss1_hwmod,
         .slave          = &am33xx_ecap1_hwmod,
         .clk            = "l4ls_gclk",
         .addr           = am33xx_ecap1_addr_space,
         .user           = OCP_USER_MPU,
 };
 
-/*
- * Splitting the resources to handle access of PWMSS config space
- * and module specific part independently
- */
-static struct omap_hwmod_addr_space am33xx_ecap2_addr_space[] = {
+static struct omap_hwmod_addr_space am33xx_eqep1_addr_space[] = {
+        {
+                .pa_start       = 0x48302180,
+                .pa_end         = 0x48302180 + SZ_128 - 1,
+        },
+        { }
+};
+
+static struct omap_hwmod_ocp_if am33xx_epwmss1__eqep1 = {
+        .master         = &am33xx_epwmss1_hwmod,
+        .slave          = &am33xx_eqep1_hwmod,
+        .clk            = "l4ls_gclk",
+        .addr           = am33xx_eqep1_addr_space,
+        .user           = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space am33xx_ehrpwm1_addr_space[] = {
+        {
+                .pa_start       = 0x48302200,
+                .pa_end         = 0x48302200 + SZ_128 - 1,
+        },
+        { }
+};
+
+static struct omap_hwmod_ocp_if am33xx_epwmss1__ehrpwm1 = {
+        .master         = &am33xx_epwmss1_hwmod,
+        .slave          = &am33xx_ehrpwm1_hwmod,
+        .clk            = "l4ls_gclk",
+        .addr           = am33xx_ehrpwm1_addr_space,
+        .user           = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space am33xx_epwmss2_addr_space[] = {
         {
                 .pa_start       = 0x48304000,
                 .pa_end         = 0x48304000 + SZ_16 - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
+};
+
+static struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2 = {
+        .master         = &am33xx_l4_ls_hwmod,
+        .slave          = &am33xx_epwmss2_hwmod,
+        .clk            = "l4ls_gclk",
+        .addr           = am33xx_epwmss2_addr_space,
+        .user           = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space am33xx_ecap2_addr_space[] = {
         {
                 .pa_start       = 0x48304100,
-                .pa_end         = 0x48304100 + SZ_256 - 1,
-                .flags          = ADDR_TYPE_RT
+                .pa_end         = 0x48304100 + SZ_128 - 1,
         },
         { }
 };
 
-static struct omap_hwmod_ocp_if am33xx_l4_ls__ecap2 = {
-        .master         = &am33xx_l4_ls_hwmod,
+static struct omap_hwmod_ocp_if am33xx_epwmss2__ecap2 = {
+        .master         = &am33xx_epwmss2_hwmod,
         .slave          = &am33xx_ecap2_hwmod,
         .clk            = "l4ls_gclk",
         .addr           = am33xx_ecap2_addr_space,
         .user           = OCP_USER_MPU,
 };
 
+static struct omap_hwmod_addr_space am33xx_eqep2_addr_space[] = {
+        {
+                .pa_start       = 0x48304180,
+                .pa_end         = 0x48304180 + SZ_128 - 1,
+        },
+        { }
+};
+
+static struct omap_hwmod_ocp_if am33xx_epwmss2__eqep2 = {
+        .master         = &am33xx_epwmss2_hwmod,
+        .slave          = &am33xx_eqep2_hwmod,
+        .clk            = "l4ls_gclk",
+        .addr           = am33xx_eqep2_addr_space,
+        .user           = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space am33xx_ehrpwm2_addr_space[] = {
+        {
+                .pa_start       = 0x48304200,
+                .pa_end         = 0x48304200 + SZ_128 - 1,
+        },
+        { }
+};
+
+static struct omap_hwmod_ocp_if am33xx_epwmss2__ehrpwm2 = {
+        .master         = &am33xx_epwmss2_hwmod,
+        .slave          = &am33xx_ehrpwm2_hwmod,
+        .clk            = "l4ls_gclk",
+        .addr           = am33xx_ehrpwm2_addr_space,
+        .user           = OCP_USER_MPU,
+};
+
 /* l3s cfg -> gpmc */
 static struct omap_hwmod_addr_space am33xx_gpmc_addr_space[] = {
         {
@@ -3328,6 +3427,13 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = {
         .flags          = OCPIF_SWSUP_IDLE,
 };
 
+/* l3 main -> ocmc */
+static struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = {
+        .master         = &am33xx_l3_main_hwmod,
+        .slave          = &am33xx_ocmcram_hwmod,
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
         &am33xx_l4_fw__emif_fw,
         &am33xx_l3_main__emif,
@@ -3385,12 +3491,18 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
         &am33xx_l4_ls__uart6,
         &am33xx_l4_ls__spinlock,
         &am33xx_l4_ls__elm,
-        &am33xx_l4_ls__ehrpwm0,
-        &am33xx_l4_ls__ehrpwm1,
-        &am33xx_l4_ls__ehrpwm2,
-        &am33xx_l4_ls__ecap0,
-        &am33xx_l4_ls__ecap1,
-        &am33xx_l4_ls__ecap2,
+        &am33xx_l4_ls__epwmss0,
+        &am33xx_epwmss0__ecap0,
+        &am33xx_epwmss0__eqep0,
+        &am33xx_epwmss0__ehrpwm0,
+        &am33xx_l4_ls__epwmss1,
+        &am33xx_epwmss1__ecap1,
+        &am33xx_epwmss1__eqep1,
+        &am33xx_epwmss1__ehrpwm1,
+        &am33xx_l4_ls__epwmss2,
+        &am33xx_epwmss2__ecap2,
+        &am33xx_epwmss2__eqep2,
+        &am33xx_epwmss2__ehrpwm2,
         &am33xx_l3_s__gpmc,
         &am33xx_l3_main__lcdc,
         &am33xx_l4_ls__mcspi0,
@@ -3398,6 +3510,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
         &am33xx_l3_main__tptc0,
         &am33xx_l3_main__tptc1,
         &am33xx_l3_main__tptc2,
+        &am33xx_l3_main__ocmc,
         &am33xx_l3_s__usbss,
         &am33xx_l4_hs__cpgmac0,
         &am33xx_cpgmac0__mdio,
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 8bb2628df34e..ac7e03ec952f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3493,7 +3493,12 @@ static struct omap_hwmod am35xx_emac_hwmod = {
         .name           = "davinci_emac",
         .mpu_irqs       = am35xx_emac_mpu_irqs,
         .class          = &am35xx_emac_class,
-        .flags          = HWMOD_NO_IDLEST,
+        /*
+         * According to Mark Greer, the MPU will not return from WFI
+         * when the EMAC signals an interrupt.
+         * http://www.spinics.net/lists/arm-kernel/msg174734.html
+         */
+        .flags          = (HWMOD_NO_IDLEST | HWMOD_BLOCK_WFI),
 };
 
 /* l3_core -> davinci emac interface */
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 793f54ac7d14..0e47d2e1687c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -322,6 +322,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc = {
 static struct omap_hwmod_class omap44xx_aess_hwmod_class = {
         .name   = "aess",
         .sysc   = &omap44xx_aess_sysc,
+        .enable_preprogram = omap_hwmod_aess_preprogram,
 };
 
 /* aess */
@@ -348,7 +349,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_aess_irqs,
         .sdma_reqs      = omap44xx_aess_sdma_reqs,
-        .main_clk       = "aess_fck",
+        .main_clk       = "aess_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET,
@@ -616,7 +617,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_dmic_irqs,
         .sdma_reqs      = omap44xx_dmic_sdma_reqs,
-        .main_clk       = "dmic_fck",
+        .main_clk       = "func_dmic_abe_gfclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET,
@@ -1161,7 +1162,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
         .class          = &omap44xx_gpio_hwmod_class,
         .clkdm_name     = "l4_wkup_clkdm",
         .mpu_irqs       = omap44xx_gpio1_irqs,
-        .main_clk       = "gpio1_ick",
+        .main_clk       = "l4_wkup_clk_mux_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET,
@@ -1190,7 +1191,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio2_irqs,
-        .main_clk       = "gpio2_ick",
+        .main_clk       = "l4_div_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET,
@@ -1219,7 +1220,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio3_irqs,
-        .main_clk       = "gpio3_ick",
+        .main_clk       = "l4_div_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET,
@@ -1248,7 +1249,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio4_irqs,
-        .main_clk       = "gpio4_ick",
+        .main_clk       = "l4_div_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET,
@@ -1277,7 +1278,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio5_irqs,
-        .main_clk       = "gpio5_ick",
+        .main_clk       = "l4_div_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET,
@@ -1306,7 +1307,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .mpu_irqs       = omap44xx_gpio6_irqs,
-        .main_clk       = "gpio6_ick",
+        .main_clk       = "l4_div_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET,
@@ -1405,7 +1406,7 @@ static struct omap_hwmod omap44xx_gpu_hwmod = {
         .class          = &omap44xx_gpu_hwmod_class,
         .clkdm_name     = "l3_gfx_clkdm",
         .mpu_irqs       = omap44xx_gpu_irqs,
-        .main_clk       = "gpu_fck",
+        .main_clk       = "sgx_clk_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_GFX_GFX_CLKCTRL_OFFSET,
@@ -1446,7 +1447,7 @@ static struct omap_hwmod omap44xx_hdq1w_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .flags          = HWMOD_INIT_NO_RESET, /* XXX temporary */
         .mpu_irqs       = omap44xx_hdq1w_irqs,
-        .main_clk       = "hdq1w_fck",
+        .main_clk       = "func_12m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_HDQ1W_CLKCTRL_OFFSET,
@@ -1550,7 +1551,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
         .flags          = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_i2c1_irqs,
         .sdma_reqs      = omap44xx_i2c1_sdma_reqs,
-        .main_clk       = "i2c1_fck",
+        .main_clk       = "func_96m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET,
@@ -1580,7 +1581,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
         .flags          = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_i2c2_irqs,
         .sdma_reqs      = omap44xx_i2c2_sdma_reqs,
-        .main_clk       = "i2c2_fck",
+        .main_clk       = "func_96m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET,
@@ -1610,7 +1611,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
         .flags          = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_i2c3_irqs,
         .sdma_reqs      = omap44xx_i2c3_sdma_reqs,
-        .main_clk       = "i2c3_fck",
+        .main_clk       = "func_96m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET,
@@ -1640,7 +1641,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
         .flags          = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_i2c4_irqs,
         .sdma_reqs      = omap44xx_i2c4_sdma_reqs,
-        .main_clk       = "i2c4_fck",
+        .main_clk       = "func_96m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET,
@@ -1743,7 +1744,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
         .clkdm_name     = "iss_clkdm",
         .mpu_irqs       = omap44xx_iss_irqs,
         .sdma_reqs      = omap44xx_iss_sdma_reqs,
-        .main_clk       = "iss_fck",
+        .main_clk       = "ducati_clk_mux_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET,
@@ -1785,7 +1786,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
         .mpu_irqs       = omap44xx_iva_irqs,
         .rst_lines      = omap44xx_iva_resets,
         .rst_lines_cnt  = ARRAY_SIZE(omap44xx_iva_resets),
-        .main_clk       = "iva_fck",
+        .main_clk       = "dpll_iva_m5x2_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET,
@@ -1829,7 +1830,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
         .class          = &omap44xx_kbd_hwmod_class,
         .clkdm_name     = "l4_wkup_clkdm",
         .mpu_irqs       = omap44xx_kbd_irqs,
-        .main_clk       = "kbd_fck",
+        .main_clk       = "sys_32k_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET,
@@ -1920,7 +1921,7 @@ static struct omap_hwmod omap44xx_mcasp_hwmod = {
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_mcasp_irqs,
         .sdma_reqs      = omap44xx_mcasp_sdma_reqs,
-        .main_clk       = "mcasp_fck",
+        .main_clk       = "func_mcasp_abe_gfclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_MCASP_CLKCTRL_OFFSET,
@@ -1972,7 +1973,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_mcbsp1_irqs,
         .sdma_reqs      = omap44xx_mcbsp1_sdma_reqs,
-        .main_clk       = "mcbsp1_fck",
+        .main_clk       = "func_mcbsp1_gfclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET,
@@ -2007,7 +2008,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_mcbsp2_irqs,
         .sdma_reqs      = omap44xx_mcbsp2_sdma_reqs,
-        .main_clk       = "mcbsp2_fck",
+        .main_clk       = "func_mcbsp2_gfclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET,
@@ -2042,7 +2043,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_mcbsp3_irqs,
         .sdma_reqs      = omap44xx_mcbsp3_sdma_reqs,
-        .main_clk       = "mcbsp3_fck",
+        .main_clk       = "func_mcbsp3_gfclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET,
@@ -2077,7 +2078,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_mcbsp4_irqs,
         .sdma_reqs      = omap44xx_mcbsp4_sdma_reqs,
-        .main_clk       = "mcbsp4_fck",
+        .main_clk       = "per_mcbsp4_gfclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET,
@@ -2140,7 +2141,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
         .flags          = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
         .mpu_irqs       = omap44xx_mcpdm_irqs,
         .sdma_reqs      = omap44xx_mcpdm_sdma_reqs,
-        .main_clk       = "mcpdm_fck",
+        .main_clk       = "pad_clks_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET,
@@ -2201,7 +2202,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_mcspi1_irqs,
         .sdma_reqs      = omap44xx_mcspi1_sdma_reqs,
-        .main_clk       = "mcspi1_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET,
@@ -2237,7 +2238,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_mcspi2_irqs,
         .sdma_reqs      = omap44xx_mcspi2_sdma_reqs,
-        .main_clk       = "mcspi2_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET,
@@ -2273,7 +2274,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_mcspi3_irqs,
         .sdma_reqs      = omap44xx_mcspi3_sdma_reqs,
-        .main_clk       = "mcspi3_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET,
@@ -2307,7 +2308,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_mcspi4_irqs,
         .sdma_reqs      = omap44xx_mcspi4_sdma_reqs,
-        .main_clk       = "mcspi4_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET,
@@ -2363,7 +2364,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
         .clkdm_name     = "l3_init_clkdm",
         .mpu_irqs       = omap44xx_mmc1_irqs,
         .sdma_reqs      = omap44xx_mmc1_sdma_reqs,
-        .main_clk       = "mmc1_fck",
+        .main_clk       = "hsmmc1_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET,
@@ -2392,7 +2393,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
         .clkdm_name     = "l3_init_clkdm",
         .mpu_irqs       = omap44xx_mmc2_irqs,
         .sdma_reqs      = omap44xx_mmc2_sdma_reqs,
-        .main_clk       = "mmc2_fck",
+        .main_clk       = "hsmmc2_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET,
@@ -2420,7 +2421,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_mmc3_irqs,
         .sdma_reqs      = omap44xx_mmc3_sdma_reqs,
-        .main_clk       = "mmc3_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET,
@@ -2448,7 +2449,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_mmc4_irqs,
         .sdma_reqs      = omap44xx_mmc4_sdma_reqs,
-        .main_clk       = "mmc4_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET,
@@ -2476,7 +2477,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_mmc5_irqs,
         .sdma_reqs      = omap44xx_mmc5_sdma_reqs,
-        .main_clk       = "mmc5_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET,
@@ -2702,13 +2703,6 @@ static struct resource omap44xx_usb_phy_and_pll_addrs[] = {
                 .end            = 0x4a0ae000,
                 .flags          = IORESOURCE_MEM,
         },
-        {
-                /* XXX: Remove this once control module driver is in place */
-                .name           = "ctrl_dev",
-                .start          = 0x4a002300,
-                .end            = 0x4a002303,
-                .flags          = IORESOURCE_MEM,
-        },
         { }
 };
 
@@ -2725,7 +2719,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
         .name           = "ocp2scp_usb_phy",
         .class          = &omap44xx_ocp2scp_hwmod_class,
         .clkdm_name     = "l3_init_clkdm",
-        .main_clk       = "ocp2scp_usb_phy_phy_48m",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL_OFFSET,
@@ -3162,7 +3156,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
         .clkdm_name     = "l4_wkup_clkdm",
         .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer1_irqs,
-        .main_clk       = "timer1_fck",
+        .main_clk       = "dmt1_clk_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET,
@@ -3185,7 +3179,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer2_irqs,
-        .main_clk       = "timer2_fck",
+        .main_clk       = "cm2_dm2_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET,
@@ -3206,7 +3200,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
         .class          = &omap44xx_timer_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_timer3_irqs,
-        .main_clk       = "timer3_fck",
+        .main_clk       = "cm2_dm3_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET,
@@ -3227,7 +3221,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
         .class          = &omap44xx_timer_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_timer4_irqs,
-        .main_clk       = "timer4_fck",
+        .main_clk       = "cm2_dm4_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET,
@@ -3248,7 +3242,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
         .class          = &omap44xx_timer_hwmod_class,
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_timer5_irqs,
-        .main_clk       = "timer5_fck",
+        .main_clk       = "timer5_sync_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET,
@@ -3270,8 +3264,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
         .class          = &omap44xx_timer_hwmod_class,
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_timer6_irqs,
-
-        .main_clk       = "timer6_fck",
+        .main_clk       = "timer6_sync_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET,
@@ -3293,7 +3286,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
         .class          = &omap44xx_timer_hwmod_class,
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_timer7_irqs,
-        .main_clk       = "timer7_fck",
+        .main_clk       = "timer7_sync_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET,
@@ -3315,7 +3308,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
         .class          = &omap44xx_timer_hwmod_class,
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_timer8_irqs,
-        .main_clk       = "timer8_fck",
+        .main_clk       = "timer8_sync_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET,
@@ -3337,7 +3330,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
         .class          = &omap44xx_timer_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_timer9_irqs,
-        .main_clk       = "timer9_fck",
+        .main_clk       = "cm2_dm9_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET,
@@ -3360,7 +3353,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer10_irqs,
-        .main_clk       = "timer10_fck",
+        .main_clk       = "cm2_dm10_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET,
@@ -3382,7 +3375,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
         .class          = &omap44xx_timer_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_timer11_irqs,
-        .main_clk       = "timer11_fck",
+        .main_clk       = "cm2_dm11_mux",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET,
@@ -3433,7 +3426,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_uart1_irqs,
         .sdma_reqs      = omap44xx_uart1_sdma_reqs,
-        .main_clk       = "uart1_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET,
@@ -3461,7 +3454,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_uart2_irqs,
         .sdma_reqs      = omap44xx_uart2_sdma_reqs,
-        .main_clk       = "uart2_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET,
@@ -3490,7 +3483,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
         .flags          = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
         .mpu_irqs       = omap44xx_uart3_irqs,
         .sdma_reqs      = omap44xx_uart3_sdma_reqs,
-        .main_clk       = "uart3_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET,
@@ -3518,7 +3511,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
         .clkdm_name     = "l4_per_clkdm",
         .mpu_irqs       = omap44xx_uart4_irqs,
         .sdma_reqs      = omap44xx_uart4_sdma_reqs,
-        .main_clk       = "uart4_fck",
+        .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET,
@@ -3797,7 +3790,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
         .class          = &omap44xx_wd_timer_hwmod_class,
         .clkdm_name     = "l4_wkup_clkdm",
         .mpu_irqs       = omap44xx_wd_timer2_irqs,
-        .main_clk       = "wd_timer2_fck",
+        .main_clk       = "sys_32k_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET,
@@ -3818,7 +3811,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
         .class          = &omap44xx_wd_timer_hwmod_class,
         .clkdm_name     = "abe_clkdm",
         .mpu_irqs       = omap44xx_wd_timer3_irqs,
-        .main_clk       = "wd_timer3_fck",
+        .main_clk       = "sys_32k_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET,
@@ -4249,6 +4242,27 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = {
 
 static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {
         {
+                .name           = "dmem",
+                .pa_start       = 0x40180000,
+                .pa_end         = 0x4018ffff
+        },
+        {
+                .name           = "cmem",
+                .pa_start       = 0x401a0000,
+                .pa_end         = 0x401a1fff
+        },
+        {
+                .name           = "smem",
+                .pa_start       = 0x401c0000,
+                .pa_end         = 0x401c5fff
+        },
+        {
+                .name           = "pmem",
+                .pa_start       = 0x401e0000,
+                .pa_end         = 0x401e1fff
+        },
+        {
+                .name           = "mpu",
                 .pa_start       = 0x401f1000,
                 .pa_end         = 0x401f13ff,
                 .flags          = ADDR_TYPE_RT
@@ -4267,6 +4281,27 @@ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess = {
 
 static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {
         {
+                .name           = "dmem_dma",
+                .pa_start       = 0x49080000,
+                .pa_end         = 0x4908ffff
+        },
+        {
+                .name           = "cmem_dma",
+                .pa_start       = 0x490a0000,
+                .pa_end         = 0x490a1fff
+        },
+        {
+                .name           = "smem_dma",
+                .pa_start       = 0x490c0000,
+                .pa_end         = 0x490c5fff
+        },
+        {
+                .name           = "pmem_dma",
+                .pa_start       = 0x490e0000,
+                .pa_end         = 0x490e1fff
+        },
+        {
+                .name           = "dma",
                 .pa_start       = 0x490f1000,
                 .pa_end         = 0x490f13ff,
                 .flags          = ADDR_TYPE_RT
@@ -6156,12 +6191,6 @@ static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = {
                 .pa_end         = 0x4a0ab7ff,
                 .flags          = ADDR_TYPE_RT
         },
-        {
-                /* XXX: Remove this once control module driver is in place */
-                .pa_start       = 0x4a00233c,
-                .pa_end         = 0x4a00233f,
-                .flags          = ADDR_TYPE_RT
-        },
         { }
 };
 
@@ -6282,7 +6311,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
         &omap44xx_l3_main_1__l3_main_3,
         &omap44xx_l3_main_2__l3_main_3,
         &omap44xx_l4_cfg__l3_main_3,
-        /* &omap44xx_aess__l4_abe, */
+        &omap44xx_aess__l4_abe,
         &omap44xx_dsp__l4_abe,
         &omap44xx_l3_main_1__l4_abe,
         &omap44xx_mpu__l4_abe,
@@ -6291,8 +6320,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
         &omap44xx_l4_cfg__l4_wkup,
         &omap44xx_mpu__mpu_private,
         &omap44xx_l4_cfg__ocp_wp_noc,
-        /* &omap44xx_l4_abe__aess, */
-        /* &omap44xx_l4_abe__aess_dma, */
+        &omap44xx_l4_abe__aess,
+        &omap44xx_l4_abe__aess_dma,
         &omap44xx_l3_main_2__c2c,
         &omap44xx_l4_wkup__counter_32k,
         &omap44xx_l4_cfg__ctrl_module_core,
diff --git a/arch/arm/mach-omap2/omap_hwmod_reset.c b/arch/arm/mach-omap2/omap_hwmod_reset.c
new file mode 100644
index 000000000000..65e186c9df55
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_reset.c
@@ -0,0 +1,53 @@
+/*
+ * OMAP IP block custom reset and preprogramming stubs
+ *
+ * Copyright (C) 2012 Texas Instruments, Inc.
+ * Paul Walmsley
+ *
+ * A small number of IP blocks need custom reset and preprogramming
+ * functions.  The stubs in this file provide a standard way for the
+ * hwmod code to call these functions, which are to be located under
+ * drivers/.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/errno.h>
+
+#include <sound/aess.h>
+
+#include "omap_hwmod.h"
+
+/**
+ * omap_hwmod_aess_preprogram - enable AESS internal autogating
+ * @oh: struct omap_hwmod *
+ *
+ * The AESS will not IdleAck to the PRCM until its internal autogating
+ * is enabled.  Since internal autogating is disabled by default after
+ * AESS reset, we must enable autogating after the hwmod code resets
+ * the AESS.  Returns 0.
+ */
+int omap_hwmod_aess_preprogram(struct omap_hwmod *oh)
+{
+        void __iomem *va;
+
+        va = omap_hwmod_get_mpu_rt_va(oh);
+        if (!va)
+                return -EINVAL;
+
+        aess_enable_autogating(va);
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index e237602e10ea..eb8a25de67ed 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -63,7 +63,7 @@ static int __init omap4430_phy_power_down(void)
 
         return 0;
 }
-early_initcall(omap4430_phy_power_down);
+omap_early_initcall(omap4430_phy_power_down);
 
 void am35x_musb_reset(void)
 {
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index 62772e0e0d69..fc67add76444 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -168,4 +168,4 @@ int __init omap3_opp_init(void)
 
         return r;
 }
-device_initcall(omap3_opp_init);
+omap_device_initcall(omap3_opp_init);
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index d470b728e720..1ef7a3e5ce4a 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -177,4 +177,4 @@ int __init omap4_opp_init(void)
                         ARRAY_SIZE(omap446x_opp_def_list));
         return r;
 }
-device_initcall(omap4_opp_init);
+omap_device_initcall(omap4_opp_init);
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 548547e14796..0b339861d751 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -83,10 +83,8 @@ static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
                 strncmp(clkdm->name, "dpll", 4) == 0)
                 return 0;
 
-        seq_printf(s, "%s->%s (%d)", clkdm->name,
-                        clkdm->pwrdm.ptr->name,
-                        atomic_read(&clkdm->usecount));
-        seq_printf(s, "\n");
+        seq_printf(s, "%s->%s (%d)\n", clkdm->name, clkdm->pwrdm.ptr->name,
+                   clkdm->usecount);
 
         return 0;
 }
@@ -279,6 +277,6 @@ static int __init pm_dbg_init(void)
 
         return 0;
 }
-arch_initcall(pm_dbg_init);
+omap_arch_initcall(pm_dbg_init);
 
 #endif
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index f4b3143a8b1d..673a4c1d1d76 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -32,8 +32,6 @@
 #include "pm.h"
 #include "twl-common.h"
 
-static struct omap_device_pm_latency *pm_lats;
-
 /*
  * omap_pm_suspend: points to a function that does the SoC-specific
  * suspend work
@@ -82,7 +80,7 @@ static int __init _init_omap_device(char *name)
                  __func__, name))
                 return -ENODEV;
 
-        pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
+        pdev = omap_device_build(oh->name, 0, oh, NULL, 0);
         if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
                  __func__, name))
                 return -ENODEV;
@@ -108,80 +106,19 @@ static void __init omap2_init_processor_devices(void)
         }
 }
 
-/* Types of sleep_switch used in omap_set_pwrdm_state */
-#define FORCEWAKEUP_SWITCH      0
-#define LOWPOWERSTATE_SWITCH    1
-
 int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
 {
+        /* XXX The usecount test is racy */
         if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
             !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING))
                 clkdm_allow_idle(clkdm);
         else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
-                 atomic_read(&clkdm->usecount) == 0)
+                 clkdm->usecount == 0)
                 clkdm_sleep(clkdm);
         return 0;
 }
 
 /*
- * This sets pwrdm state (other than mpu & core. Currently only ON &
- * RET are supported.
- */
-int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
-{
-        u8 curr_pwrst, next_pwrst;
-        int sleep_switch = -1, ret = 0, hwsup = 0;
-
-        if (!pwrdm || IS_ERR(pwrdm))
-                return -EINVAL;
-
-        while (!(pwrdm->pwrsts & (1 << pwrst))) {
-                if (pwrst == PWRDM_POWER_OFF)
-                        return ret;
-                pwrst--;
-        }
-
-        next_pwrst = pwrdm_read_next_pwrst(pwrdm);
-        if (next_pwrst == pwrst)
-                return ret;
-
-        curr_pwrst = pwrdm_read_pwrst(pwrdm);
-        if (curr_pwrst < PWRDM_POWER_ON) {
-                if ((curr_pwrst > pwrst) &&
-                        (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
-                        sleep_switch = LOWPOWERSTATE_SWITCH;
-                } else {
-                        hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
-                        clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
-                        sleep_switch = FORCEWAKEUP_SWITCH;
-                }
-        }
-
-        ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
-        if (ret)
-                pr_err("%s: unable to set power state of powerdomain: %s\n",
-                       __func__, pwrdm->name);
-
-        switch (sleep_switch) {
-        case FORCEWAKEUP_SWITCH:
-                if (hwsup)
-                        clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
-                else
-                        clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
-                break;
-        case LOWPOWERSTATE_SWITCH:
-                pwrdm_set_lowpwrstchange(pwrdm);
-                pwrdm_wait_transition(pwrdm);
-                pwrdm_state_switch(pwrdm);
-                break;
-        }
-
-        return ret;
-}
-
-
-
-/*
  * This API is to be called during init to set the various voltage
  * domains to the voltage as per the opp table. Typically we boot up
  * at the nominal voltage. So this function finds out the rate of
@@ -336,7 +273,7 @@ static int __init omap2_common_pm_init(void)
 
         return 0;
 }
-postcore_initcall(omap2_common_pm_init);
+omap_postcore_initcall(omap2_common_pm_init);
 
 int __init omap2_common_pm_late_init(void)
 {
@@ -345,19 +282,19 @@ int __init omap2_common_pm_late_init(void)
          * a completely different mechanism.
          * Disable this part if a DT blob is available.
          */
-        if (of_have_populated_dt())
-                return 0;
+        if (!of_have_populated_dt()) {
 
-        /* Init the voltage layer */
-        omap_pmic_late_init();
-        omap_voltage_late_init();
+                /* Init the voltage layer */
+                omap_pmic_late_init();
+                omap_voltage_late_init();
 
-        /* Initialize the voltages */
-        omap3_init_voltages();
-        omap4_init_voltages();
+                /* Initialize the voltages */
+                omap3_init_voltages();
+                omap4_init_voltages();
 
-        /* Smartreflex device init */
-        omap_devinit_smartreflex();
+                /* Smartreflex device init */
+                omap_devinit_smartreflex();
+        }
 
 #ifdef CONFIG_SUSPEND
         suspend_set_ops(&omap_pm_ops);
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index c22503b17abd..7bdd22afce69 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -33,7 +33,6 @@ static inline int omap4_idle_init(void)
 extern void *omap3_secure_ram_storage;
 extern void omap3_pm_off_mode_enable(int);
 extern void omap_sram_idle(void);
-extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
 extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
 extern int (*omap_pm_suspend)(void);
 
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index c333fa6dffa8..b59d93908341 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -54,7 +54,6 @@
 #include "powerdomain.h"
 #include "clockdomain.h"
 
-static void (*omap2_sram_idle)(void);
 static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
                                   void __iomem *sdrc_power);
 
@@ -90,11 +89,7 @@ static int omap2_enter_full_retention(void)
         omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
         omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
 
-        /*
-         * Set MPU powerdomain's next power state to RETENTION;
-         * preserve logic state during retention
-         */
-        pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET);
+        pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
         pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
 
         /* Workaround to kill USB */
@@ -137,15 +132,10 @@ no_sleep:
         /* Mask future PRCM-to-MPU interrupts */
         omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
 
-        return 0;
-}
-
-static int omap2_i2c_active(void)
-{
-        u32 l;
+        pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
+        pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON);
 
-        l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
-        return l & (OMAP2420_EN_I2C2_MASK | OMAP2420_EN_I2C1_MASK);
+        return 0;
 }
 
 static int sti_console_enabled;
@@ -172,10 +162,7 @@ static int omap2_allow_mpu_retention(void)
 
 static void omap2_enter_mpu_retention(void)
 {
-        /* Putting MPU into the WFI state while a transfer is active
-         * seems to cause the I2C block to timeout. Why? Good question. */
-        if (omap2_i2c_active())
-                return;
+        const int zero = 0;
 
         /* The peripherals seem not to be able to wake up the MPU when
          * it is in retention mode. */
@@ -186,17 +173,17 @@ static void omap2_enter_mpu_retention(void)
                 omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
 
                 /* Try to enter MPU retention */
-                omap2_prm_write_mod_reg((0x01 << OMAP_POWERSTATE_SHIFT) |
-                                  OMAP_LOGICRETSTATE_MASK,
-                                  MPU_MOD, OMAP2_PM_PWSTCTRL);
+                pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
+
         } else {
                 /* Block MPU retention */
-
-                omap2_prm_write_mod_reg(OMAP_LOGICRETSTATE_MASK, MPU_MOD,
-                                                 OMAP2_PM_PWSTCTRL);
+                pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
         }
 
-        omap2_sram_idle();
+        /* WFI */
+        asm("mcr p15, 0, %0, c7, c0, 4" : : "r" (zero) : "memory", "cc");
+
+        pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
 }
 
 static int omap2_can_sleep(void)
@@ -251,25 +238,17 @@ static void __init prcm_setup_regs(void)
         for (i = 0; i < num_mem_banks; i++)
                 pwrdm_set_mem_retst(core_pwrdm, i, PWRDM_POWER_RET);
 
-        /* Set CORE powerdomain's next power state to RETENTION */
-        pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
+        pwrdm_set_logic_retst(core_pwrdm, PWRDM_POWER_RET);
 
-        /*
-         * Set MPU powerdomain's next power state to RETENTION;
-         * preserve logic state during retention
-         */
         pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET);
-        pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
 
         /* Force-power down DSP, GFX powerdomains */
 
         pwrdm = clkdm_get_pwrdm(dsp_clkdm);
         pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF);
-        clkdm_sleep(dsp_clkdm);
 
         pwrdm = clkdm_get_pwrdm(gfx_clkdm);
         pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF);
-        clkdm_sleep(gfx_clkdm);
 
         /* Enable hardware-supervised idle for all clkdms */
         clkdm_for_each(omap_pm_clkdms_setup, NULL);
@@ -356,11 +335,9 @@ int __init omap2_pm_init(void)
         /*
          * We copy the assembler sleep/wakeup routines to SRAM.
          * These routines need to be in SRAM as that's the only
-         * memory the MPU can see when it wakes up.
+         * memory the MPU can see when it wakes up after the entire
+         * chip enters idle.
          */
-        omap2_sram_idle = omap_sram_push(omap24xx_idle_loop_suspend,
-                                         omap24xx_idle_loop_suspend_sz);
-
         omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend,
                                             omap24xx_cpu_suspend_sz);
 
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7be3622cfc85..2d93d8b23835 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -351,12 +351,10 @@ static void omap3_pm_idle(void)
         if (omap_irq_pending())
                 goto out;
 
-        trace_power_start(POWER_CSTATE, 1, smp_processor_id());
         trace_cpu_idle(1, smp_processor_id());
 
         omap_sram_idle();
 
-        trace_power_end(smp_processor_id());
         trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
 
 out:
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index aa6fd98f606e..ea62e75ef21d 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -77,10 +77,20 @@ static int omap4_pm_suspend(void)
                 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
                 pwrdm_set_logic_retst(pwrst->pwrdm, pwrst->saved_logic_state);
         }
-        if (ret)
+        if (ret) {
                 pr_crit("Could not enter target state in pm_suspend\n");
-        else
+                /*
+                 * OMAP4 chip PM currently works only with certain (newer)
+                 * versions of bootloaders. This is due to missing code in the
+                 * kernel to properly reset and initialize some devices.
+                 * Warn the user about the bootloader version being one of the
+                 * possible causes.
+                 * http://www.spinics.net/lists/arm-kernel/msg218641.html
+                 */
+                pr_warn("A possible cause could be an old bootloader - try u-boot >= v2012.07\n");
+        } else {
                 pr_info("Successfully put all powerdomains to target state\n");
+        }
 
         return 0;
 }
@@ -146,6 +156,13 @@ int __init omap4_pm_init(void)
         }
 
         pr_err("Power Management for TI OMAP4.\n");
+        /*
+         * OMAP4 chip PM currently works only with certain (newer)
+         * versions of bootloaders. This is due to missing code in the
+         * kernel to properly reset and initialize some devices.
+         * http://www.spinics.net/lists/arm-kernel/msg218641.html
+         */
+        pr_warn("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n");
 
         ret = pwrdm_for_each(pwrdms_setup, NULL);
         if (ret) {
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
index eb78ae7a3464..9debf822687c 100644
--- a/arch/arm/mach-omap2/pmu.c
+++ b/arch/arm/mach-omap2/pmu.c
@@ -48,8 +48,7 @@ static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[])
                 }
         }
 
-        omap_pmu_dev = omap_device_build_ss(dev_name, -1, oh, oh_num, NULL, 0,
-                                            NULL, 0, 0);
+        omap_pmu_dev = omap_device_build_ss(dev_name, -1, oh, oh_num, NULL, 0);
         WARN(IS_ERR(omap_pmu_dev), "Can't build omap_device for %s.\n",
              dev_name);
 
@@ -89,4 +88,4 @@ static int __init omap_init_pmu(void)
 
         return omap2_init_pmu(oh_num, oh_names);
 }
-subsys_initcall(omap_init_pmu);
+omap_subsys_initcall(omap_init_pmu);
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 36a69189b083..43ac20c15f4f 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -19,6 +19,7 @@
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/string.h>
+#include <linux/spinlock.h>
 #include <trace/events/power.h>
 
 #include "cm2xxx_3xxx.h"
@@ -42,6 +43,16 @@ enum {
         PWRDM_STATE_PREV,
 };
 
+/*
+ * Types of sleep_switch used internally in omap_set_pwrdm_state()
+ * and its associated static functions
+ *
+ * XXX Better documentation is needed here
+ */
+#define ALREADYACTIVE_SWITCH            0
+#define FORCEWAKEUP_SWITCH              1
+#define LOWPOWERSTATE_SWITCH            2
+#define ERROR_SWITCH                    3
 
 /* pwrdm_list contains all registered struct powerdomains */
 static LIST_HEAD(pwrdm_list);
@@ -101,6 +112,7 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
         pwrdm->voltdm.ptr = voltdm;
         INIT_LIST_HEAD(&pwrdm->voltdm_node);
         voltdm_add_pwrdm(voltdm, pwrdm);
+        spin_lock_init(&pwrdm->_lock);
 
         list_add(&pwrdm->node, &pwrdm_list);
 
@@ -112,7 +124,7 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
         for (i = 0; i < pwrdm->banks; i++)
                 pwrdm->ret_mem_off_counter[i] = 0;
 
-        pwrdm_wait_transition(pwrdm);
+        arch_pwrdm->pwrdm_wait_transition(pwrdm);
         pwrdm->state = pwrdm_read_pwrst(pwrdm);
         pwrdm->state_counter[pwrdm->state] = 1;
 
@@ -143,7 +155,7 @@ static void _update_logic_membank_counters(struct powerdomain *pwrdm)
 static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
 {
 
-        int prev, state, trace_state = 0;
+        int prev, next, state, trace_state = 0;
 
         if (pwrdm == NULL)
                 return -EINVAL;
@@ -164,9 +176,10 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
                  * If the power domain did not hit the desired state,
                  * generate a trace event with both the desired and hit states
                  */
-                if (state != prev) {
+                next = pwrdm_read_next_pwrst(pwrdm);
+                if (next != prev) {
                         trace_state = (PWRDM_TRACE_STATES_FLAG |
-                                       ((state & OMAP_POWERSTATE_MASK) << 8) |
+                                       ((next & OMAP_POWERSTATE_MASK) << 8) |
                                        ((prev & OMAP_POWERSTATE_MASK) << 0));
                         trace_power_domain_target(pwrdm->name, trace_state,
                                                   smp_processor_id());
@@ -199,6 +212,80 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
         return 0;
 }
 
+/**
+ * _pwrdm_save_clkdm_state_and_activate - prepare for power state change
+ * @pwrdm: struct powerdomain * to operate on
+ * @curr_pwrst: current power state of @pwrdm
+ * @pwrst: power state to switch to
+ * @hwsup: ptr to a bool to return whether the clkdm is hardware-supervised
+ *
+ * Determine whether the powerdomain needs to be turned on before
+ * attempting to switch power states.  Called by
+ * omap_set_pwrdm_state().  NOTE that if the powerdomain contains
+ * multiple clockdomains, this code assumes that the first clockdomain
+ * supports software-supervised wakeup mode - potentially a problem.
+ * Returns the power state switch mode currently in use (see the
+ * "Types of sleep_switch" comment above).
+ */
+static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm,
+                                               u8 curr_pwrst, u8 pwrst,
+                                               bool *hwsup)
+{
+        u8 sleep_switch;
+
+        if (curr_pwrst < 0) {
+                WARN_ON(1);
+                sleep_switch = ERROR_SWITCH;
+        } else if (curr_pwrst < PWRDM_POWER_ON) {
+                if (curr_pwrst > pwrst &&
+                    pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE &&
+                    arch_pwrdm->pwrdm_set_lowpwrstchange) {
+                        sleep_switch = LOWPOWERSTATE_SWITCH;
+                } else {
+                        *hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
+                        clkdm_wakeup_nolock(pwrdm->pwrdm_clkdms[0]);
+                        sleep_switch = FORCEWAKEUP_SWITCH;
+                }
+        } else {
+                sleep_switch = ALREADYACTIVE_SWITCH;
+        }
+
+        return sleep_switch;
+}
+
+/**
+ * _pwrdm_restore_clkdm_state - restore the clkdm hwsup state after pwrst change
+ * @pwrdm: struct powerdomain * to operate on
+ * @sleep_switch: return value from _pwrdm_save_clkdm_state_and_activate()
+ * @hwsup: should @pwrdm's first clockdomain be set to hardware-supervised mode?
+ *
+ * Restore the clockdomain state perturbed by
+ * _pwrdm_save_clkdm_state_and_activate(), and call the power state
+ * bookkeeping code.  Called by omap_set_pwrdm_state().  NOTE that if
+ * the powerdomain contains multiple clockdomains, this assumes that
+ * the first associated clockdomain supports either
+ * hardware-supervised idle control in the register, or
+ * software-supervised sleep.  No return value.
+ */
+static void _pwrdm_restore_clkdm_state(struct powerdomain *pwrdm,
+                                       u8 sleep_switch, bool hwsup)
+{
+        switch (sleep_switch) {
+        case FORCEWAKEUP_SWITCH:
+                if (hwsup)
+                        clkdm_allow_idle_nolock(pwrdm->pwrdm_clkdms[0]);
+                else
+                        clkdm_sleep_nolock(pwrdm->pwrdm_clkdms[0]);
+                break;
+        case LOWPOWERSTATE_SWITCH:
+                if (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE &&
+                    arch_pwrdm->pwrdm_set_lowpwrstchange)
+                        arch_pwrdm->pwrdm_set_lowpwrstchange(pwrdm);
+                pwrdm_state_switch_nolock(pwrdm);
+                break;
+        }
+}
+
 /* Public functions */
 
 /**
@@ -275,6 +362,30 @@ int pwrdm_complete_init(void)
 }
 
 /**
+ * pwrdm_lock - acquire a Linux spinlock on a powerdomain
+ * @pwrdm: struct powerdomain * to lock
+ *
+ * Acquire the powerdomain spinlock on @pwrdm.  No return value.
+ */
+void pwrdm_lock(struct powerdomain *pwrdm)
+        __acquires(&pwrdm->_lock)
+{
+        spin_lock_irqsave(&pwrdm->_lock, pwrdm->_lock_flags);
+}
+
+/**
+ * pwrdm_unlock - release a Linux spinlock on a powerdomain
+ * @pwrdm: struct powerdomain * to unlock
+ *
+ * Release the powerdomain spinlock on @pwrdm.  No return value.
+ */
+void pwrdm_unlock(struct powerdomain *pwrdm)
+        __releases(&pwrdm->_lock)
+{
+        spin_unlock_irqrestore(&pwrdm->_lock, pwrdm->_lock_flags);
+}
+
+/**
  * pwrdm_lookup - look up a powerdomain by name, return a pointer
  * @name: name of powerdomain
  *
@@ -920,65 +1031,27 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
         return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
 }
 
-/**
- * pwrdm_set_lowpwrstchange - Request a low power state change
- * @pwrdm: struct powerdomain *
- *
- * Allows a powerdomain to transtion to a lower power sleep state
- * from an existing sleep state without waking up the powerdomain.
- * Returns -EINVAL if the powerdomain pointer is null or if the
- * powerdomain does not support LOWPOWERSTATECHANGE, or returns 0
- * upon success.
- */
-int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
-{
-        int ret = -EINVAL;
-
-        if (!pwrdm)
-                return -EINVAL;
-
-        if (!(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE))
-                return -EINVAL;
-
-        pr_debug("powerdomain: %s: setting LOWPOWERSTATECHANGE bit\n",
-                 pwrdm->name);
-
-        if (arch_pwrdm && arch_pwrdm->pwrdm_set_lowpwrstchange)
-                ret = arch_pwrdm->pwrdm_set_lowpwrstchange(pwrdm);
-
-        return ret;
-}
-
-/**
- * pwrdm_wait_transition - wait for powerdomain power transition to finish
- * @pwrdm: struct powerdomain * to wait for
- *
- * If the powerdomain @pwrdm is in the process of a state transition,
- * spin until it completes the power transition, or until an iteration
- * bailout value is reached. Returns -EINVAL if the powerdomain
- * pointer is null, -EAGAIN if the bailout value was reached, or
- * returns 0 upon success.
- */
-int pwrdm_wait_transition(struct powerdomain *pwrdm)
+int pwrdm_state_switch_nolock(struct powerdomain *pwrdm)
 {
-        int ret = -EINVAL;
+        int ret;
 
-        if (!pwrdm)
+        if (!pwrdm || !arch_pwrdm)
                 return -EINVAL;
 
-        if (arch_pwrdm && arch_pwrdm->pwrdm_wait_transition)
-                ret = arch_pwrdm->pwrdm_wait_transition(pwrdm);
+        ret = arch_pwrdm->pwrdm_wait_transition(pwrdm);
+        if (!ret)
+                ret = _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
 
         return ret;
 }
 
-int pwrdm_state_switch(struct powerdomain *pwrdm)
+int __deprecated pwrdm_state_switch(struct powerdomain *pwrdm)
 {
         int ret;
 
-        ret = pwrdm_wait_transition(pwrdm);
-        if (!ret)
-                ret = _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+        pwrdm_lock(pwrdm);
+        ret = pwrdm_state_switch_nolock(pwrdm);
+        pwrdm_unlock(pwrdm);
 
         return ret;
 }
@@ -1004,6 +1077,61 @@ int pwrdm_post_transition(struct powerdomain *pwrdm)
 }
 
 /**
+ * omap_set_pwrdm_state - change a powerdomain's current power state
+ * @pwrdm: struct powerdomain * to change the power state of
+ * @pwrst: power state to change to
+ *
+ * Change the current hardware power state of the powerdomain
+ * represented by @pwrdm to the power state represented by @pwrst.
+ * Returns -EINVAL if @pwrdm is null or invalid or if the
+ * powerdomain's current power state could not be read, or returns 0
+ * upon success or if @pwrdm does not support @pwrst or any
+ * lower-power state.  XXX Should not return 0 if the @pwrdm does not
+ * support @pwrst or any lower-power state: this should be an error.
+ */
+int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst)
+{
+        u8 curr_pwrst, next_pwrst, sleep_switch;
+        int ret = 0;
+        bool hwsup = false;
+
+        if (!pwrdm || IS_ERR(pwrdm))
+                return -EINVAL;
+
+        while (!(pwrdm->pwrsts & (1 << pwrst))) {
+                if (pwrst == PWRDM_POWER_OFF)
+                        return ret;
+                pwrst--;
+        }
+
+        pwrdm_lock(pwrdm);
+
+        curr_pwrst = pwrdm_read_pwrst(pwrdm);
+        next_pwrst = pwrdm_read_next_pwrst(pwrdm);
+        if (curr_pwrst == pwrst && next_pwrst == pwrst)
+                goto osps_out;
+
+        sleep_switch = _pwrdm_save_clkdm_state_and_activate(pwrdm, curr_pwrst,
+                                                            pwrst, &hwsup);
+        if (sleep_switch == ERROR_SWITCH) {
+                ret = -EINVAL;
+                goto osps_out;
+        }
+
+        ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
+        if (ret)
+                pr_err("%s: unable to set power state of powerdomain: %s\n",
+                       __func__, pwrdm->name);
+
+        _pwrdm_restore_clkdm_state(pwrdm, sleep_switch, hwsup);
+
+osps_out:
+        pwrdm_unlock(pwrdm);
+
+        return ret;
+}
+
+/**
  * pwrdm_get_context_loss_count - get powerdomain's context loss count
  * @pwrdm: struct powerdomain * to wait for
  *
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index 5277d56eb37f..140c36074fed 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -19,8 +19,7 @@
 
 #include <linux/types.h>
 #include <linux/list.h>
-
-#include <linux/atomic.h>
+#include <linux/spinlock.h>
 
 #include "voltage.h"
 
@@ -44,18 +43,20 @@
 #define PWRSTS_OFF_RET_ON       (PWRSTS_OFF_RET | PWRSTS_ON)
 
 
-/* Powerdomain flags */
-#define PWRDM_HAS_HDWR_SAR      (1 << 0) /* hardware save-and-restore support */
-#define PWRDM_HAS_MPU_QUIRK     (1 << 1) /* MPU pwr domain has MEM bank 0 bits
-                                          * in MEM bank 1 position. This is
-                                          * true for OMAP3430
-                                          */
-#define PWRDM_HAS_LOWPOWERSTATECHANGE   (1 << 2) /*
-                                                  * support to transition from a
-                                                  * sleep state to a lower sleep
-                                                  * state without waking up the
-                                                  * powerdomain
-                                                  */
+/*
+ * Powerdomain flags (struct powerdomain.flags)
+ *
+ * PWRDM_HAS_HDWR_SAR - powerdomain has hardware save-and-restore support
+ *
+ * PWRDM_HAS_MPU_QUIRK - MPU pwr domain has MEM bank 0 bits in MEM
+ * bank 1 position. This is true for OMAP3430
+ *
+ * PWRDM_HAS_LOWPOWERSTATECHANGE - can transition from a sleep state
+ * to a lower sleep state without waking up the powerdomain
+ */
+#define PWRDM_HAS_HDWR_SAR              BIT(0)
+#define PWRDM_HAS_MPU_QUIRK             BIT(1)
+#define PWRDM_HAS_LOWPOWERSTATECHANGE   BIT(2)
 
 /*
  * Number of memory banks that are power-controllable.  On OMAP4430, the
@@ -103,6 +104,8 @@ struct powerdomain;
  * @state_counter:
  * @timer:
  * @state_timer:
+ * @_lock: spinlock used to serialize powerdomain and some clockdomain ops
+ * @_lock_flags: stored flags when @_lock is taken
  *
  * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
  */
@@ -127,7 +130,8 @@ struct powerdomain {
         unsigned state_counter[PWRDM_MAX_PWRSTS];
         unsigned ret_logic_off_counter;
         unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
-
+        spinlock_t _lock;
+        unsigned long _lock_flags;
         const u8 pwrstctrl_offs;
         const u8 pwrstst_offs;
         const u32 logicretstate_mask;
@@ -162,6 +166,16 @@ struct powerdomain {
  * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
  * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
  * @pwrdm_wait_transition: Wait for a pd state transition to complete
+ *
+ * Regarding @pwrdm_set_lowpwrstchange: On the OMAP2 and 3-family
+ * chips, a powerdomain's power state is not allowed to directly
+ * transition from one low-power state (e.g., CSWR) to another
+ * low-power state (e.g., OFF) without first waking up the
+ * powerdomain.  This wastes energy.  So OMAP4 chips support the
+ * ability to transition a powerdomain power state directly from one
+ * low-power state to another.  The function pointed to by
+ * @pwrdm_set_lowpwrstchange is intended to configure the OMAP4
+ * hardware powerdomain state machine to enable this feature.
  */
 struct pwrdm_ops {
         int     (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
@@ -225,15 +239,15 @@ int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
 
-int pwrdm_wait_transition(struct powerdomain *pwrdm);
-
+int pwrdm_state_switch_nolock(struct powerdomain *pwrdm);
 int pwrdm_state_switch(struct powerdomain *pwrdm);
 int pwrdm_pre_transition(struct powerdomain *pwrdm);
 int pwrdm_post_transition(struct powerdomain *pwrdm);
-int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
 int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
 
+extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state);
+
 extern void omap242x_powerdomains_init(void);
 extern void omap243x_powerdomains_init(void);
 extern void omap3xxx_powerdomains_init(void);
@@ -253,5 +267,7 @@ extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
 extern struct powerdomain wkup_omap2_pwrdm;
 extern struct powerdomain gfx_omap2_pwrdm;
 
+extern void pwrdm_lock(struct powerdomain *pwrdm);
+extern void pwrdm_unlock(struct powerdomain *pwrdm);
 
 #endif
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
index d3a5399091ad..7b946f1005b1 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
@@ -54,12 +54,12 @@ struct powerdomain gfx_omap2_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 struct powerdomain wkup_omap2_pwrdm = {
         .name           = "wkup_pwrdm",
         .prcm_offs      = WKUP_MOD,
         .pwrsts         = PWRSTS_ON,
-        .voltdm         = { .name = "wakeup" },
+        .voltdm         = { .name = "wakeup" },
 };
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index ba520d4f7c7b..578eef86fcf2 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -38,7 +38,7 @@ static struct powerdomain dsp_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain mpu_24xx_pwrdm = {
@@ -53,13 +53,14 @@ static struct powerdomain mpu_24xx_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain core_24xx_pwrdm = {
         .name             = "core_pwrdm",
         .prcm_offs        = CORE_MOD,
         .pwrsts           = PWRSTS_OFF_RET_ON,
+        .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 3,
         .pwrsts_mem_ret   = {
                 [0] = PWRSTS_OFF_RET,    /* MEM1RETSTATE */
@@ -71,7 +72,7 @@ static struct powerdomain core_24xx_pwrdm = {
                 [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
                 [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 
@@ -93,7 +94,7 @@ static struct powerdomain mdm_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 /*
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 8b23d234fb55..f0e14e9efe5a 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -50,7 +50,7 @@ static struct powerdomain iva2_pwrdm = {
                 [2] = PWRSTS_OFF_ON,
                 [3] = PWRSTS_ON,
         },
-        .voltdm           = { .name = "mpu_iva" },
+        .voltdm           = { .name = "mpu_iva" },
 };
 
 static struct powerdomain mpu_3xxx_pwrdm = {
@@ -66,7 +66,7 @@ static struct powerdomain mpu_3xxx_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_OFF_ON,
         },
-        .voltdm           = { .name = "mpu_iva" },
+        .voltdm           = { .name = "mpu_iva" },
 };
 
 static struct powerdomain mpu_am35x_pwrdm = {
@@ -82,7 +82,7 @@ static struct powerdomain mpu_am35x_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,
         },
-        .voltdm           = { .name = "mpu_iva" },
+        .voltdm           = { .name = "mpu_iva" },
 };
 
 /*
@@ -109,7 +109,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
                 [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
                 [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain core_3xxx_es3_1_pwrdm = {
@@ -131,7 +131,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
                 [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
                 [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain core_am35x_pwrdm = {
@@ -148,7 +148,7 @@ static struct powerdomain core_am35x_pwrdm = {
                 [0] = PWRSTS_ON, /* MEM1ONSTATE */
                 [1] = PWRSTS_ON, /* MEM2ONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain dss_pwrdm = {
@@ -163,7 +163,7 @@ static struct powerdomain dss_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain dss_am35x_pwrdm = {
@@ -178,7 +178,7 @@ static struct powerdomain dss_am35x_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 /*
@@ -199,7 +199,7 @@ static struct powerdomain sgx_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain sgx_am35x_pwrdm = {
@@ -214,7 +214,7 @@ static struct powerdomain sgx_am35x_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain cam_pwrdm = {
@@ -229,7 +229,7 @@ static struct powerdomain cam_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain per_pwrdm = {
@@ -244,7 +244,7 @@ static struct powerdomain per_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain per_am35x_pwrdm = {
@@ -259,13 +259,13 @@ static struct powerdomain per_am35x_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain emu_pwrdm = {
         .name           = "emu_pwrdm",
         .prcm_offs      = OMAP3430_EMU_MOD,
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain neon_pwrdm = {
@@ -273,7 +273,7 @@ static struct powerdomain neon_pwrdm = {
         .prcm_offs        = OMAP3430_NEON_MOD,
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
-        .voltdm           = { .name = "mpu_iva" },
+        .voltdm           = { .name = "mpu_iva" },
 };
 
 static struct powerdomain neon_am35x_pwrdm = {
@@ -281,7 +281,7 @@ static struct powerdomain neon_am35x_pwrdm = {
         .prcm_offs        = OMAP3430_NEON_MOD,
         .pwrsts           = PWRSTS_ON,
         .pwrsts_logic_ret = PWRSTS_ON,
-        .voltdm           = { .name = "mpu_iva" },
+        .voltdm           = { .name = "mpu_iva" },
 };
 
 static struct powerdomain usbhost_pwrdm = {
@@ -303,37 +303,37 @@ static struct powerdomain usbhost_pwrdm = {
         .pwrsts_mem_on    = {
                 [0] = PWRSTS_ON,  /* MEMONSTATE */
         },
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain dpll1_pwrdm = {
         .name           = "dpll1_pwrdm",
         .prcm_offs      = MPU_MOD,
-        .voltdm           = { .name = "mpu_iva" },
+        .voltdm           = { .name = "mpu_iva" },
 };
 
 static struct powerdomain dpll2_pwrdm = {
         .name           = "dpll2_pwrdm",
         .prcm_offs      = OMAP3430_IVA2_MOD,
-        .voltdm           = { .name = "mpu_iva" },
+        .voltdm           = { .name = "mpu_iva" },
 };
 
 static struct powerdomain dpll3_pwrdm = {
         .name           = "dpll3_pwrdm",
         .prcm_offs      = PLL_MOD,
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain dpll4_pwrdm = {
         .name           = "dpll4_pwrdm",
         .prcm_offs      = PLL_MOD,
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 static struct powerdomain dpll5_pwrdm = {
         .name           = "dpll5_pwrdm",
         .prcm_offs      = PLL_MOD,
-        .voltdm           = { .name = "core" },
+        .voltdm           = { .name = "core" },
 };
 
 /* As powerdomains are added or removed above, this list must also be changed */
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index a3e121f94a86..947f6adfed0c 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -210,6 +210,7 @@ int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1,
                                              PM_WKDEP, (1 << clkdm2->dep_bit));
 }
 
+/* XXX Caller must hold the clkdm's powerdomain lock */
 int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
 {
         struct clkdm_dep *cd;
@@ -221,7 +222,7 @@ int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
 
                 /* PRM accesses are slow, so minimize them */
                 mask |= 1 << cd->clkdm->dep_bit;
-                atomic_set(&cd->wkdep_usecount, 0);
+                cd->wkdep_usecount = 0;
         }
 
         omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 1ac73883f891..44c0d7216aa7 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -110,11 +110,11 @@ int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs)
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
+int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
                 u16 rstctrl_offs, u16 rstst_offs)
 {
         int c;
-        u32 mask = 1 << shift;
+        u32 mask = 1 << st_shift;
 
         /* Check the current status to avoid  de-asserting the line twice */
         if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0)
@@ -122,11 +122,14 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
 
         /* Clear the reset status by writing 1 to the status bit */
         am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs);
+
         /* de-assert the reset control line */
+        mask = 1 << shift;
+
         am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
-        /* wait the status to be set */
 
-        omap_test_timeout(am33xx_prm_is_hardreset_asserted(shift, inst,
+        /* wait the status to be set */
+        omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, inst,
                                                            rstst_offs),
                           MAX_MODULE_HARDRESET_WAIT, c);
 
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 3f25c563a821..9b9918dfb119 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -117,6 +117,7 @@
 #define AM33XX_PM_CEFUSE_PWRSTST_OFFSET         0x0004
 #define AM33XX_PM_CEFUSE_PWRSTST                AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
 
+#ifndef __ASSEMBLER__
 extern u32 am33xx_prm_read_reg(s16 inst, u16 idx);
 extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx);
 extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
@@ -124,6 +125,7 @@ extern void am33xx_prm_global_warm_sw_reset(void);
 extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
                 u16 rstctrl_offs);
 extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
-extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
+extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
                 u16 rstctrl_offs, u16 rstst_offs);
+#endif /* ASSEMBLER */
 #endif
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index e648bd55b072..7721990d2006 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -427,7 +427,7 @@ static int __init omap3xxx_prm_late_init(void)
 
         return ret;
 }
-subsys_initcall(omap3xxx_prm_late_init);
+omap_subsys_initcall(omap3xxx_prm_late_init);
 
 static void __exit omap3xxx_prm_exit(void)
 {
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index c05a343d465d..d35f98aabf7a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -665,7 +665,7 @@ static int __init omap44xx_prm_late_init(void)
 
         return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
 }
-subsys_initcall(omap44xx_prm_late_init);
+omap_subsys_initcall(omap44xx_prm_late_init);
 
 static void __exit omap44xx_prm_exit(void)
 {
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 04fdbc4c499b..8396b5b7e912 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -254,7 +254,7 @@ static int __init omap_serial_early_init(void)
 
         return 0;
 }
-core_initcall(omap_serial_early_init);
+omap_core_initcall(omap_serial_early_init);
 
 /**
  * omap_serial_init_port() - initialize single serial port
@@ -316,8 +316,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
         if (WARN_ON(!oh))
                 return;
 
-        pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size,
-                                 NULL, 0, false);
+        pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size);
         if (IS_ERR(pdev)) {
                 WARN(1, "Could not build omap_device for %s: %s.\n", name,
                      oh->name);
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index ce0ccd26efbd..1d3cb25c9629 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -37,25 +37,6 @@
         .text
 
 /*
- * Forces OMAP into idle state
- *
- * omap24xx_idle_loop_suspend() - This bit of code just executes the WFI
- * for normal idles.
- *
- * Note: This code get's copied to internal SRAM at boot. When the OMAP
- *       wakes up it continues execution at the point it went to sleep.
- */
-        .align  3
-ENTRY(omap24xx_idle_loop_suspend)
-        stmfd   sp!, {r0, lr}           @ save registers on stack
-        mov     r0, #0                  @ clear for mcr setup
-        mcr     p15, 0, r0, c7, c0, 4   @ wait for interrupt
-        ldmfd   sp!, {r0, pc}           @ restore regs and return
-
-ENTRY(omap24xx_idle_loop_suspend_sz)
-        .word   . - omap24xx_idle_loop_suspend
-
-/*
  * omap24xx_cpu_suspend() - Forces OMAP into deep sleep state by completing
  * SDRC shutdown then ARM shutdown.  Upon wake MPU is back on so just restore
  * SDRC.
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c
index 1da8f03c479e..aee3c8940a30 100644
--- a/arch/arm/mach-omap2/smartreflex-class3.c
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -12,6 +12,7 @@
  */
 
 #include <linux/power/smartreflex.h>
+#include "soc.h"
 #include "voltage.h"
 
 static int sr_class3_enable(struct omap_sr *sr)
@@ -58,4 +59,4 @@ static int __init sr_class3_init(void)
         pr_info("SmartReflex Class3 initialized\n");
         return sr_register_class(&class3_data);
 }
-late_initcall(sr_class3_init);
+omap_late_initcall(sr_class3_init);
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index f31d90774de0..c62116bbc760 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -42,6 +42,9 @@
 #undef MULTI_OMAP2
 #undef OMAP_NAME
 
+#ifdef CONFIG_ARCH_MULTIPLATFORM
+#define MULTI_OMAP2
+#endif
 #ifdef CONFIG_SOC_OMAP2420
 # ifdef OMAP_NAME
 #  undef  MULTI_OMAP2
@@ -112,6 +115,11 @@ int omap_type(void);
  */
 unsigned int omap_rev(void);
 
+static inline int soc_is_omap(void)
+{
+        return omap_rev() != 0;
+}
+
 /*
  * Get the CPU revision for OMAP devices
  */
@@ -387,6 +395,7 @@ IS_OMAP_TYPE(3430, 0x3430)
 
 #define AM335X_CLASS            0x33500033
 #define AM335X_REV_ES1_0        AM335X_CLASS
+#define AM335X_REV_ES2_0        (AM335X_CLASS | (0x1 << 8))
 
 #define OMAP443X_CLASS          0x44300044
 #define OMAP4430_REV_ES1_0      (OMAP443X_CLASS | (0x10 << 8))
@@ -465,5 +474,26 @@ static inline unsigned int omap4_has_ ##feat(void)	\
 
 OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
 
+/*
+ * We need to make sure omap initcalls don't run when
+ * multiplatform kernels are booted on other SoCs.
+ */
+#define omap_initcall(level, fn)                \
+static int __init __used __##fn(void)           \
+{                                               \
+        if (!soc_is_omap())                     \
+                return 0;                       \
+        return fn();                            \
+}                                               \
+level(__##fn);
+
+#define omap_early_initcall(fn)         omap_initcall(early_initcall, fn)
+#define omap_core_initcall(fn)          omap_initcall(core_initcall, fn)
+#define omap_postcore_initcall(fn)      omap_initcall(postcore_initcall, fn)
+#define omap_arch_initcall(fn)          omap_initcall(arch_initcall, fn)
+#define omap_subsys_initcall(fn)        omap_initcall(subsys_initcall, fn)
+#define omap_device_initcall(fn)        omap_initcall(device_initcall, fn)
+#define omap_late_initcall(fn)          omap_initcall(late_initcall, fn)
+
 #endif  /* __ASSEMBLY__ */
 
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index b9753fe27232..d7bc33f15344 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -152,8 +152,7 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
 
         sr_data->enable_on_init = sr_enable_on_init;
 
-        pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
-                                 NULL, 0, 0);
+        pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data));
         if (IS_ERR(pdev))
                 pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
                         __func__, name, oh->name);
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 390c1b6e15bc..5bde35bb8312 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 static struct clock_event_device clockevent_gpt = {
         .name           = "gp_timer",
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
         .rating         = 300,
         .set_next_event = omap2_gp_timer_set_next_event,
         .set_mode       = omap2_gp_timer_set_mode,
@@ -228,7 +227,7 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
         int r = 0;
 
         if (of_have_populated_dt()) {
-                np = omap_get_timer_dt(omap_timer_match, NULL);
+                np = omap_get_timer_dt(omap_timer_match, property);
                 if (!np)
                         return -ENODEV;
 
@@ -336,17 +335,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
 
         __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
 
-        clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
-                                     clockevent_gpt.shift);
-        clockevent_gpt.max_delta_ns =
-                clockevent_delta2ns(0xffffffff, &clockevent_gpt);
-        clockevent_gpt.min_delta_ns =
-                clockevent_delta2ns(3, &clockevent_gpt);
-                /* Timer internal resynch latency. */
-
         clockevent_gpt.cpumask = cpu_possible_mask;
         clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
-        clockevents_register_device(&clockevent_gpt);
+        clockevents_config_and_register(&clockevent_gpt, clkev.rate,
+                                        3, /* Timer internal resynch latency */
+                                        0xffffffff);
 
         pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
                 gptimer_id, clkev.rate);
@@ -552,7 +545,7 @@ static inline void __init realtime_counter_init(void)
 
 #define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,   \
                                clksrc_nr, clksrc_src)                   \
-static void __init omap##name##_gptimer_timer_init(void)                \
+void __init omap##name##_gptimer_timer_init(void)                       \
 {                                                                       \
         omap_dmtimer_init();                                            \
         omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
@@ -561,7 +554,7 @@ static void __init omap##name##_gptimer_timer_init(void)		\
 
 #define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,  \
                                 clksrc_nr, clksrc_src)                  \
-static void __init omap##name##_sync32k_timer_init(void)                \
+void __init omap##name##_sync32k_timer_init(void)               \
 {                                                                       \
         omap_dmtimer_init();                                            \
         omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
@@ -572,33 +565,23 @@ static void __init omap##name##_sync32k_timer_init(void)		\
                 omap2_sync32k_clocksource_init();                       \
 }
 
-#define OMAP_SYS_TIMER(name, clksrc)                                    \
-struct sys_timer omap##name##_timer = {                                 \
-        .init   = omap##name##_##clksrc##_timer_init,                   \
-};
-
 #ifdef CONFIG_ARCH_OMAP2
 OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon",
                         2, OMAP2_MPU_SOURCE);
-OMAP_SYS_TIMER(2, sync32k);
 #endif /* CONFIG_ARCH_OMAP2 */
 
 #ifdef CONFIG_ARCH_OMAP3
 OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon",
                         2, OMAP3_MPU_SOURCE);
-OMAP_SYS_TIMER(3, sync32k);
 OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure",
                         2, OMAP3_MPU_SOURCE);
-OMAP_SYS_TIMER(3_secure, sync32k);
 OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon",
                        2, OMAP3_MPU_SOURCE);
-OMAP_SYS_TIMER(3_gp, gptimer);
 #endif /* CONFIG_ARCH_OMAP3 */
 
 #ifdef CONFIG_SOC_AM33XX
 OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon",
                        2, OMAP4_MPU_SOURCE);
-OMAP_SYS_TIMER(3_am33xx, gptimer);
 #endif /* CONFIG_SOC_AM33XX */
 
 #ifdef CONFIG_ARCH_OMAP4
@@ -606,7 +589,7 @@ OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
                         2, OMAP4_MPU_SOURCE);
 #ifdef CONFIG_LOCAL_TIMERS
 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
-static void __init omap4_local_timer_init(void)
+void __init omap4_local_timer_init(void)
 {
         omap4_sync32k_timer_init();
         /* Local timers are not supprted on OMAP4430 ES1.0 */
@@ -624,18 +607,17 @@ static void __init omap4_local_timer_init(void)
         }
 }
 #else /* CONFIG_LOCAL_TIMERS */
-static void __init omap4_local_timer_init(void)
+void __init omap4_local_timer_init(void)
 {
         omap4_sync32k_timer_init();
 }
 #endif /* CONFIG_LOCAL_TIMERS */
-OMAP_SYS_TIMER(4, local);
 #endif /* CONFIG_ARCH_OMAP4 */
 
 #ifdef CONFIG_SOC_OMAP5
 OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
                         2, OMAP4_MPU_SOURCE);
-static void __init omap5_realtime_timer_init(void)
+void __init omap5_realtime_timer_init(void)
 {
         int err;
 
@@ -646,7 +628,6 @@ static void __init omap5_realtime_timer_init(void)
         if (err)
                 pr_err("%s: arch_timer_register failed %d\n", __func__, err);
 }
-OMAP_SYS_TIMER(5, realtime);
 #endif /* CONFIG_SOC_OMAP5 */
 
 /**
@@ -702,8 +683,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
         pdata->timer_errata = omap_dm_timer_get_errata();
         pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
 
-        pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
-                                 NULL, 0, 0);
+        pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata));
 
         if (IS_ERR(pdev)) {
                 pr_err("%s: Can't build omap_device for %s: %s.\n",
@@ -738,7 +718,7 @@ static int __init omap2_dm_timer_init(void)
 
         return 0;
 }
-arch_initcall(omap2_dm_timer_init);
+omap_arch_initcall(omap2_dm_timer_init);
 
 /**
  * omap2_override_clocksource - clocksource override with user configuration
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index e49b40b4c90a..51e138cc5398 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -23,6 +23,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c/twl.h>
 #include <linux/gpio.h>
+#include <linux/string.h>
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
 
@@ -56,7 +57,7 @@ void __init omap_pmic_init(int bus, u32 clkrate,
                            struct twl4030_platform_data *pmic_data)
 {
         omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
-        strncpy(pmic_i2c_board_info.type, pmic_type,
+        strlcpy(pmic_i2c_board_info.type, pmic_type,
                 sizeof(pmic_i2c_board_info.type));
         pmic_i2c_board_info.irq = pmic_irq;
         pmic_i2c_board_info.platform_data = pmic_data;
@@ -528,24 +529,29 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
         defined(CONFIG_SND_OMAP_SOC_OMAP_TWL4030_MODULE)
 #include <linux/platform_data/omap-twl4030.h>
 
+/* Commonly used configuration */
 static struct omap_tw4030_pdata omap_twl4030_audio_data;
 
 static struct platform_device audio_device = {
         .name           = "omap-twl4030",
         .id             = -1,
-        .dev = {
-                .platform_data = &omap_twl4030_audio_data,
-        },
 };
 
-void __init omap_twl4030_audio_init(char *card_name)
+void omap_twl4030_audio_init(char *card_name,
+                                    struct omap_tw4030_pdata *pdata)
 {
-        omap_twl4030_audio_data.card_name = card_name;
+        if (!pdata)
+                pdata = &omap_twl4030_audio_data;
+
+        pdata->card_name = card_name;
+
+        audio_device.dev.platform_data = pdata;
         platform_device_register(&audio_device);
 }
 
 #else /* SOC_OMAP_TWL4030 */
-void __init omap_twl4030_audio_init(char *card_name)
+void omap_twl4030_audio_init(char *card_name,
+                                    struct omap_tw4030_pdata *pdata)
 {
         return;
 }
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index dcfbad5ac471..24b65d081b69 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -32,6 +32,7 @@
 
 struct twl4030_platform_data;
 struct twl6040_platform_data;
+struct omap_tw4030_pdata;
 struct i2c_board_info;
 
 void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
@@ -60,6 +61,6 @@ void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
 void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
                            u32 pdata_flags, u32 regulators_flags);
 
-void omap_twl4030_audio_init(char *card_name);
+void omap_twl4030_audio_init(char *card_name, struct omap_tw4030_pdata *pdata);
 
 #endif /* __OMAP_PMIC_COMMON__ */
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 2e44e8a22884..5706bdccf45e 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -37,19 +37,6 @@
 #define USBHS_UHH_HWMODNAME     "usb_host_hs"
 #define USBHS_TLL_HWMODNAME     "usb_tll_hs"
 
-static struct usbhs_omap_platform_data          usbhs_data;
-static struct usbtll_omap_platform_data         usbtll_data;
-static struct ehci_hcd_omap_platform_data       ehci_data;
-static struct ohci_hcd_omap_platform_data       ohci_data;
-
-static struct omap_device_pm_latency omap_uhhtll_latency[] = {
-          {
-                .deactivate_func = omap_device_idle_hwmods,
-                .activate_func   = omap_device_enable_hwmods,
-                .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
-          },
-};
-
 /* MUX settings for EHCI pins */
 /*
  * setup_ehci_io_mux - initialize IO pad mux for USBHOST
@@ -485,32 +472,18 @@ void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
         }
 }
 
-void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
+void __init usbhs_init(struct usbhs_omap_platform_data *pdata)
 {
         struct omap_hwmod       *uhh_hwm, *tll_hwm;
         struct platform_device  *pdev;
         int                     bus_id = -1;
-        int                     i;
-
-        for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
-                usbhs_data.port_mode[i] = pdata->port_mode[i];
-                usbtll_data.port_mode[i] = pdata->port_mode[i];
-                ohci_data.port_mode[i] = pdata->port_mode[i];
-                ehci_data.port_mode[i] = pdata->port_mode[i];
-                ehci_data.reset_gpio_port[i] = pdata->reset_gpio_port[i];
-                ehci_data.regulator[i] = pdata->regulator[i];
-        }
-        ehci_data.phy_reset = pdata->phy_reset;
-        ohci_data.es2_compatibility = pdata->es2_compatibility;
-        usbhs_data.ehci_data = &ehci_data;
-        usbhs_data.ohci_data = &ohci_data;
 
         if (cpu_is_omap34xx()) {
                 setup_ehci_io_mux(pdata->port_mode);
                 setup_ohci_io_mux(pdata->port_mode);
 
                 if (omap_rev() <= OMAP3430_REV_ES2_1)
-                        usbhs_data.single_ulpi_bypass = true;
+                        pdata->single_ulpi_bypass = true;
 
         } else if (cpu_is_omap44xx()) {
                 setup_4430ehci_io_mux(pdata->port_mode);
@@ -530,9 +503,7 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
         }
 
         pdev = omap_device_build(OMAP_USBTLL_DEVICE, bus_id, tll_hwm,
-                                &usbtll_data, sizeof(usbtll_data),
-                                omap_uhhtll_latency,
-                                ARRAY_SIZE(omap_uhhtll_latency), false);
+                                pdata, sizeof(*pdata));
         if (IS_ERR(pdev)) {
                 pr_err("Could not build hwmod device %s\n",
                        USBHS_TLL_HWMODNAME);
@@ -540,9 +511,7 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
         }
 
         pdev = omap_device_build(OMAP_USBHS_DEVICE, bus_id, uhh_hwm,
-                                &usbhs_data, sizeof(usbhs_data),
-                                omap_uhhtll_latency,
-                                ARRAY_SIZE(omap_uhhtll_latency), false);
+                                pdata, sizeof(*pdata));
         if (IS_ERR(pdev)) {
                 pr_err("Could not build hwmod devices %s\n",
                        USBHS_UHH_HWMODNAME);
@@ -552,7 +521,7 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
 
 #else
 
-void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
+void __init usbhs_init(struct usbhs_omap_platform_data *pdata)
 {
 }
 
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 7b33b375fe77..3242a554ad6b 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -85,6 +85,9 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
         musb_plat.mode = board_data->mode;
         musb_plat.extvbus = board_data->extvbus;
 
+        if (cpu_is_omap44xx())
+                musb_plat.has_mailbox = true;
+
         if (soc_is_am35xx()) {
                 oh_name = "am35x_otg_hs";
                 name = "musb-am35x";
@@ -102,7 +105,7 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
                 return;
 
         pdev = omap_device_build(name, bus_id, oh, &musb_plat,
-                               sizeof(musb_plat), NULL, 0, false);
+                                 sizeof(musb_plat));
         if (IS_ERR(pdev)) {
                 pr_err("Could not build omap_device for %s %s\n",
                                                 name, oh_name);
diff --git a/arch/arm/mach-omap2/usb.h b/arch/arm/mach-omap2/usb.h
index 9b986ead7c45..3319f5cf47a3 100644
--- a/arch/arm/mach-omap2/usb.h
+++ b/arch/arm/mach-omap2/usb.h
@@ -53,26 +53,8 @@
 #define USBPHY_OTGSESSEND_EN    (1 << 20)
 #define USBPHY_DATA_POLARITY    (1 << 23)
 
-struct usbhs_omap_board_data {
-        enum usbhs_omap_port_mode       port_mode[OMAP3_HS_USB_PORTS];
-
-        /* have to be valid if phy_reset is true and portx is in phy mode */
-        int     reset_gpio_port[OMAP3_HS_USB_PORTS];
-
-        /* Set this to true for ES2.x silicon */
-        unsigned                        es2_compatibility:1;
-
-        unsigned                        phy_reset:1;
-
-        /*
-         * Regulators for USB PHYs.
-         * Each PHY can have a separate regulator.
-         */
-        struct regulator                *regulator[OMAP3_HS_USB_PORTS];
-};
-
 extern void usb_musb_init(struct omap_musb_board_data *board_data);
-extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
+extern void usbhs_init(struct usbhs_omap_platform_data *pdata);
 
 extern void am35x_musb_reset(void);
 extern void am35x_musb_phy_power(u8 on);
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c
index 7c2b4ed38f02..d15c7bbab8e2 100644
--- a/arch/arm/mach-omap2/wd_timer.c
+++ b/arch/arm/mach-omap2/wd_timer.c
@@ -124,10 +124,9 @@ static int __init omap_init_wdt(void)
         pdata.read_reset_sources = prm_read_reset_sources;
 
         pdev = omap_device_build(dev_name, id, oh, &pdata,
-                                 sizeof(struct omap_wd_timer_platform_data),
-                                 NULL, 0, 0);
+                                 sizeof(struct omap_wd_timer_platform_data));
         WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
              dev_name, oh->name);
         return 0;
 }
-subsys_initcall(omap_init_wdt);
+omap_subsys_initcall(omap_init_wdt);