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authorPaul Walmsley <paul@pwsan.com>2012-10-29 22:50:21 -0400
committerPaul Walmsley <paul@pwsan.com>2012-11-08 14:33:07 -0500
commitb6a4226c14001b0aa20b11c69190cb89d2237d3d (patch)
treee7c0f4b571cc010767c01d8b402762e49540c563 /arch/arm/mach-omap2
parent76e0e16d91af22dd6313000ff8018069123f8ed0 (diff)
ARM: OMAP2+: common: remove mach-omap2/common.c globals and map_common_io code
Get rid of the mach-omap2/common.c globals by moving the global initialization for IP block addresses that must occur early into mach-omap2/io.c. In the process, remove the *_map_common_io*() and SoC-specific *set_globals* functions. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/am33xx.h1
-rw-r--r--arch/arm/mach-omap2/common.c183
-rw-r--r--arch/arm/mach-omap2/common.h112
-rw-r--r--arch/arm/mach-omap2/control.c10
-rw-r--r--arch/arm/mach-omap2/control.h2
-rw-r--r--arch/arm/mach-omap2/id.c7
-rw-r--r--arch/arm/mach-omap2/io.c77
-rw-r--r--arch/arm/mach-omap2/omap4-common.c1
-rw-r--r--arch/arm/mach-omap2/prcm.c15
-rw-r--r--arch/arm/mach-omap2/sdrc.c8
-rw-r--r--arch/arm/mach-omap2/sdrc.h2
-rw-r--r--arch/arm/mach-omap2/ti81xx.h9
12 files changed, 107 insertions, 320 deletions
diff --git a/arch/arm/mach-omap2/am33xx.h b/arch/arm/mach-omap2/am33xx.h
index 06c19bb7bca6..43296c1af9ee 100644
--- a/arch/arm/mach-omap2/am33xx.h
+++ b/arch/arm/mach-omap2/am33xx.h
@@ -21,5 +21,6 @@
21#define AM33XX_SCM_BASE 0x44E10000 21#define AM33XX_SCM_BASE 0x44E10000
22#define AM33XX_CTRL_BASE AM33XX_SCM_BASE 22#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
23#define AM33XX_PRCM_BASE 0x44E00000 23#define AM33XX_PRCM_BASE 0x44E00000
24#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + 0x3FC)
24 25
25#endif /* __ASM_ARCH_AM33XX_H */ 26#endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 34fb5b95859b..5c2fd4863b2b 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -14,196 +14,13 @@
14 */ 14 */
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/clk.h>
18#include <linux/io.h>
19#include <linux/platform_data/dsp-omap.h> 17#include <linux/platform_data/dsp-omap.h>
20 18
21#include <plat/vram.h> 19#include <plat/vram.h>
22 20
23#include "soc.h"
24#include "iomap.h"
25#include "common.h" 21#include "common.h"
26#include "clock.h"
27#include "sdrc.h"
28#include "control.h"
29#include "omap-secure.h" 22#include "omap-secure.h"
30 23
31/* Global address base setup code */
32
33static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
34{
35 omap2_set_globals_tap(omap2_globals);
36 omap2_set_globals_sdrc(omap2_globals);
37 omap2_set_globals_control(omap2_globals);
38 omap2_set_globals_prcm(omap2_globals);
39}
40
41#if defined(CONFIG_SOC_OMAP2420)
42
43static struct omap_globals omap242x_globals = {
44 .class = OMAP242X_CLASS,
45 .tap = OMAP2_L4_IO_ADDRESS(0x48014000),
46 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
47 .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
48 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
49 .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
50 .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
51};
52
53void __init omap2_set_globals_242x(void)
54{
55 __omap2_set_globals(&omap242x_globals);
56}
57
58void __init omap242x_map_io(void)
59{
60 omap242x_map_common_io();
61}
62#endif
63
64#if defined(CONFIG_SOC_OMAP2430)
65
66static struct omap_globals omap243x_globals = {
67 .class = OMAP243X_CLASS,
68 .tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
69 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
70 .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
71 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
72 .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
73 .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
74};
75
76void __init omap2_set_globals_243x(void)
77{
78 __omap2_set_globals(&omap243x_globals);
79}
80
81void __init omap243x_map_io(void)
82{
83 omap243x_map_common_io();
84}
85#endif
86
87#if defined(CONFIG_ARCH_OMAP3)
88
89static struct omap_globals omap3_globals = {
90 .class = OMAP343X_CLASS,
91 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
92 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
93 .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
94 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
95 .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
96 .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
97};
98
99void __init omap2_set_globals_3xxx(void)
100{
101 __omap2_set_globals(&omap3_globals);
102}
103
104void __init omap3_map_io(void)
105{
106 omap34xx_map_common_io();
107}
108
109/*
110 * Adjust TAP register base such that omap3_check_revision accesses the correct
111 * TI81XX register for checking device ID (it adds 0x204 to tap base while
112 * TI81XX DEVICE ID register is at offset 0x600 from control base).
113 */
114#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
115 TI81XX_CONTROL_DEVICE_ID - 0x204)
116
117static struct omap_globals ti81xx_globals = {
118 .class = OMAP343X_CLASS,
119 .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
120 .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
121 .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
122 .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
123};
124
125void __init omap2_set_globals_ti81xx(void)
126{
127 __omap2_set_globals(&ti81xx_globals);
128}
129
130void __init ti81xx_map_io(void)
131{
132 omapti81xx_map_common_io();
133}
134#endif
135
136#if defined(CONFIG_SOC_AM33XX)
137#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \
138 TI81XX_CONTROL_DEVICE_ID - 0x204)
139
140static struct omap_globals am33xx_globals = {
141 .class = AM335X_CLASS,
142 .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
143 .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
144 .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
145 .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
146};
147
148void __init omap2_set_globals_am33xx(void)
149{
150 __omap2_set_globals(&am33xx_globals);
151}
152
153void __init am33xx_map_io(void)
154{
155 omapam33xx_map_common_io();
156}
157#endif
158
159#if defined(CONFIG_ARCH_OMAP4)
160static struct omap_globals omap4_globals = {
161 .class = OMAP443X_CLASS,
162 .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
163 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
164 .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
165 .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
166 .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
167 .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
168 .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE),
169};
170
171void __init omap2_set_globals_443x(void)
172{
173 __omap2_set_globals(&omap4_globals);
174}
175
176void __init omap4_map_io(void)
177{
178 omap44xx_map_common_io();
179}
180#endif
181
182#if defined(CONFIG_SOC_OMAP5)
183static struct omap_globals omap5_globals = {
184 .class = OMAP54XX_CLASS,
185 .tap = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
186 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
187 .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE),
188 .prm = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
189 .cm = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
190 .cm2 = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
191 .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE),
192};
193
194void __init omap2_set_globals_5xxx(void)
195{
196 omap2_set_globals_tap(&omap5_globals);
197 omap2_set_globals_control(&omap5_globals);
198 omap2_set_globals_prcm(&omap5_globals);
199}
200
201void __init omap5_map_io(void)
202{
203 omap5_map_common_io();
204}
205#endif
206
207/* 24/*
208 * Stub function for OMAP2 so that common files 25 * Stub function for OMAP2 so that common files
209 * continue to build when custom builds are used 26 * continue to build when custom builds are used
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index c925c805969f..ed21815edd4b 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -43,54 +43,6 @@
43 43
44#define OMAP_INTC_START NR_IRQS 44#define OMAP_INTC_START NR_IRQS
45 45
46#ifdef CONFIG_SOC_OMAP2420
47extern void omap242x_map_common_io(void);
48#else
49static inline void omap242x_map_common_io(void)
50{
51}
52#endif
53
54#ifdef CONFIG_SOC_OMAP2430
55extern void omap243x_map_common_io(void);
56#else
57static inline void omap243x_map_common_io(void)
58{
59}
60#endif
61
62#ifdef CONFIG_ARCH_OMAP3
63extern void omap34xx_map_common_io(void);
64#else
65static inline void omap34xx_map_common_io(void)
66{
67}
68#endif
69
70#ifdef CONFIG_SOC_TI81XX
71extern void omapti81xx_map_common_io(void);
72#else
73static inline void omapti81xx_map_common_io(void)
74{
75}
76#endif
77
78#ifdef CONFIG_SOC_AM33XX
79extern void omapam33xx_map_common_io(void);
80#else
81static inline void omapam33xx_map_common_io(void)
82{
83}
84#endif
85
86#ifdef CONFIG_ARCH_OMAP4
87extern void omap44xx_map_common_io(void);
88#else
89static inline void omap44xx_map_common_io(void)
90{
91}
92#endif
93
94#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 46#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
95int omap2_pm_init(void); 47int omap2_pm_init(void);
96#else 48#else
@@ -127,14 +79,6 @@ static inline int omap_mux_late_init(void)
127} 79}
128#endif 80#endif
129 81
130#ifdef CONFIG_SOC_OMAP5
131extern void omap5_map_common_io(void);
132#else
133static inline void omap5_map_common_io(void)
134{
135}
136#endif
137
138extern void omap2_init_common_infrastructure(void); 82extern void omap2_init_common_infrastructure(void);
139 83
140extern struct sys_timer omap2_timer; 84extern struct sys_timer omap2_timer;
@@ -169,50 +113,18 @@ void omap4430_init_late(void);
169int omap2_common_pm_late_init(void); 113int omap2_common_pm_late_init(void);
170void omap_prcm_restart(char, const char *); 114void omap_prcm_restart(char, const char *);
171 115
172/* 116/* This gets called from mach-omap2/io.c, do not call this */
173 * IO bases for various OMAP processors 117void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
174 * Except the tap base, rest all the io bases 118
175 * listed are physical addresses. 119void __init omap242x_map_io(void);
176 */ 120void __init omap243x_map_io(void);
177struct omap_globals { 121void __init omap3_map_io(void);
178 u32 class; /* OMAP class to detect */ 122void __init am33xx_map_io(void);
179 void __iomem *tap; /* Control module ID code */ 123void __init omap4_map_io(void);
180 void __iomem *sdrc; /* SDRAM Controller */ 124void __init omap5_map_io(void);
181 void __iomem *sms; /* SDRAM Memory Scheduler */ 125void __init ti81xx_map_io(void);
182 void __iomem *ctrl; /* System Control Module */ 126
183 void __iomem *ctrl_pad; /* PAD Control Module */ 127/* omap_barriers_init() is OMAP4 only */
184 void __iomem *prm; /* Power and Reset Management */
185 void __iomem *cm; /* Clock Management */
186 void __iomem *cm2;
187 void __iomem *prcm_mpu;
188};
189
190void omap2_set_globals_242x(void);
191void omap2_set_globals_243x(void);
192void omap2_set_globals_3xxx(void);
193void omap2_set_globals_443x(void);
194void omap2_set_globals_5xxx(void);
195void omap2_set_globals_ti81xx(void);
196void omap2_set_globals_am33xx(void);
197
198/* These get called from omap2_set_globals_xxxx(), do not call these */
199void omap2_set_globals_tap(struct omap_globals *);
200#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
201void omap2_set_globals_sdrc(struct omap_globals *);
202#else
203static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
204{ }
205#endif
206void omap2_set_globals_control(struct omap_globals *);
207void omap2_set_globals_prcm(struct omap_globals *);
208
209void omap242x_map_io(void);
210void omap243x_map_io(void);
211void omap3_map_io(void);
212void am33xx_map_io(void);
213void omap4_map_io(void);
214void omap5_map_io(void);
215void ti81xx_map_io(void);
216void omap_barriers_init(void); 128void omap_barriers_init(void);
217 129
218/** 130/**
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 06375ad20917..2adb2683f074 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -147,13 +147,11 @@ static struct omap3_control_regs control_context;
147#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) 147#define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg))
148#define OMAP4_CTRL_PAD_REGADDR(reg) (omap4_ctrl_pad_base + (reg)) 148#define OMAP4_CTRL_PAD_REGADDR(reg) (omap4_ctrl_pad_base + (reg))
149 149
150void __init omap2_set_globals_control(struct omap_globals *omap2_globals) 150void __init omap2_set_globals_control(void __iomem *ctrl,
151 void __iomem *ctrl_pad)
151{ 152{
152 if (omap2_globals->ctrl) 153 omap2_ctrl_base = ctrl;
153 omap2_ctrl_base = omap2_globals->ctrl; 154 omap4_ctrl_pad_base = ctrl_pad;
154
155 if (omap2_globals->ctrl_pad)
156 omap4_ctrl_pad_base = omap2_globals->ctrl_pad;
157} 155}
158 156
159void __iomem *omap_ctrl_base_get(void) 157void __iomem *omap_ctrl_base_get(void)
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a89e8256fd0e..4ca8747b3cc9 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -414,6 +414,8 @@ extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
414extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); 414extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
415extern void omap3630_ctrl_disable_rta(void); 415extern void omap3630_ctrl_disable_rta(void);
416extern int omap3_ctrl_save_padconf(void); 416extern int omap3_ctrl_save_padconf(void);
417extern void omap2_set_globals_control(void __iomem *ctrl,
418 void __iomem *ctrl_pad);
417#else 419#else
418#define omap_ctrl_base_get() 0 420#define omap_ctrl_base_get() 0
419#define omap_ctrl_readb(x) 0 421#define omap_ctrl_readb(x) 0
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index cf2362ccb234..f1e121502789 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -559,11 +559,12 @@ void __init omap5xxx_check_revision(void)
559 * detect the exact revision later on in omap2_detect_revision() once map_io 559 * detect the exact revision later on in omap2_detect_revision() once map_io
560 * is done. 560 * is done.
561 */ 561 */
562void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) 562void __init omap2_set_globals_tap(u32 class, void __iomem *tap)
563{ 563{
564 omap_revision = omap2_globals->class; 564 omap_revision = class;
565 tap_base = omap2_globals->tap; 565 tap_base = tap;
566 566
567 /* XXX What is this intended to do? */
567 if (cpu_is_omap34xx()) 568 if (cpu_is_omap34xx())
568 tap_prod_id = 0x0210; 569 tap_prod_id = 0x0210;
569 else 570 else
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4fadc7895579..a204b7055007 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -28,6 +28,7 @@
28#include <plat-omap/dma-omap.h> 28#include <plat-omap/dma-omap.h>
29 29
30#include "../plat-omap/sram.h" 30#include "../plat-omap/sram.h"
31#include <plat/prcm.h>
31 32
32#include "omap_hwmod.h" 33#include "omap_hwmod.h"
33#include "soc.h" 34#include "soc.h"
@@ -42,6 +43,7 @@
42#include "clock44xx.h" 43#include "clock44xx.h"
43#include "omap-pm.h" 44#include "omap-pm.h"
44#include "sdrc.h" 45#include "sdrc.h"
46#include "control.h"
45#include "serial.h" 47#include "serial.h"
46 48
47/* 49/*
@@ -265,7 +267,7 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
265#endif 267#endif
266 268
267#ifdef CONFIG_SOC_OMAP2420 269#ifdef CONFIG_SOC_OMAP2420
268void __init omap242x_map_common_io(void) 270void __init omap242x_map_io(void)
269{ 271{
270 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); 272 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
271 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); 273 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
@@ -273,7 +275,7 @@ void __init omap242x_map_common_io(void)
273#endif 275#endif
274 276
275#ifdef CONFIG_SOC_OMAP2430 277#ifdef CONFIG_SOC_OMAP2430
276void __init omap243x_map_common_io(void) 278void __init omap243x_map_io(void)
277{ 279{
278 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); 280 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
279 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); 281 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
@@ -281,28 +283,28 @@ void __init omap243x_map_common_io(void)
281#endif 283#endif
282 284
283#ifdef CONFIG_ARCH_OMAP3 285#ifdef CONFIG_ARCH_OMAP3
284void __init omap34xx_map_common_io(void) 286void __init omap3_map_io(void)
285{ 287{
286 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); 288 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
287} 289}
288#endif 290#endif
289 291
290#ifdef CONFIG_SOC_TI81XX 292#ifdef CONFIG_SOC_TI81XX
291void __init omapti81xx_map_common_io(void) 293void __init ti81xx_map_io(void)
292{ 294{
293 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc)); 295 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
294} 296}
295#endif 297#endif
296 298
297#ifdef CONFIG_SOC_AM33XX 299#ifdef CONFIG_SOC_AM33XX
298void __init omapam33xx_map_common_io(void) 300void __init am33xx_map_io(void)
299{ 301{
300 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); 302 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
301} 303}
302#endif 304#endif
303 305
304#ifdef CONFIG_ARCH_OMAP4 306#ifdef CONFIG_ARCH_OMAP4
305void __init omap44xx_map_common_io(void) 307void __init omap4_map_io(void)
306{ 308{
307 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); 309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
308 omap_barriers_init(); 310 omap_barriers_init();
@@ -310,7 +312,7 @@ void __init omap44xx_map_common_io(void)
310#endif 312#endif
311 313
312#ifdef CONFIG_SOC_OMAP5 314#ifdef CONFIG_SOC_OMAP5
313void __init omap5_map_common_io(void) 315void __init omap5_map_io(void)
314{ 316{
315 iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); 317 iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
316} 318}
@@ -377,7 +379,14 @@ static void __init omap_hwmod_init_postsetup(void)
377#ifdef CONFIG_SOC_OMAP2420 379#ifdef CONFIG_SOC_OMAP2420
378void __init omap2420_init_early(void) 380void __init omap2420_init_early(void)
379{ 381{
380 omap2_set_globals_242x(); 382 omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
383 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
384 OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
385 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
386 NULL);
387 omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
388 OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
389 NULL, NULL);
381 omap2xxx_check_revision(); 390 omap2xxx_check_revision();
382 omap_common_init_early(); 391 omap_common_init_early();
383 omap2xxx_voltagedomains_init(); 392 omap2xxx_voltagedomains_init();
@@ -399,7 +408,14 @@ void __init omap2420_init_late(void)
399#ifdef CONFIG_SOC_OMAP2430 408#ifdef CONFIG_SOC_OMAP2430
400void __init omap2430_init_early(void) 409void __init omap2430_init_early(void)
401{ 410{
402 omap2_set_globals_243x(); 411 omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
412 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
413 OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
414 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
415 NULL);
416 omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
417 OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
418 NULL, NULL);
403 omap2xxx_check_revision(); 419 omap2xxx_check_revision();
404 omap_common_init_early(); 420 omap_common_init_early();
405 omap2xxx_voltagedomains_init(); 421 omap2xxx_voltagedomains_init();
@@ -425,7 +441,14 @@ void __init omap2430_init_late(void)
425#ifdef CONFIG_ARCH_OMAP3 441#ifdef CONFIG_ARCH_OMAP3
426void __init omap3_init_early(void) 442void __init omap3_init_early(void)
427{ 443{
428 omap2_set_globals_3xxx(); 444 omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
445 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
446 OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
447 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
448 NULL);
449 omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
450 OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
451 NULL, NULL);
429 omap3xxx_check_revision(); 452 omap3xxx_check_revision();
430 omap3xxx_check_features(); 453 omap3xxx_check_features();
431 omap_common_init_early(); 454 omap_common_init_early();
@@ -459,7 +482,13 @@ void __init am35xx_init_early(void)
459 482
460void __init ti81xx_init_early(void) 483void __init ti81xx_init_early(void)
461{ 484{
462 omap2_set_globals_ti81xx(); 485 omap2_set_globals_tap(OMAP343X_CLASS,
486 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
487 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
488 NULL);
489 omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
490 OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
491 NULL, NULL);
463 omap3xxx_check_revision(); 492 omap3xxx_check_revision();
464 ti81xx_check_features(); 493 ti81xx_check_features();
465 omap_common_init_early(); 494 omap_common_init_early();
@@ -517,7 +546,13 @@ void __init ti81xx_init_late(void)
517#ifdef CONFIG_SOC_AM33XX 546#ifdef CONFIG_SOC_AM33XX
518void __init am33xx_init_early(void) 547void __init am33xx_init_early(void)
519{ 548{
520 omap2_set_globals_am33xx(); 549 omap2_set_globals_tap(AM335X_CLASS,
550 AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
551 omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
552 NULL);
553 omap2_set_globals_prcm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
554 AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
555 NULL, NULL);
521 omap3xxx_check_revision(); 556 omap3xxx_check_revision();
522 ti81xx_check_features(); 557 ti81xx_check_features();
523 omap_common_init_early(); 558 omap_common_init_early();
@@ -533,7 +568,14 @@ void __init am33xx_init_early(void)
533#ifdef CONFIG_ARCH_OMAP4 568#ifdef CONFIG_ARCH_OMAP4
534void __init omap4430_init_early(void) 569void __init omap4430_init_early(void)
535{ 570{
536 omap2_set_globals_443x(); 571 omap2_set_globals_tap(OMAP443X_CLASS,
572 OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
573 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
574 OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
575 omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
576 OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
577 OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
578 OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
537 omap4xxx_check_revision(); 579 omap4xxx_check_revision();
538 omap4xxx_check_features(); 580 omap4xxx_check_features();
539 omap_common_init_early(); 581 omap_common_init_early();
@@ -556,7 +598,14 @@ void __init omap4430_init_late(void)
556#ifdef CONFIG_SOC_OMAP5 598#ifdef CONFIG_SOC_OMAP5
557void __init omap5_init_early(void) 599void __init omap5_init_early(void)
558{ 600{
559 omap2_set_globals_5xxx(); 601 omap2_set_globals_tap(OMAP54XX_CLASS,
602 OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
603 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
604 OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
605 omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
606 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
607 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
608 OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
560 omap5xxx_check_revision(); 609 omap5xxx_check_revision();
561 omap_common_init_early(); 610 omap_common_init_early();
562} 611}
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index d25845c471da..6cd7e877c8e5 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -29,6 +29,7 @@
29 29
30#include "omap-wakeupgen.h" 30#include "omap-wakeupgen.h"
31#include "soc.h" 31#include "soc.h"
32#include "iomap.h"
32#include "common.h" 33#include "common.h"
33#include "mmc.h" 34#include "mmc.h"
34#include "hsmmc.h" 35#include "hsmmc.h"
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 05c754edbf3f..92fc3b88a608 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -137,16 +137,13 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
137 return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; 137 return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
138}; 138};
139 139
140void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) 140void __init omap2_set_globals_prcm(void __iomem *prm, void __iomem *cm,
141 void __iomem *cm2, void __iomem *prcm_mpu)
141{ 142{
142 if (omap2_globals->prm) 143 prm_base = prm;
143 prm_base = omap2_globals->prm; 144 cm_base = cm;
144 if (omap2_globals->cm) 145 cm2_base = cm2;
145 cm_base = omap2_globals->cm; 146 prcm_mpu_base = prcm_mpu;
146 if (omap2_globals->cm2)
147 cm2_base = omap2_globals->cm2;
148 if (omap2_globals->prcm_mpu)
149 prcm_mpu_base = omap2_globals->prcm_mpu;
150 147
151 if (cpu_is_omap44xx() || soc_is_omap54xx()) { 148 if (cpu_is_omap44xx() || soc_is_omap54xx()) {
152 omap_prm_base_init(); 149 omap_prm_base_init();
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 94d4082f87ed..3ed0d62333c5 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -114,12 +114,10 @@ int omap2_sdrc_get_params(unsigned long r,
114} 114}
115 115
116 116
117void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) 117void __init omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms)
118{ 118{
119 if (omap2_globals->sdrc) 119 omap2_sdrc_base = sdrc;
120 omap2_sdrc_base = omap2_globals->sdrc; 120 omap2_sms_base = sms;
121 if (omap2_globals->sms)
122 omap2_sms_base = omap2_globals->sms;
123} 121}
124 122
125/** 123/**
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 69c4b329452e..446aa13511fd 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -51,6 +51,8 @@ static inline u32 sms_read_reg(u16 reg)
51 return __raw_readl(OMAP_SMS_REGADDR(reg)); 51 return __raw_readl(OMAP_SMS_REGADDR(reg));
52} 52}
53 53
54extern void omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms);
55
54 56
55/** 57/**
56 * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate 58 * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate
diff --git a/arch/arm/mach-omap2/ti81xx.h b/arch/arm/mach-omap2/ti81xx.h
index 8f9843f78422..a1e6caf0dba6 100644
--- a/arch/arm/mach-omap2/ti81xx.h
+++ b/arch/arm/mach-omap2/ti81xx.h
@@ -22,6 +22,15 @@
22#define TI81XX_CTRL_BASE TI81XX_SCM_BASE 22#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
23#define TI81XX_PRCM_BASE 0x48180000 23#define TI81XX_PRCM_BASE 0x48180000
24 24
25/*
26 * Adjust TAP register base such that omap3_check_revision accesses the correct
27 * TI81XX register for checking device ID (it adds 0x204 to tap base while
28 * TI81XX DEVICE ID register is at offset 0x600 from control base).
29 */
30#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \
31 TI81XX_CONTROL_DEVICE_ID - 0x204)
32
33
25#define TI81XX_ARM_INTC_BASE 0x48200000 34#define TI81XX_ARM_INTC_BASE 0x48200000
26 35
27#endif /* __ASM_ARCH_TI81XX_H */ 36#endif /* __ASM_ARCH_TI81XX_H */