Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (28 commits)
  ARM: OMAP: Fix GCC-reported compile time bug
  ARM: OMAP: restore CONFIG_GENERIC_TIME
  ARM: OMAP: partial LED fixes
  ARM: OMAP: add SoSSI clock (call propagate_rate for childrens)
  ARM: OMAP: FB sync with N800 tree (support for dynamic SRAM allocations)
  ARM: OMAP: Sync framebuffer headers with N800 tree
  ARM: OMAP: Mostly cosmetic to sync up with linux-omap tree
  ARM: OMAP: Fix gpmc header
  ARM: OMAP: Add mailbox support for IVA
  [ARM] armv7: add Makefile and Kconfig entries
  [ARM] armv7: add support for asid-tagged VIVT I-cache
  [ARM] armv7: add dedicated ARMv7 barrier instructions
  [ARM] armv7: Add ARMv7 cacheid macros
  [ARM] armv7: add support for ARMv7 cores.
  [ARM] Fix ARM branch relocation range
  [ARM] 4363/1: AT91: Remove legacy PIO definitions
  [ARM] 4361/1: AT91: Build error
  ARM: OMAP: Sync core code with linux-omap
  ARM: OMAP: Sync headers with linux-omap
  ARM: OMAP: h4 must have blinky leds!!
  ...

6 files changed, 419 insertions, 14 deletions

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index aab97ccf1e63..7393109f5c30 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -9,6 +9,7 @@ config ARCH_OMAP2420
         bool "OMAP2420 support"
         depends on ARCH_OMAP24XX
         select OMAP_DM_TIMER
+        select ARCH_OMAP_OTG
 
 comment "OMAP Board Type"
         depends on ARCH_OMAP2
@@ -20,6 +21,7 @@ config MACH_OMAP_GENERIC
 config MACH_OMAP_H4
         bool "OMAP 2420 H4 board"
         depends on ARCH_OMAP2 && ARCH_OMAP24XX
+        select OMAP_DEBUG_LEDS if LEDS || LEDS_OMAP_DEBUG
 
 config MACH_OMAP_APOLLON
         bool "OMAP 2420 Apollon board"
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 1e7ed6d22ca9..452193f01531 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -266,12 +266,26 @@ static struct platform_device h4_lcd_device = {
         .id             = -1,
 };
 
+static struct resource h4_led_resources[] = {
+        [0] = {
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device h4_led_device = {
+        .name           = "omap_dbg_led",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(h4_led_resources),
+        .resource       = h4_led_resources,
+};
+
 static struct platform_device *h4_devices[] __initdata = {
         &h4_smc91x_device,
         &h4_flash_device,
         &h4_irda_device,
         &h4_kp_device,
         &h4_lcd_device,
+        &h4_led_device,
 };
 
 static inline void __init h4_init_smc91x(void)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index aa4322451e8b..52ec2f2d6360 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -24,7 +24,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/gpio.h>
 
-#if     defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
+#if     defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
 
 #define OMAP2_I2C_BASE2         0x48072000
 #define OMAP2_I2C_INT2          57
@@ -42,8 +42,8 @@ static struct resource i2c_resources2[] = {
 };
 
 static struct platform_device omap_i2c_device2 = {
-        .name           = "i2c_omap",
-        .id             = 2,
+        .name           = "i2c_omap",
+        .id             = 2,
         .num_resources  = ARRAY_SIZE(i2c_resources2),
         .resource       = i2c_resources2,
 };
@@ -66,6 +66,40 @@ static void omap_init_i2c(void) {}
 
 #endif
 
+#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
+#define OMAP2_MBOX_BASE         IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
+
+static struct resource mbox_resources[] = {
+        {
+                .start          = OMAP2_MBOX_BASE,
+                .end            = OMAP2_MBOX_BASE + 0x11f,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = INT_24XX_MAIL_U0_MPU,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = INT_24XX_MAIL_U3_MPU,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mbox_device = {
+        .name           = "mailbox",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(mbox_resources),
+        .resource       = mbox_resources,
+};
+
+static inline void omap_init_mbox(void)
+{
+        platform_device_register(&mbox_device);
+}
+#else
+static inline void omap_init_mbox(void) { }
+#endif
+
 #if defined(CONFIG_OMAP_STI)
 
 #define OMAP2_STI_BASE          IO_ADDRESS(0x48068000)
@@ -111,29 +145,45 @@ static inline void omap_init_sti(void) {}
 #define OMAP2_MCSPI1_BASE               0x48098000
 #define OMAP2_MCSPI2_BASE               0x4809a000
 
-/* FIXME: use resources instead */
-
 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
-        .base           = io_p2v(OMAP2_MCSPI1_BASE),
         .num_cs         = 4,
 };
 
+static struct resource omap2_mcspi1_resources[] = {
+        {
+                .start          = OMAP2_MCSPI1_BASE,
+                .end            = OMAP2_MCSPI1_BASE + 0xff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
 struct platform_device omap2_mcspi1 = {
         .name           = "omap2_mcspi",
         .id             = 1,
+        .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
+        .resource       = omap2_mcspi1_resources,
         .dev            = {
                 .platform_data = &omap2_mcspi1_config,
         },
 };
 
 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
-        .base           = io_p2v(OMAP2_MCSPI2_BASE),
         .num_cs         = 2,
 };
 
+static struct resource omap2_mcspi2_resources[] = {
+        {
+                .start          = OMAP2_MCSPI2_BASE,
+                .end            = OMAP2_MCSPI2_BASE + 0xff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
 struct platform_device omap2_mcspi2 = {
         .name           = "omap2_mcspi",
         .id             = 2,
+        .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
+        .resource       = omap2_mcspi2_resources,
         .dev            = {
                 .platform_data = &omap2_mcspi2_config,
         },
@@ -157,10 +207,10 @@ static int __init omap2_init_devices(void)
          * in alphabetical order so they're easier to sort through.
          */
         omap_init_i2c();
+        omap_init_mbox();
         omap_init_mcspi();
         omap_init_sti();
 
         return 0;
 }
 arch_initcall(omap2_init_devices);
-
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index d8f57824423f..54c836a98456 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -246,14 +246,22 @@ static int gpmc_cs_mem_enabled(int cs)
         return l & (1 << 6);
 }
 
-static void gpmc_cs_set_reserved(int cs, int reserved)
+int gpmc_cs_set_reserved(int cs, int reserved)
 {
+        if (cs > GPMC_CS_NUM)
+                return -ENODEV;
+
         gpmc_cs_map &= ~(1 << cs);
         gpmc_cs_map |= (reserved ? 1 : 0) << cs;
+
+        return 0;
 }
 
-static int gpmc_cs_reserved(int cs)
+int gpmc_cs_reserved(int cs)
 {
+        if (cs > GPMC_CS_NUM)
+                return -ENODEV;
+
         return gpmc_cs_map & (1 << cs);
 }
 
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index a0728c33e5d9..82dc70f6b779 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -27,6 +27,7 @@ extern void omap_sram_init(void);
 extern int omap2_clk_init(void);
 extern void omap2_check_revision(void);
 extern void gpmc_init(void);
+extern void omapfb_reserve_sdram(void);
 
 /*
  * The machine specific code may provide the extra mapping besides the
@@ -40,9 +41,21 @@ static struct map_desc omap2_io_desc[] __initdata = {
                 .type           = MT_DEVICE
         },
         {
-                .virtual        = L4_24XX_VIRT,
-                .pfn            = __phys_to_pfn(L4_24XX_PHYS),
-                .length         = L4_24XX_SIZE,
+                .virtual        = DSP_MEM_24XX_VIRT,
+                .pfn            = __phys_to_pfn(DSP_MEM_24XX_PHYS),
+                .length         = DSP_MEM_24XX_SIZE,
+                .type           = MT_DEVICE
+        },
+        {
+                .virtual        = DSP_IPI_24XX_VIRT,
+                .pfn            = __phys_to_pfn(DSP_IPI_24XX_PHYS),
+                .length         = DSP_IPI_24XX_SIZE,
+                .type           = MT_DEVICE
+        },
+        {
+                .virtual        = DSP_MMU_24XX_VIRT,
+                .pfn            = __phys_to_pfn(DSP_MMU_24XX_PHYS),
+                .length         = DSP_MMU_24XX_SIZE,
                 .type           = MT_DEVICE
         }
 };
@@ -60,7 +73,7 @@ void __init omap2_map_common_io(void)
 
         omap2_check_revision();
         omap_sram_init();
-        omapfb_reserve_mem();
+        omapfb_reserve_sdram();
 }
 
 void __init omap2_init_common_hw(void)
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
new file mode 100644
index 000000000000..b03cd06e055b
--- /dev/null
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -0,0 +1,318 @@
+/*
+ * Mailbox reservation modules for OMAP2
+ *
+ * Copyright (C) 2006 Nokia Corporation
+ * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
+ *        and  Paul Mundt <paul.mundt@nokia.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <asm/arch/mailbox.h>
+#include <asm/arch/irqs.h>
+#include <asm/io.h>
+
+#define MAILBOX_REVISION                0x00
+#define MAILBOX_SYSCONFIG               0x10
+#define MAILBOX_SYSSTATUS               0x14
+#define MAILBOX_MESSAGE_0               0x40
+#define MAILBOX_MESSAGE_1               0x44
+#define MAILBOX_MESSAGE_2               0x48
+#define MAILBOX_MESSAGE_3               0x4c
+#define MAILBOX_MESSAGE_4               0x50
+#define MAILBOX_MESSAGE_5               0x54
+#define MAILBOX_FIFOSTATUS_0            0x80
+#define MAILBOX_FIFOSTATUS_1            0x84
+#define MAILBOX_FIFOSTATUS_2            0x88
+#define MAILBOX_FIFOSTATUS_3            0x8c
+#define MAILBOX_FIFOSTATUS_4            0x90
+#define MAILBOX_FIFOSTATUS_5            0x94
+#define MAILBOX_MSGSTATUS_0             0xc0
+#define MAILBOX_MSGSTATUS_1             0xc4
+#define MAILBOX_MSGSTATUS_2             0xc8
+#define MAILBOX_MSGSTATUS_3             0xcc
+#define MAILBOX_MSGSTATUS_4             0xd0
+#define MAILBOX_MSGSTATUS_5             0xd4
+#define MAILBOX_IRQSTATUS_0             0x100
+#define MAILBOX_IRQENABLE_0             0x104
+#define MAILBOX_IRQSTATUS_1             0x108
+#define MAILBOX_IRQENABLE_1             0x10c
+#define MAILBOX_IRQSTATUS_2             0x110
+#define MAILBOX_IRQENABLE_2             0x114
+#define MAILBOX_IRQSTATUS_3             0x118
+#define MAILBOX_IRQENABLE_3             0x11c
+
+static unsigned long mbox_base;
+
+#define MAILBOX_IRQ_NOTFULL(n)          (1 << (2 * (n) + 1))
+#define MAILBOX_IRQ_NEWMSG(n)           (1 << (2 * (n)))
+
+struct omap_mbox2_fifo {
+        unsigned long msg;
+        unsigned long fifo_stat;
+        unsigned long msg_stat;
+};
+
+struct omap_mbox2_priv {
+        struct omap_mbox2_fifo tx_fifo;
+        struct omap_mbox2_fifo rx_fifo;
+        unsigned long irqenable;
+        unsigned long irqstatus;
+        u32 newmsg_bit;
+        u32 notfull_bit;
+};
+
+static struct clk *mbox_ick_handle;
+
+static inline unsigned int mbox_read_reg(unsigned int reg)
+{
+        return __raw_readl(mbox_base + reg);
+}
+
+static inline void mbox_write_reg(unsigned int val, unsigned int reg)
+{
+        __raw_writel(val, mbox_base + reg);
+}
+
+/* Mailbox H/W preparations */
+static inline int omap2_mbox_startup(struct omap_mbox *mbox)
+{
+        unsigned int l;
+
+        mbox_ick_handle = clk_get(NULL, "mailboxes_ick");
+        if (IS_ERR(mbox_ick_handle)) {
+                printk("Could not get mailboxes_ick\n");
+                return -ENODEV;
+        }
+        clk_enable(mbox_ick_handle);
+
+        /* set smart-idle & autoidle */
+        l = mbox_read_reg(MAILBOX_SYSCONFIG);
+        l |= 0x00000011;
+        mbox_write_reg(l, MAILBOX_SYSCONFIG);
+
+        return 0;
+}
+
+static inline void omap2_mbox_shutdown(struct omap_mbox *mbox)
+{
+        clk_disable(mbox_ick_handle);
+        clk_put(mbox_ick_handle);
+}
+
+/* Mailbox FIFO handle functions */
+static inline mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox)
+{
+        struct omap_mbox2_fifo *fifo =
+                &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
+        return (mbox_msg_t) mbox_read_reg(fifo->msg);
+}
+
+static inline void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+        struct omap_mbox2_fifo *fifo =
+                &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
+        mbox_write_reg(msg, fifo->msg);
+}
+
+static inline int omap2_mbox_fifo_empty(struct omap_mbox *mbox)
+{
+        struct omap_mbox2_fifo *fifo =
+                &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
+        return (mbox_read_reg(fifo->msg_stat) == 0);
+}
+
+static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox)
+{
+        struct omap_mbox2_fifo *fifo =
+                &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
+        return (mbox_read_reg(fifo->fifo_stat));
+}
+
+/* Mailbox IRQ handle functions */
+static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox,
+                omap_mbox_type_t irq)
+{
+        struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
+        u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
+
+        l = mbox_read_reg(p->irqenable);
+        l |= bit;
+        mbox_write_reg(l, p->irqenable);
+}
+
+static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox,
+                omap_mbox_type_t irq)
+{
+        struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
+        u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
+
+        l = mbox_read_reg(p->irqenable);
+        l &= ~bit;
+        mbox_write_reg(l, p->irqenable);
+}
+
+static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox,
+                omap_mbox_type_t irq)
+{
+        struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
+        u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
+
+        mbox_write_reg(bit, p->irqstatus);
+}
+
+static inline int omap2_mbox_is_irq(struct omap_mbox *mbox,
+                omap_mbox_type_t irq)
+{
+        struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
+        u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
+        u32 enable = mbox_read_reg(p->irqenable);
+        u32 status = mbox_read_reg(p->irqstatus);
+
+        return (enable & status & bit);
+}
+
+static struct omap_mbox_ops omap2_mbox_ops = {
+        .type           = OMAP_MBOX_TYPE2,
+        .startup        = omap2_mbox_startup,
+        .shutdown       = omap2_mbox_shutdown,
+        .fifo_read      = omap2_mbox_fifo_read,
+        .fifo_write     = omap2_mbox_fifo_write,
+        .fifo_empty     = omap2_mbox_fifo_empty,
+        .fifo_full      = omap2_mbox_fifo_full,
+        .enable_irq     = omap2_mbox_enable_irq,
+        .disable_irq    = omap2_mbox_disable_irq,
+        .ack_irq        = omap2_mbox_ack_irq,
+        .is_irq         = omap2_mbox_is_irq,
+};
+
+/*
+ * MAILBOX 0: ARM -> DSP,
+ * MAILBOX 1: ARM <- DSP.
+ * MAILBOX 2: ARM -> IVA,
+ * MAILBOX 3: ARM <- IVA.
+ */
+
+/* FIXME: the following structs should be filled automatically by the user id */
+
+/* DSP */
+static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
+        .tx_fifo = {
+                .msg            = MAILBOX_MESSAGE_0,
+                .fifo_stat      = MAILBOX_FIFOSTATUS_0,
+        },
+        .rx_fifo = {
+                .msg            = MAILBOX_MESSAGE_1,
+                .msg_stat       = MAILBOX_MSGSTATUS_1,
+        },
+        .irqenable      = MAILBOX_IRQENABLE_0,
+        .irqstatus      = MAILBOX_IRQSTATUS_0,
+        .notfull_bit    = MAILBOX_IRQ_NOTFULL(0),
+        .newmsg_bit     = MAILBOX_IRQ_NEWMSG(1),
+};
+
+struct omap_mbox mbox_dsp_info = {
+        .name   = "dsp",
+        .ops    = &omap2_mbox_ops,
+        .priv   = &omap2_mbox_dsp_priv,
+};
+EXPORT_SYMBOL(mbox_dsp_info);
+
+/* IVA */
+static struct omap_mbox2_priv omap2_mbox_iva_priv = {
+        .tx_fifo = {
+                .msg            = MAILBOX_MESSAGE_2,
+                .fifo_stat      = MAILBOX_FIFOSTATUS_2,
+        },
+        .rx_fifo = {
+                .msg            = MAILBOX_MESSAGE_3,
+                .msg_stat       = MAILBOX_MSGSTATUS_3,
+        },
+        .irqenable      = MAILBOX_IRQENABLE_3,
+        .irqstatus      = MAILBOX_IRQSTATUS_3,
+        .notfull_bit    = MAILBOX_IRQ_NOTFULL(2),
+        .newmsg_bit     = MAILBOX_IRQ_NEWMSG(3),
+};
+
+static struct omap_mbox mbox_iva_info = {
+        .name   = "iva",
+        .ops    = &omap2_mbox_ops,
+        .priv   = &omap2_mbox_iva_priv,
+};
+
+static int __init omap2_mbox_probe(struct platform_device *pdev)
+{
+        struct resource *res;
+        int ret = 0;
+
+        if (pdev->num_resources != 3) {
+                dev_err(&pdev->dev, "invalid number of resources: %d\n",
+                        pdev->num_resources);
+                return -ENODEV;
+        }
+
+        /* MBOX base */
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (unlikely(!res)) {
+                dev_err(&pdev->dev, "invalid mem resource\n");
+                return -ENODEV;
+        }
+        mbox_base = res->start;
+
+        /* DSP IRQ */
+        res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (unlikely(!res)) {
+                dev_err(&pdev->dev, "invalid irq resource\n");
+                return -ENODEV;
+        }
+        mbox_dsp_info.irq = res->start;
+
+        ret = omap_mbox_register(&mbox_dsp_info);
+
+        /* IVA IRQ */
+        res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
+        if (unlikely(!res)) {
+                dev_err(&pdev->dev, "invalid irq resource\n");
+                return -ENODEV;
+        }
+        mbox_iva_info.irq = res->start;
+
+        ret = omap_mbox_register(&mbox_iva_info);
+
+        return ret;
+}
+
+static int omap2_mbox_remove(struct platform_device *pdev)
+{
+        omap_mbox_unregister(&mbox_dsp_info);
+        return 0;
+}
+
+static struct platform_driver omap2_mbox_driver = {
+        .probe = omap2_mbox_probe,
+        .remove = omap2_mbox_remove,
+        .driver = {
+                .name = "mailbox",
+        },
+};
+
+static int __init omap2_mbox_init(void)
+{
+        return platform_driver_register(&omap2_mbox_driver);
+}
+
+static void __exit omap2_mbox_exit(void)
+{
+        platform_driver_unregister(&omap2_mbox_driver);
+}
+
+module_init(omap2_mbox_init);
+module_exit(omap2_mbox_exit);
+
+MODULE_LICENSE("GPL");