diff options
author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2013-01-23 03:26:19 -0500 |
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committer | Stephen Warren <swarren@nvidia.com> | 2013-01-28 12:41:39 -0500 |
commit | 80d9375617f7544f7475e7f07003a08930559d43 (patch) | |
tree | c1c6aef6acda2d609d234d3c3580a60997a712f8 /arch/arm/mach-omap2 | |
parent | 909444ab20629ebc4478642b660a391700aa7e33 (diff) |
ARM: OMAP: Make use of available scu_a9_get_base() interface
Drop the define and make use of scu_a9_get_base() which reads
the physical address of SCU from CP15 register.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/omap-smp.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap44xx.h | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index cd42d921940d..e683d0dcef6b 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
@@ -215,7 +215,7 @@ static void __init omap4_smp_init_cpus(void) | |||
215 | * Currently we can't call ioremap here because | 215 | * Currently we can't call ioremap here because |
216 | * SoC detection won't work until after init_early. | 216 | * SoC detection won't work until after init_early. |
217 | */ | 217 | */ |
218 | scu_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE); | 218 | scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base()); |
219 | BUG_ON(!scu_base); | 219 | BUG_ON(!scu_base); |
220 | ncores = scu_get_core_count(scu_base); | 220 | ncores = scu_get_core_count(scu_base); |
221 | } else if (cpu_id == CPU_CORTEX_A15) { | 221 | } else if (cpu_id == CPU_CORTEX_A15) { |
diff --git a/arch/arm/mach-omap2/omap44xx.h b/arch/arm/mach-omap2/omap44xx.h index 43b927b2e2e8..8a515bb74639 100644 --- a/arch/arm/mach-omap2/omap44xx.h +++ b/arch/arm/mach-omap2/omap44xx.h | |||
@@ -40,7 +40,6 @@ | |||
40 | #define OMAP44XX_GIC_DIST_BASE 0x48241000 | 40 | #define OMAP44XX_GIC_DIST_BASE 0x48241000 |
41 | #define OMAP44XX_GIC_CPU_BASE 0x48240100 | 41 | #define OMAP44XX_GIC_CPU_BASE 0x48240100 |
42 | #define OMAP44XX_IRQ_GIC_START 32 | 42 | #define OMAP44XX_IRQ_GIC_START 32 |
43 | #define OMAP44XX_SCU_BASE 0x48240000 | ||
44 | #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 | 43 | #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 |
45 | #define OMAP44XX_L2CACHE_BASE 0x48242000 | 44 | #define OMAP44XX_L2CACHE_BASE 0x48242000 |
46 | #define OMAP44XX_WKUPGEN_BASE 0x48281000 | 45 | #define OMAP44XX_WKUPGEN_BASE 0x48281000 |