diff options
author | Tony Lindgren <tony@atomide.com> | 2009-09-02 18:23:05 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2009-09-02 18:23:05 -0400 |
commit | 5567fa1f543dde3c42f8e52bf4f7005135b24896 (patch) | |
tree | f4e2815758d5dd15f75a6c1523c1abc50966cdcb /arch/arm/mach-omap2 | |
parent | d3d381c6365ef5b06c4184a3fe047cf027533970 (diff) | |
parent | 68d4778c701b7e22ddfd64e3afb6628c92718ad2 (diff) |
Merge branch 'pm-upstream/debug' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into for-next
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/clock.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm-debug.c | 429 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm.h | 11 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm24xx.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 38 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.c | 110 |
7 files changed, 591 insertions, 13 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 456e2ad5f621..f2a92d614f0f 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -1043,5 +1043,7 @@ void omap2_clk_disable_unused(struct clk *clk) | |||
1043 | omap2_clk_disable(clk); | 1043 | omap2_clk_disable(clk); |
1044 | } else | 1044 | } else |
1045 | _omap2_clk_disable(clk); | 1045 | _omap2_clk_disable(clk); |
1046 | if (clk->clkdm != NULL) | ||
1047 | pwrdm_clkdm_state_switch(clk->clkdm); | ||
1046 | } | 1048 | } |
1047 | #endif | 1049 | #endif |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 0e7d501865b6..4ef7b4f5474e 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -299,7 +299,8 @@ struct clockdomain *clkdm_lookup(const char *name) | |||
299 | * anything else to indicate failure; or -EINVAL if the function pointer | 299 | * anything else to indicate failure; or -EINVAL if the function pointer |
300 | * is null. | 300 | * is null. |
301 | */ | 301 | */ |
302 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) | 302 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), |
303 | void *user) | ||
303 | { | 304 | { |
304 | struct clockdomain *clkdm; | 305 | struct clockdomain *clkdm; |
305 | int ret = 0; | 306 | int ret = 0; |
@@ -309,7 +310,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) | |||
309 | 310 | ||
310 | mutex_lock(&clkdm_mutex); | 311 | mutex_lock(&clkdm_mutex); |
311 | list_for_each_entry(clkdm, &clkdm_list, node) { | 312 | list_for_each_entry(clkdm, &clkdm_list, node) { |
312 | ret = (*fn)(clkdm); | 313 | ret = (*fn)(clkdm, user); |
313 | if (ret) | 314 | if (ret) |
314 | break; | 315 | break; |
315 | } | 316 | } |
@@ -484,6 +485,8 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |||
484 | v << __ffs(clkdm->clktrctrl_mask), | 485 | v << __ffs(clkdm->clktrctrl_mask), |
485 | clkdm->pwrdm.ptr->prcm_offs, | 486 | clkdm->pwrdm.ptr->prcm_offs, |
486 | CM_CLKSTCTRL); | 487 | CM_CLKSTCTRL); |
488 | |||
489 | pwrdm_clkdm_state_switch(clkdm); | ||
487 | } | 490 | } |
488 | 491 | ||
489 | /** | 492 | /** |
@@ -572,6 +575,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |||
572 | omap2_clkdm_wakeup(clkdm); | 575 | omap2_clkdm_wakeup(clkdm); |
573 | 576 | ||
574 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | 577 | pwrdm_wait_transition(clkdm->pwrdm.ptr); |
578 | pwrdm_clkdm_state_switch(clkdm); | ||
575 | 579 | ||
576 | return 0; | 580 | return 0; |
577 | } | 581 | } |
@@ -624,6 +628,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |||
624 | else | 628 | else |
625 | omap2_clkdm_sleep(clkdm); | 629 | omap2_clkdm_sleep(clkdm); |
626 | 630 | ||
631 | pwrdm_clkdm_state_switch(clkdm); | ||
632 | |||
627 | return 0; | 633 | return 0; |
628 | } | 634 | } |
629 | 635 | ||
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index da3a53f8ccc8..1b4c1600f8d8 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -20,13 +20,16 @@ | |||
20 | */ | 20 | */ |
21 | 21 | ||
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/timer.h> | 23 | #include <linux/sched.h> |
24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
27 | #include <linux/module.h> | ||
27 | 28 | ||
28 | #include <mach/clock.h> | 29 | #include <mach/clock.h> |
29 | #include <mach/board.h> | 30 | #include <mach/board.h> |
31 | #include <mach/powerdomain.h> | ||
32 | #include <mach/clockdomain.h> | ||
30 | 33 | ||
31 | #include "prm.h" | 34 | #include "prm.h" |
32 | #include "cm.h" | 35 | #include "cm.h" |
@@ -50,6 +53,8 @@ int omap2_pm_debug; | |||
50 | regs[reg_count].name = #reg; \ | 53 | regs[reg_count].name = #reg; \ |
51 | regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off))) | 54 | regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off))) |
52 | 55 | ||
56 | static int __init pm_dbg_init(void); | ||
57 | |||
53 | void omap2_pm_dump(int mode, int resume, unsigned int us) | 58 | void omap2_pm_dump(int mode, int resume, unsigned int us) |
54 | { | 59 | { |
55 | struct reg { | 60 | struct reg { |
@@ -150,3 +155,425 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) | |||
150 | for (i = 0; i < reg_count; i++) | 155 | for (i = 0; i < reg_count; i++) |
151 | printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); | 156 | printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); |
152 | } | 157 | } |
158 | |||
159 | #ifdef CONFIG_DEBUG_FS | ||
160 | #include <linux/debugfs.h> | ||
161 | #include <linux/seq_file.h> | ||
162 | |||
163 | static void pm_dbg_regset_store(u32 *ptr); | ||
164 | |||
165 | struct dentry *pm_dbg_dir; | ||
166 | |||
167 | static int pm_dbg_init_done; | ||
168 | |||
169 | enum { | ||
170 | DEBUG_FILE_COUNTERS = 0, | ||
171 | DEBUG_FILE_TIMERS, | ||
172 | }; | ||
173 | |||
174 | struct pm_module_def { | ||
175 | char name[8]; /* Name of the module */ | ||
176 | short type; /* CM or PRM */ | ||
177 | unsigned short offset; | ||
178 | int low; /* First register address on this module */ | ||
179 | int high; /* Last register address on this module */ | ||
180 | }; | ||
181 | |||
182 | #define MOD_CM 0 | ||
183 | #define MOD_PRM 1 | ||
184 | |||
185 | static const struct pm_module_def *pm_dbg_reg_modules; | ||
186 | static const struct pm_module_def omap3_pm_reg_modules[] = { | ||
187 | { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c }, | ||
188 | { "OCP", MOD_CM, OCP_MOD, 0, 0x10 }, | ||
189 | { "MPU", MOD_CM, MPU_MOD, 4, 0x4c }, | ||
190 | { "CORE", MOD_CM, CORE_MOD, 0, 0x4c }, | ||
191 | { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c }, | ||
192 | { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 }, | ||
193 | { "CCR", MOD_CM, PLL_MOD, 0, 0x70 }, | ||
194 | { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c }, | ||
195 | { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c }, | ||
196 | { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c }, | ||
197 | { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 }, | ||
198 | { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 }, | ||
199 | { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c }, | ||
200 | |||
201 | { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc }, | ||
202 | { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c }, | ||
203 | { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 }, | ||
204 | { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 }, | ||
205 | { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 }, | ||
206 | { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 }, | ||
207 | { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 }, | ||
208 | { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 }, | ||
209 | { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 }, | ||
210 | { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 }, | ||
211 | { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 }, | ||
212 | { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 }, | ||
213 | { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 }, | ||
214 | { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 }, | ||
215 | { "", 0, 0, 0, 0 }, | ||
216 | }; | ||
217 | |||
218 | #define PM_DBG_MAX_REG_SETS 4 | ||
219 | |||
220 | static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS]; | ||
221 | |||
222 | static int pm_dbg_get_regset_size(void) | ||
223 | { | ||
224 | static int regset_size; | ||
225 | |||
226 | if (regset_size == 0) { | ||
227 | int i = 0; | ||
228 | |||
229 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
230 | regset_size += pm_dbg_reg_modules[i].high + | ||
231 | 4 - pm_dbg_reg_modules[i].low; | ||
232 | i++; | ||
233 | } | ||
234 | } | ||
235 | return regset_size; | ||
236 | } | ||
237 | |||
238 | static int pm_dbg_show_regs(struct seq_file *s, void *unused) | ||
239 | { | ||
240 | int i, j; | ||
241 | unsigned long val; | ||
242 | int reg_set = (int)s->private; | ||
243 | u32 *ptr; | ||
244 | void *store = NULL; | ||
245 | int regs; | ||
246 | int linefeed; | ||
247 | |||
248 | if (reg_set == 0) { | ||
249 | store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); | ||
250 | ptr = store; | ||
251 | pm_dbg_regset_store(ptr); | ||
252 | } else { | ||
253 | ptr = pm_dbg_reg_set[reg_set - 1]; | ||
254 | } | ||
255 | |||
256 | i = 0; | ||
257 | |||
258 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
259 | regs = 0; | ||
260 | linefeed = 0; | ||
261 | if (pm_dbg_reg_modules[i].type == MOD_CM) | ||
262 | seq_printf(s, "MOD: CM_%s (%08x)\n", | ||
263 | pm_dbg_reg_modules[i].name, | ||
264 | (u32)(OMAP3430_CM_BASE + | ||
265 | pm_dbg_reg_modules[i].offset)); | ||
266 | else | ||
267 | seq_printf(s, "MOD: PRM_%s (%08x)\n", | ||
268 | pm_dbg_reg_modules[i].name, | ||
269 | (u32)(OMAP3430_PRM_BASE + | ||
270 | pm_dbg_reg_modules[i].offset)); | ||
271 | |||
272 | for (j = pm_dbg_reg_modules[i].low; | ||
273 | j <= pm_dbg_reg_modules[i].high; j += 4) { | ||
274 | val = *(ptr++); | ||
275 | if (val != 0) { | ||
276 | regs++; | ||
277 | if (linefeed) { | ||
278 | seq_printf(s, "\n"); | ||
279 | linefeed = 0; | ||
280 | } | ||
281 | seq_printf(s, " %02x => %08lx", j, val); | ||
282 | if (regs % 4 == 0) | ||
283 | linefeed = 1; | ||
284 | } | ||
285 | } | ||
286 | seq_printf(s, "\n"); | ||
287 | i++; | ||
288 | } | ||
289 | |||
290 | if (store != NULL) | ||
291 | kfree(store); | ||
292 | |||
293 | return 0; | ||
294 | } | ||
295 | |||
296 | static void pm_dbg_regset_store(u32 *ptr) | ||
297 | { | ||
298 | int i, j; | ||
299 | u32 val; | ||
300 | |||
301 | i = 0; | ||
302 | |||
303 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
304 | for (j = pm_dbg_reg_modules[i].low; | ||
305 | j <= pm_dbg_reg_modules[i].high; j += 4) { | ||
306 | if (pm_dbg_reg_modules[i].type == MOD_CM) | ||
307 | val = cm_read_mod_reg( | ||
308 | pm_dbg_reg_modules[i].offset, j); | ||
309 | else | ||
310 | val = prm_read_mod_reg( | ||
311 | pm_dbg_reg_modules[i].offset, j); | ||
312 | *(ptr++) = val; | ||
313 | } | ||
314 | i++; | ||
315 | } | ||
316 | } | ||
317 | |||
318 | int pm_dbg_regset_save(int reg_set) | ||
319 | { | ||
320 | if (pm_dbg_reg_set[reg_set-1] == NULL) | ||
321 | return -EINVAL; | ||
322 | |||
323 | pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]); | ||
324 | |||
325 | return 0; | ||
326 | } | ||
327 | |||
328 | static const char pwrdm_state_names[][4] = { | ||
329 | "OFF", | ||
330 | "RET", | ||
331 | "INA", | ||
332 | "ON" | ||
333 | }; | ||
334 | |||
335 | void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) | ||
336 | { | ||
337 | s64 t; | ||
338 | |||
339 | if (!pm_dbg_init_done) | ||
340 | return ; | ||
341 | |||
342 | /* Update timer for previous state */ | ||
343 | t = sched_clock(); | ||
344 | |||
345 | pwrdm->state_timer[prev] += t - pwrdm->timer; | ||
346 | |||
347 | pwrdm->timer = t; | ||
348 | } | ||
349 | |||
350 | static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user) | ||
351 | { | ||
352 | struct seq_file *s = (struct seq_file *)user; | ||
353 | |||
354 | if (strcmp(clkdm->name, "emu_clkdm") == 0 || | ||
355 | strcmp(clkdm->name, "wkup_clkdm") == 0 || | ||
356 | strncmp(clkdm->name, "dpll", 4) == 0) | ||
357 | return 0; | ||
358 | |||
359 | seq_printf(s, "%s->%s (%d)", clkdm->name, | ||
360 | clkdm->pwrdm.ptr->name, | ||
361 | atomic_read(&clkdm->usecount)); | ||
362 | seq_printf(s, "\n"); | ||
363 | |||
364 | return 0; | ||
365 | } | ||
366 | |||
367 | static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user) | ||
368 | { | ||
369 | struct seq_file *s = (struct seq_file *)user; | ||
370 | int i; | ||
371 | |||
372 | if (strcmp(pwrdm->name, "emu_pwrdm") == 0 || | ||
373 | strcmp(pwrdm->name, "wkup_pwrdm") == 0 || | ||
374 | strncmp(pwrdm->name, "dpll", 4) == 0) | ||
375 | return 0; | ||
376 | |||
377 | if (pwrdm->state != pwrdm_read_pwrst(pwrdm)) | ||
378 | printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n", | ||
379 | pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm)); | ||
380 | |||
381 | seq_printf(s, "%s (%s)", pwrdm->name, | ||
382 | pwrdm_state_names[pwrdm->state]); | ||
383 | for (i = 0; i < 4; i++) | ||
384 | seq_printf(s, ",%s:%d", pwrdm_state_names[i], | ||
385 | pwrdm->state_counter[i]); | ||
386 | |||
387 | seq_printf(s, "\n"); | ||
388 | |||
389 | return 0; | ||
390 | } | ||
391 | |||
392 | static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user) | ||
393 | { | ||
394 | struct seq_file *s = (struct seq_file *)user; | ||
395 | int i; | ||
396 | |||
397 | if (strcmp(pwrdm->name, "emu_pwrdm") == 0 || | ||
398 | strcmp(pwrdm->name, "wkup_pwrdm") == 0 || | ||
399 | strncmp(pwrdm->name, "dpll", 4) == 0) | ||
400 | return 0; | ||
401 | |||
402 | pwrdm_state_switch(pwrdm); | ||
403 | |||
404 | seq_printf(s, "%s (%s)", pwrdm->name, | ||
405 | pwrdm_state_names[pwrdm->state]); | ||
406 | |||
407 | for (i = 0; i < 4; i++) | ||
408 | seq_printf(s, ",%s:%lld", pwrdm_state_names[i], | ||
409 | pwrdm->state_timer[i]); | ||
410 | |||
411 | seq_printf(s, "\n"); | ||
412 | return 0; | ||
413 | } | ||
414 | |||
415 | static int pm_dbg_show_counters(struct seq_file *s, void *unused) | ||
416 | { | ||
417 | pwrdm_for_each(pwrdm_dbg_show_counter, s); | ||
418 | clkdm_for_each(clkdm_dbg_show_counter, s); | ||
419 | |||
420 | return 0; | ||
421 | } | ||
422 | |||
423 | static int pm_dbg_show_timers(struct seq_file *s, void *unused) | ||
424 | { | ||
425 | pwrdm_for_each(pwrdm_dbg_show_timer, s); | ||
426 | return 0; | ||
427 | } | ||
428 | |||
429 | static int pm_dbg_open(struct inode *inode, struct file *file) | ||
430 | { | ||
431 | switch ((int)inode->i_private) { | ||
432 | case DEBUG_FILE_COUNTERS: | ||
433 | return single_open(file, pm_dbg_show_counters, | ||
434 | &inode->i_private); | ||
435 | case DEBUG_FILE_TIMERS: | ||
436 | default: | ||
437 | return single_open(file, pm_dbg_show_timers, | ||
438 | &inode->i_private); | ||
439 | }; | ||
440 | } | ||
441 | |||
442 | static int pm_dbg_reg_open(struct inode *inode, struct file *file) | ||
443 | { | ||
444 | return single_open(file, pm_dbg_show_regs, inode->i_private); | ||
445 | } | ||
446 | |||
447 | static const struct file_operations debug_fops = { | ||
448 | .open = pm_dbg_open, | ||
449 | .read = seq_read, | ||
450 | .llseek = seq_lseek, | ||
451 | .release = single_release, | ||
452 | }; | ||
453 | |||
454 | static const struct file_operations debug_reg_fops = { | ||
455 | .open = pm_dbg_reg_open, | ||
456 | .read = seq_read, | ||
457 | .llseek = seq_lseek, | ||
458 | .release = single_release, | ||
459 | }; | ||
460 | |||
461 | int pm_dbg_regset_init(int reg_set) | ||
462 | { | ||
463 | char name[2]; | ||
464 | |||
465 | if (!pm_dbg_init_done) | ||
466 | pm_dbg_init(); | ||
467 | |||
468 | if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS || | ||
469 | pm_dbg_reg_set[reg_set-1] != NULL) | ||
470 | return -EINVAL; | ||
471 | |||
472 | pm_dbg_reg_set[reg_set-1] = | ||
473 | kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); | ||
474 | |||
475 | if (pm_dbg_reg_set[reg_set-1] == NULL) | ||
476 | return -ENOMEM; | ||
477 | |||
478 | if (pm_dbg_dir != NULL) { | ||
479 | sprintf(name, "%d", reg_set); | ||
480 | |||
481 | (void) debugfs_create_file(name, S_IRUGO, | ||
482 | pm_dbg_dir, (void *)reg_set, &debug_reg_fops); | ||
483 | } | ||
484 | |||
485 | return 0; | ||
486 | } | ||
487 | |||
488 | static int pwrdm_suspend_get(void *data, u64 *val) | ||
489 | { | ||
490 | *val = omap3_pm_get_suspend_state((struct powerdomain *)data); | ||
491 | |||
492 | if (*val >= 0) | ||
493 | return 0; | ||
494 | return *val; | ||
495 | } | ||
496 | |||
497 | static int pwrdm_suspend_set(void *data, u64 val) | ||
498 | { | ||
499 | return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val); | ||
500 | } | ||
501 | |||
502 | DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get, | ||
503 | pwrdm_suspend_set, "%llu\n"); | ||
504 | |||
505 | static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir) | ||
506 | { | ||
507 | int i; | ||
508 | s64 t; | ||
509 | struct dentry *d; | ||
510 | |||
511 | t = sched_clock(); | ||
512 | |||
513 | for (i = 0; i < 4; i++) | ||
514 | pwrdm->state_timer[i] = 0; | ||
515 | |||
516 | pwrdm->timer = t; | ||
517 | |||
518 | if (strncmp(pwrdm->name, "dpll", 4) == 0) | ||
519 | return 0; | ||
520 | |||
521 | d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); | ||
522 | |||
523 | (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, | ||
524 | (void *)pwrdm, &pwrdm_suspend_fops); | ||
525 | |||
526 | return 0; | ||
527 | } | ||
528 | |||
529 | static int __init pm_dbg_init(void) | ||
530 | { | ||
531 | int i; | ||
532 | struct dentry *d; | ||
533 | char name[2]; | ||
534 | |||
535 | if (pm_dbg_init_done) | ||
536 | return 0; | ||
537 | |||
538 | if (cpu_is_omap34xx()) | ||
539 | pm_dbg_reg_modules = omap3_pm_reg_modules; | ||
540 | else { | ||
541 | printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); | ||
542 | return -ENODEV; | ||
543 | } | ||
544 | |||
545 | d = debugfs_create_dir("pm_debug", NULL); | ||
546 | if (IS_ERR(d)) | ||
547 | return PTR_ERR(d); | ||
548 | |||
549 | (void) debugfs_create_file("count", S_IRUGO, | ||
550 | d, (void *)DEBUG_FILE_COUNTERS, &debug_fops); | ||
551 | (void) debugfs_create_file("time", S_IRUGO, | ||
552 | d, (void *)DEBUG_FILE_TIMERS, &debug_fops); | ||
553 | |||
554 | pwrdm_for_each(pwrdms_setup, (void *)d); | ||
555 | |||
556 | pm_dbg_dir = debugfs_create_dir("registers", d); | ||
557 | if (IS_ERR(pm_dbg_dir)) | ||
558 | return PTR_ERR(pm_dbg_dir); | ||
559 | |||
560 | (void) debugfs_create_file("current", S_IRUGO, | ||
561 | pm_dbg_dir, (void *)0, &debug_reg_fops); | ||
562 | |||
563 | for (i = 0; i < PM_DBG_MAX_REG_SETS; i++) | ||
564 | if (pm_dbg_reg_set[i] != NULL) { | ||
565 | sprintf(name, "%d", i+1); | ||
566 | (void) debugfs_create_file(name, S_IRUGO, | ||
567 | pm_dbg_dir, (void *)(i+1), &debug_reg_fops); | ||
568 | |||
569 | } | ||
570 | |||
571 | pm_dbg_init_done = 1; | ||
572 | |||
573 | return 0; | ||
574 | } | ||
575 | arch_initcall(pm_dbg_init); | ||
576 | |||
577 | #else | ||
578 | void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {} | ||
579 | #endif | ||
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 21201cd4117b..8400f5768923 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
@@ -11,12 +11,23 @@ | |||
11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H | 11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H |
12 | #define __ARCH_ARM_MACH_OMAP2_PM_H | 12 | #define __ARCH_ARM_MACH_OMAP2_PM_H |
13 | 13 | ||
14 | #include <mach/powerdomain.h> | ||
15 | |||
16 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); | ||
17 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); | ||
18 | |||
14 | #ifdef CONFIG_PM_DEBUG | 19 | #ifdef CONFIG_PM_DEBUG |
15 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | 20 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); |
16 | extern int omap2_pm_debug; | 21 | extern int omap2_pm_debug; |
22 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); | ||
23 | extern int pm_dbg_regset_save(int reg_set); | ||
24 | extern int pm_dbg_regset_init(int reg_set); | ||
17 | #else | 25 | #else |
18 | #define omap2_pm_dump(mode, resume, us) do {} while (0); | 26 | #define omap2_pm_dump(mode, resume, us) do {} while (0); |
19 | #define omap2_pm_debug 0 | 27 | #define omap2_pm_debug 0 |
28 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); | ||
29 | #define pm_dbg_regset_save(reg_set) do {} while (0); | ||
30 | #define pm_dbg_regset_init(reg_set) do {} while (0); | ||
20 | #endif /* CONFIG_PM_DEBUG */ | 31 | #endif /* CONFIG_PM_DEBUG */ |
21 | 32 | ||
22 | extern void omap24xx_idle_loop_suspend(void); | 33 | extern void omap24xx_idle_loop_suspend(void); |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 528dbdc26e23..bff5c4e89742 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -333,7 +333,7 @@ static struct platform_suspend_ops omap_pm_ops = { | |||
333 | .valid = suspend_valid_only_mem, | 333 | .valid = suspend_valid_only_mem, |
334 | }; | 334 | }; |
335 | 335 | ||
336 | static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm) | 336 | static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm, void *unused) |
337 | { | 337 | { |
338 | omap2_clkdm_allow_idle(clkdm); | 338 | omap2_clkdm_allow_idle(clkdm); |
339 | return 0; | 339 | return 0; |
@@ -385,7 +385,7 @@ static void __init prcm_setup_regs(void) | |||
385 | omap2_clkdm_sleep(gfx_clkdm); | 385 | omap2_clkdm_sleep(gfx_clkdm); |
386 | 386 | ||
387 | /* Enable clockdomain hardware-supervised control for all clkdms */ | 387 | /* Enable clockdomain hardware-supervised control for all clkdms */ |
388 | clkdm_for_each(_pm_clkdm_enable_hwsup); | 388 | clkdm_for_each(_pm_clkdm_enable_hwsup, NULL); |
389 | 389 | ||
390 | /* Enable clock autoidle for all domains */ | 390 | /* Enable clock autoidle for all domains */ |
391 | cm_write_mod_reg(OMAP24XX_AUTO_CAM | | 391 | cm_write_mod_reg(OMAP24XX_AUTO_CAM | |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index d67b781045b7..0ff5a6c53aa0 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -170,6 +170,8 @@ static void omap_sram_idle(void) | |||
170 | printk(KERN_ERR "Invalid mpu state in sram_idle\n"); | 170 | printk(KERN_ERR "Invalid mpu state in sram_idle\n"); |
171 | return; | 171 | return; |
172 | } | 172 | } |
173 | pwrdm_pre_transition(); | ||
174 | |||
173 | omap2_gpio_prepare_for_retention(); | 175 | omap2_gpio_prepare_for_retention(); |
174 | omap_uart_prepare_idle(0); | 176 | omap_uart_prepare_idle(0); |
175 | omap_uart_prepare_idle(1); | 177 | omap_uart_prepare_idle(1); |
@@ -182,6 +184,9 @@ static void omap_sram_idle(void) | |||
182 | omap_uart_resume_idle(1); | 184 | omap_uart_resume_idle(1); |
183 | omap_uart_resume_idle(0); | 185 | omap_uart_resume_idle(0); |
184 | omap2_gpio_resume_after_retention(); | 186 | omap2_gpio_resume_after_retention(); |
187 | |||
188 | pwrdm_post_transition(); | ||
189 | |||
185 | } | 190 | } |
186 | 191 | ||
187 | /* | 192 | /* |
@@ -271,6 +276,7 @@ static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | |||
271 | if (sleep_switch) { | 276 | if (sleep_switch) { |
272 | omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); | 277 | omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); |
273 | pwrdm_wait_transition(pwrdm); | 278 | pwrdm_wait_transition(pwrdm); |
279 | pwrdm_state_switch(pwrdm); | ||
274 | } | 280 | } |
275 | 281 | ||
276 | err: | 282 | err: |
@@ -658,7 +664,31 @@ static void __init prcm_setup_regs(void) | |||
658 | omap3_d2d_idle(); | 664 | omap3_d2d_idle(); |
659 | } | 665 | } |
660 | 666 | ||
661 | static int __init pwrdms_setup(struct powerdomain *pwrdm) | 667 | int omap3_pm_get_suspend_state(struct powerdomain *pwrdm) |
668 | { | ||
669 | struct power_state *pwrst; | ||
670 | |||
671 | list_for_each_entry(pwrst, &pwrst_list, node) { | ||
672 | if (pwrst->pwrdm == pwrdm) | ||
673 | return pwrst->next_state; | ||
674 | } | ||
675 | return -EINVAL; | ||
676 | } | ||
677 | |||
678 | int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state) | ||
679 | { | ||
680 | struct power_state *pwrst; | ||
681 | |||
682 | list_for_each_entry(pwrst, &pwrst_list, node) { | ||
683 | if (pwrst->pwrdm == pwrdm) { | ||
684 | pwrst->next_state = state; | ||
685 | return 0; | ||
686 | } | ||
687 | } | ||
688 | return -EINVAL; | ||
689 | } | ||
690 | |||
691 | static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) | ||
662 | { | 692 | { |
663 | struct power_state *pwrst; | 693 | struct power_state *pwrst; |
664 | 694 | ||
@@ -683,7 +713,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm) | |||
683 | * supported. Initiate sleep transition for other clockdomains, if | 713 | * supported. Initiate sleep transition for other clockdomains, if |
684 | * they are not used | 714 | * they are not used |
685 | */ | 715 | */ |
686 | static int __init clkdms_setup(struct clockdomain *clkdm) | 716 | static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) |
687 | { | 717 | { |
688 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) | 718 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) |
689 | omap2_clkdm_allow_idle(clkdm); | 719 | omap2_clkdm_allow_idle(clkdm); |
@@ -716,13 +746,13 @@ static int __init omap3_pm_init(void) | |||
716 | goto err1; | 746 | goto err1; |
717 | } | 747 | } |
718 | 748 | ||
719 | ret = pwrdm_for_each(pwrdms_setup); | 749 | ret = pwrdm_for_each(pwrdms_setup, NULL); |
720 | if (ret) { | 750 | if (ret) { |
721 | printk(KERN_ERR "Failed to setup powerdomains\n"); | 751 | printk(KERN_ERR "Failed to setup powerdomains\n"); |
722 | goto err2; | 752 | goto err2; |
723 | } | 753 | } |
724 | 754 | ||
725 | (void) clkdm_for_each(clkdms_setup); | 755 | (void) clkdm_for_each(clkdms_setup, NULL); |
726 | 756 | ||
727 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); | 757 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); |
728 | if (mpu_pwrdm == NULL) { | 758 | if (mpu_pwrdm == NULL) { |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 983f1cb676be..5a6cef3e42bf 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -35,6 +35,13 @@ | |||
35 | #include <mach/powerdomain.h> | 35 | #include <mach/powerdomain.h> |
36 | #include <mach/clockdomain.h> | 36 | #include <mach/clockdomain.h> |
37 | 37 | ||
38 | #include "pm.h" | ||
39 | |||
40 | enum { | ||
41 | PWRDM_STATE_NOW = 0, | ||
42 | PWRDM_STATE_PREV, | ||
43 | }; | ||
44 | |||
38 | /* pwrdm_list contains all registered struct powerdomains */ | 45 | /* pwrdm_list contains all registered struct powerdomains */ |
39 | static LIST_HEAD(pwrdm_list); | 46 | static LIST_HEAD(pwrdm_list); |
40 | 47 | ||
@@ -102,6 +109,65 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, | |||
102 | return pd->pwrdm; | 109 | return pd->pwrdm; |
103 | } | 110 | } |
104 | 111 | ||
112 | static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) | ||
113 | { | ||
114 | |||
115 | int prev; | ||
116 | int state; | ||
117 | |||
118 | if (pwrdm == NULL) | ||
119 | return -EINVAL; | ||
120 | |||
121 | state = pwrdm_read_pwrst(pwrdm); | ||
122 | |||
123 | switch (flag) { | ||
124 | case PWRDM_STATE_NOW: | ||
125 | prev = pwrdm->state; | ||
126 | break; | ||
127 | case PWRDM_STATE_PREV: | ||
128 | prev = pwrdm_read_prev_pwrst(pwrdm); | ||
129 | if (pwrdm->state != prev) | ||
130 | pwrdm->state_counter[prev]++; | ||
131 | break; | ||
132 | default: | ||
133 | return -EINVAL; | ||
134 | } | ||
135 | |||
136 | if (state != prev) | ||
137 | pwrdm->state_counter[state]++; | ||
138 | |||
139 | pm_dbg_update_time(pwrdm, prev); | ||
140 | |||
141 | pwrdm->state = state; | ||
142 | |||
143 | return 0; | ||
144 | } | ||
145 | |||
146 | static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused) | ||
147 | { | ||
148 | pwrdm_clear_all_prev_pwrst(pwrdm); | ||
149 | _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); | ||
150 | return 0; | ||
151 | } | ||
152 | |||
153 | static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) | ||
154 | { | ||
155 | _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV); | ||
156 | return 0; | ||
157 | } | ||
158 | |||
159 | static __init void _pwrdm_setup(struct powerdomain *pwrdm) | ||
160 | { | ||
161 | int i; | ||
162 | |||
163 | for (i = 0; i < 4; i++) | ||
164 | pwrdm->state_counter[i] = 0; | ||
165 | |||
166 | pwrdm_wait_transition(pwrdm); | ||
167 | pwrdm->state = pwrdm_read_pwrst(pwrdm); | ||
168 | pwrdm->state_counter[pwrdm->state] = 1; | ||
169 | |||
170 | } | ||
105 | 171 | ||
106 | /* Public functions */ | 172 | /* Public functions */ |
107 | 173 | ||
@@ -117,9 +183,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list) | |||
117 | { | 183 | { |
118 | struct powerdomain **p = NULL; | 184 | struct powerdomain **p = NULL; |
119 | 185 | ||
120 | if (pwrdm_list) | 186 | if (pwrdm_list) { |
121 | for (p = pwrdm_list; *p; p++) | 187 | for (p = pwrdm_list; *p; p++) { |
122 | pwrdm_register(*p); | 188 | pwrdm_register(*p); |
189 | _pwrdm_setup(*p); | ||
190 | } | ||
191 | } | ||
123 | } | 192 | } |
124 | 193 | ||
125 | /** | 194 | /** |
@@ -217,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name) | |||
217 | * anything else to indicate failure; or -EINVAL if the function | 286 | * anything else to indicate failure; or -EINVAL if the function |
218 | * pointer is null. | 287 | * pointer is null. |
219 | */ | 288 | */ |
220 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) | 289 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), |
290 | void *user) | ||
221 | { | 291 | { |
222 | struct powerdomain *temp_pwrdm; | 292 | struct powerdomain *temp_pwrdm; |
223 | unsigned long flags; | 293 | unsigned long flags; |
@@ -228,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) | |||
228 | 298 | ||
229 | read_lock_irqsave(&pwrdm_rwlock, flags); | 299 | read_lock_irqsave(&pwrdm_rwlock, flags); |
230 | list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { | 300 | list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { |
231 | ret = (*fn)(temp_pwrdm); | 301 | ret = (*fn)(temp_pwrdm, user); |
232 | if (ret) | 302 | if (ret) |
233 | break; | 303 | break; |
234 | } | 304 | } |
@@ -1110,4 +1180,36 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm) | |||
1110 | return 0; | 1180 | return 0; |
1111 | } | 1181 | } |
1112 | 1182 | ||
1183 | int pwrdm_state_switch(struct powerdomain *pwrdm) | ||
1184 | { | ||
1185 | return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); | ||
1186 | } | ||
1187 | |||
1188 | int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) | ||
1189 | { | ||
1190 | if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) { | ||
1191 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | ||
1192 | return pwrdm_state_switch(clkdm->pwrdm.ptr); | ||
1193 | } | ||
1194 | |||
1195 | return -EINVAL; | ||
1196 | } | ||
1197 | int pwrdm_clk_state_switch(struct clk *clk) | ||
1198 | { | ||
1199 | if (clk != NULL && clk->clkdm != NULL) | ||
1200 | return pwrdm_clkdm_state_switch(clk->clkdm); | ||
1201 | return -EINVAL; | ||
1202 | } | ||
1203 | |||
1204 | int pwrdm_pre_transition(void) | ||
1205 | { | ||
1206 | pwrdm_for_each(_pwrdm_pre_transition_cb, NULL); | ||
1207 | return 0; | ||
1208 | } | ||
1209 | |||
1210 | int pwrdm_post_transition(void) | ||
1211 | { | ||
1212 | pwrdm_for_each(_pwrdm_post_transition_cb, NULL); | ||
1213 | return 0; | ||
1214 | } | ||
1113 | 1215 | ||