diff options
author | Tony Lindgren <tony@atomide.com> | 2012-09-12 23:42:36 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-09-12 23:42:36 -0400 |
commit | 3c101c41fbe5daf88afbbd575542aa1d047812bb (patch) | |
tree | 97b8837a7ef888f07d01ff7109303402dd8fed2e /arch/arm/mach-omap2 | |
parent | f191f40c1819ffdca05408e6349f7fd30ef1cc36 (diff) | |
parent | 7852ec0536ca39cefffc6301dc77f8ae55592926 (diff) |
Merge tag 'omap-cleanup-b-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-makefile-sparse
smatch and string-wrapping cleanups for the OMAP subarch code.
These changes fix some of the more meaningful warnings that smatch
returns for the OMAP subarch code, and unwraps strings that are
wrapped at the 80-column boundary, to conform with the current
practice.
Basic build, boot, and PM logs are available here:
http://www.pwsan.com/omap/testlogs/warnings_a_cleanup_3.7/20120912025927/
Diffstat (limited to 'arch/arm/mach-omap2')
30 files changed, 160 insertions, 189 deletions
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index d8deaea37dca..4b43fe311571 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
@@ -550,8 +550,8 @@ static int n8x0_auto_sleep_regulators(void) | |||
550 | 550 | ||
551 | ret = menelaus_set_regulator_sleep(1, val); | 551 | ret = menelaus_set_regulator_sleep(1, val); |
552 | if (ret < 0) { | 552 | if (ret < 0) { |
553 | printk(KERN_ERR "Could not set regulators to sleep on " | 553 | pr_err("Could not set regulators to sleep on menelaus: %u\n", |
554 | "menelaus: %u\n", ret); | 554 | ret); |
555 | return ret; | 555 | return ret; |
556 | } | 556 | } |
557 | return 0; | 557 | return 0; |
@@ -563,8 +563,7 @@ static int n8x0_auto_voltage_scale(void) | |||
563 | 563 | ||
564 | ret = menelaus_set_vcore_hw(1400, 1050); | 564 | ret = menelaus_set_vcore_hw(1400, 1050); |
565 | if (ret < 0) { | 565 | if (ret < 0) { |
566 | printk(KERN_ERR "Could not set VCORE voltage on " | 566 | pr_err("Could not set VCORE voltage on menelaus: %u\n", ret); |
567 | "menelaus: %u\n", ret); | ||
568 | return ret; | 567 | return ret; |
569 | } | 568 | } |
570 | return 0; | 569 | return 0; |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 7a62d1322b7a..13c101c2c643 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
@@ -516,8 +516,7 @@ static void __init overo_init(void) | |||
516 | udelay(10); | 516 | udelay(10); |
517 | gpio_set_value(OVERO_GPIO_W2W_NRESET, 1); | 517 | gpio_set_value(OVERO_GPIO_W2W_NRESET, 1); |
518 | } else { | 518 | } else { |
519 | printk(KERN_ERR "could not obtain gpio for " | 519 | pr_err("could not obtain gpio for OVERO_GPIO_W2W_NRESET\n"); |
520 | "OVERO_GPIO_W2W_NRESET\n"); | ||
521 | } | 520 | } |
522 | 521 | ||
523 | ret = gpio_request_array(overo_bt_gpios, ARRAY_SIZE(overo_bt_gpios)); | 522 | ret = gpio_request_array(overo_bt_gpios, ARRAY_SIZE(overo_bt_gpios)); |
@@ -536,8 +535,7 @@ static void __init overo_init(void) | |||
536 | if (ret == 0) | 535 | if (ret == 0) |
537 | gpio_export(OVERO_GPIO_USBH_CPEN, 0); | 536 | gpio_export(OVERO_GPIO_USBH_CPEN, 0); |
538 | else | 537 | else |
539 | printk(KERN_ERR "could not obtain gpio for " | 538 | pr_err("could not obtain gpio for OVERO_GPIO_USBH_CPEN\n"); |
540 | "OVERO_GPIO_USBH_CPEN\n"); | ||
541 | } | 539 | } |
542 | 540 | ||
543 | MACHINE_START(OVERO, "Gumstix Overo") | 541 | MACHINE_START(OVERO, "Gumstix Overo") |
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index 5ec069e529e7..0d8d91917d10 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c | |||
@@ -84,8 +84,7 @@ static inline void __init zoom_init_quaduart(void) | |||
84 | quart_cs = ZOOM_QUADUART_CS; | 84 | quart_cs = ZOOM_QUADUART_CS; |
85 | 85 | ||
86 | if (gpmc_cs_request(quart_cs, SZ_1M, &cs_mem_base) < 0) { | 86 | if (gpmc_cs_request(quart_cs, SZ_1M, &cs_mem_base) < 0) { |
87 | printk(KERN_ERR "Failed to request GPMC mem" | 87 | pr_err("Failed to request GPMC mem for Quad UART(TL16CP754C)\n"); |
88 | "for Quad UART(TL16CP754C)\n"); | ||
89 | return; | 88 | return; |
90 | } | 89 | } |
91 | 90 | ||
@@ -107,8 +106,8 @@ static inline int omap_zoom_debugboard_detect(void) | |||
107 | 106 | ||
108 | if (gpio_request_one(debug_board_detect, GPIOF_IN, | 107 | if (gpio_request_one(debug_board_detect, GPIOF_IN, |
109 | "Zoom debug board detect") < 0) { | 108 | "Zoom debug board detect") < 0) { |
110 | printk(KERN_ERR "Failed to request GPIO%d for Zoom debug" | 109 | pr_err("Failed to request GPIO%d for Zoom debug board detect\n", |
111 | "board detect\n", debug_board_detect); | 110 | debug_board_detect); |
112 | return 0; | 111 | return 0; |
113 | } | 112 | } |
114 | 113 | ||
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c index d6e34dd9e7e7..298887b5bf66 100644 --- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c +++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c | |||
@@ -92,15 +92,13 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) | |||
92 | 92 | ||
93 | pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, | 93 | pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, |
94 | validrate); | 94 | validrate); |
95 | pr_debug("clock: SDRC CS0 timing params used:" | 95 | pr_debug("clock: SDRC CS0 timing params used: RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", |
96 | " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", | ||
97 | sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, | 96 | sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, |
98 | sdrc_cs0->actim_ctrlb, sdrc_cs0->mr); | 97 | sdrc_cs0->actim_ctrlb, sdrc_cs0->mr); |
99 | if (sdrc_cs1) | 98 | if (sdrc_cs1) |
100 | pr_debug("clock: SDRC CS1 timing params used: " | 99 | pr_debug("clock: SDRC CS1 timing params used: RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", |
101 | " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n", | 100 | sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla, |
102 | sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla, | 101 | sdrc_cs1->actim_ctrlb, sdrc_cs1->mr); |
103 | sdrc_cs1->actim_ctrlb, sdrc_cs1->mr); | ||
104 | 102 | ||
105 | if (sdrc_cs1) | 103 | if (sdrc_cs1) |
106 | omap3_configure_core_dpll( | 104 | omap3_configure_core_dpll( |
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c index 04d551b1f7f7..19a980956d44 100644 --- a/arch/arm/mach-omap2/clkt_clksel.c +++ b/arch/arm/mach-omap2/clkt_clksel.c | |||
@@ -71,8 +71,8 @@ static const struct clksel *_get_clksel_by_parent(struct clk *clk, | |||
71 | 71 | ||
72 | if (!clks->parent) { | 72 | if (!clks->parent) { |
73 | /* This indicates a data problem */ | 73 | /* This indicates a data problem */ |
74 | WARN(1, "clock: Could not find parent clock %s in clksel array " | 74 | WARN(1, "clock: %s: could not find parent clock %s in clksel array\n", |
75 | "of clock %s\n", src_clk->name, clk->name); | 75 | clk->name, src_clk->name); |
76 | return NULL; | 76 | return NULL; |
77 | } | 77 | } |
78 | 78 | ||
@@ -126,8 +126,8 @@ static u8 _get_div_and_fieldval(struct clk *src_clk, struct clk *clk, | |||
126 | 126 | ||
127 | if (max_div == 0) { | 127 | if (max_div == 0) { |
128 | /* This indicates an error in the clksel data */ | 128 | /* This indicates an error in the clksel data */ |
129 | WARN(1, "clock: Could not find divisor for clock %s parent %s" | 129 | WARN(1, "clock: %s: could not find divisor for parent %s\n", |
130 | "\n", clk->name, src_clk->parent->name); | 130 | clk->name, src_clk->parent->name); |
131 | return 0; | 131 | return 0; |
132 | } | 132 | } |
133 | 133 | ||
@@ -191,8 +191,8 @@ static u32 _clksel_to_divisor(struct clk *clk, u32 field_val) | |||
191 | 191 | ||
192 | if (!clkr->div) { | 192 | if (!clkr->div) { |
193 | /* This indicates a data error */ | 193 | /* This indicates a data error */ |
194 | WARN(1, "clock: Could not find fieldval %d for clock %s parent " | 194 | WARN(1, "clock: %s: could not find fieldval %d parent %s\n", |
195 | "%s\n", field_val, clk->name, clk->parent->name); | 195 | clk->name, field_val, clk->parent->name); |
196 | return 0; | 196 | return 0; |
197 | } | 197 | } |
198 | 198 | ||
@@ -230,8 +230,8 @@ static u32 _divisor_to_clksel(struct clk *clk, u32 div) | |||
230 | } | 230 | } |
231 | 231 | ||
232 | if (!clkr->div) { | 232 | if (!clkr->div) { |
233 | pr_err("clock: Could not find divisor %d for clock %s parent " | 233 | pr_err("clock: %s: could not find divisor %d parent %s\n", |
234 | "%s\n", div, clk->name, clk->parent->name); | 234 | clk->name, div, clk->parent->name); |
235 | return ~0; | 235 | return ~0; |
236 | } | 236 | } |
237 | 237 | ||
@@ -300,8 +300,8 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, | |||
300 | 300 | ||
301 | /* Sanity check */ | 301 | /* Sanity check */ |
302 | if (clkr->div <= last_div) | 302 | if (clkr->div <= last_div) |
303 | pr_err("clock: clksel_rate table not sorted " | 303 | pr_err("clock: %s: clksel_rate table not sorted", |
304 | "for clock %s", clk->name); | 304 | clk->name); |
305 | 305 | ||
306 | last_div = clkr->div; | 306 | last_div = clkr->div; |
307 | 307 | ||
@@ -312,9 +312,8 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, | |||
312 | } | 312 | } |
313 | 313 | ||
314 | if (!clkr->div) { | 314 | if (!clkr->div) { |
315 | pr_err("clock: Could not find divisor for target " | 315 | pr_err("clock: %s: could not find divisor for target rate %ld parent %s\n", |
316 | "rate %ld for clock %s parent %s\n", target_rate, | 316 | clk->name, target_rate, clk->parent->name); |
317 | clk->name, clk->parent->name); | ||
318 | return ~0; | 317 | return ~0; |
319 | } | 318 | } |
320 | 319 | ||
@@ -359,8 +358,7 @@ void omap2_init_clksel_parent(struct clk *clk) | |||
359 | 358 | ||
360 | if (clkr->val == r) { | 359 | if (clkr->val == r) { |
361 | if (clk->parent != clks->parent) { | 360 | if (clk->parent != clks->parent) { |
362 | pr_debug("clock: inited %s parent " | 361 | pr_debug("clock: %s: inited parent to %s (was %s)\n", |
363 | "to %s (was %s)\n", | ||
364 | clk->name, clks->parent->name, | 362 | clk->name, clks->parent->name, |
365 | ((clk->parent) ? | 363 | ((clk->parent) ? |
366 | clk->parent->name : "NULL")); | 364 | clk->parent->name : "NULL")); |
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index ae624c3b832a..a3b60c7b9aa8 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c | |||
@@ -105,13 +105,13 @@ static int _dpll_test_fint(struct clk *clk, u8 n) | |||
105 | } | 105 | } |
106 | 106 | ||
107 | if (fint < fint_min) { | 107 | if (fint < fint_min) { |
108 | pr_debug("rejecting n=%d due to Fint failure, " | 108 | pr_debug("rejecting n=%d due to Fint failure, lowering max_divider\n", |
109 | "lowering max_divider\n", n); | 109 | n); |
110 | dd->max_divider = n; | 110 | dd->max_divider = n; |
111 | ret = DPLL_FINT_UNDERFLOW; | 111 | ret = DPLL_FINT_UNDERFLOW; |
112 | } else if (fint > fint_max) { | 112 | } else if (fint > fint_max) { |
113 | pr_debug("rejecting n=%d due to Fint failure, " | 113 | pr_debug("rejecting n=%d due to Fint failure, boosting min_divider\n", |
114 | "boosting min_divider\n", n); | 114 | n); |
115 | dd->min_divider = n; | 115 | dd->min_divider = n; |
116 | ret = DPLL_FINT_INVALID; | 116 | ret = DPLL_FINT_INVALID; |
117 | } else if (cpu_is_omap3430() && fint > OMAP3430_DPLL_FINT_BAND1_MAX && | 117 | } else if (cpu_is_omap3430() && fint > OMAP3430_DPLL_FINT_BAND1_MAX && |
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 1a1f97f3ca69..e97f98ffe8b2 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
@@ -104,8 +104,8 @@ void omap2_init_clk_clkdm(struct clk *clk) | |||
104 | clk->name, clk->clkdm_name); | 104 | clk->name, clk->clkdm_name); |
105 | clk->clkdm = clkdm; | 105 | clk->clkdm = clkdm; |
106 | } else { | 106 | } else { |
107 | pr_debug("clock: could not associate clk %s to " | 107 | pr_debug("clock: could not associate clk %s to clkdm %s\n", |
108 | "clkdm %s\n", clk->name, clk->clkdm_name); | 108 | clk->name, clk->clkdm_name); |
109 | } | 109 | } |
110 | } | 110 | } |
111 | 111 | ||
@@ -228,8 +228,7 @@ void omap2_dflt_clk_disable(struct clk *clk) | |||
228 | * 'Independent' here refers to a clock which is not | 228 | * 'Independent' here refers to a clock which is not |
229 | * controlled by its parent. | 229 | * controlled by its parent. |
230 | */ | 230 | */ |
231 | printk(KERN_ERR "clock: clk_disable called on independent " | 231 | pr_err("clock: clk_disable called on independent clock %s which has no enable_reg\n", clk->name); |
232 | "clock %s which has no enable_reg\n", clk->name); | ||
233 | return; | 232 | return; |
234 | } | 233 | } |
235 | 234 | ||
@@ -272,8 +271,7 @@ const struct clkops clkops_omap2_dflt = { | |||
272 | void omap2_clk_disable(struct clk *clk) | 271 | void omap2_clk_disable(struct clk *clk) |
273 | { | 272 | { |
274 | if (clk->usecount == 0) { | 273 | if (clk->usecount == 0) { |
275 | WARN(1, "clock: %s: omap2_clk_disable() called, but usecount " | 274 | WARN(1, "clock: %s: omap2_clk_disable() called, but usecount already 0?", clk->name); |
276 | "already 0?", clk->name); | ||
277 | return; | 275 | return; |
278 | } | 276 | } |
279 | 277 | ||
@@ -334,8 +332,8 @@ int omap2_clk_enable(struct clk *clk) | |||
334 | if (clkdm_control && clk->clkdm) { | 332 | if (clkdm_control && clk->clkdm) { |
335 | ret = clkdm_clk_enable(clk->clkdm, clk); | 333 | ret = clkdm_clk_enable(clk->clkdm, clk); |
336 | if (ret) { | 334 | if (ret) { |
337 | WARN(1, "clock: %s: could not enable clockdomain %s: " | 335 | WARN(1, "clock: %s: could not enable clockdomain %s: %d\n", |
338 | "%d\n", clk->name, clk->clkdm->name, ret); | 336 | clk->name, clk->clkdm->name, ret); |
339 | goto oce_err2; | 337 | goto oce_err2; |
340 | } | 338 | } |
341 | } | 339 | } |
@@ -503,10 +501,8 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name, | |||
503 | 501 | ||
504 | hfclkin_rate = clk_get_rate(hfclkin_ck); | 502 | hfclkin_rate = clk_get_rate(hfclkin_ck); |
505 | 503 | ||
506 | pr_info("Switched to new clocking rate (Crystal/Core/MPU): " | 504 | pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", |
507 | "%ld.%01ld/%ld/%ld MHz\n", | 505 | (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10), |
508 | (hfclkin_rate / 1000000), | ||
509 | ((hfclkin_rate / 100000) % 10), | ||
510 | (clk_get_rate(core_ck) / 1000000), | 506 | (clk_get_rate(core_ck) / 1000000), |
511 | (clk_get_rate(mpu_ck) / 1000000)); | 507 | (clk_get_rate(mpu_ck) / 1000000)); |
512 | } | 508 | } |
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c index fc2765bcdd40..15cdc6471737 100644 --- a/arch/arm/mach-omap2/clock3xxx.c +++ b/arch/arm/mach-omap2/clock3xxx.c | |||
@@ -49,8 +49,7 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) | |||
49 | * on DPLL4. | 49 | * on DPLL4. |
50 | */ | 50 | */ |
51 | if (omap_rev() == OMAP3430_REV_ES1_0) { | 51 | if (omap_rev() == OMAP3430_REV_ES1_0) { |
52 | pr_err("clock: DPLL4 cannot change rate due to " | 52 | pr_err("clock: DPLL4 cannot change rate due to silicon 'Limitation 2.5' on 3430ES1.\n"); |
53 | "silicon 'Limitation 2.5' on 3430ES1.\n"); | ||
54 | return -EINVAL; | 53 | return -EINVAL; |
55 | } | 54 | } |
56 | 55 | ||
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 8664f5a8bfb6..a1555627ad97 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -174,9 +174,8 @@ void _clkdm_add_autodeps(struct clockdomain *clkdm) | |||
174 | if (IS_ERR(autodep->clkdm.ptr)) | 174 | if (IS_ERR(autodep->clkdm.ptr)) |
175 | continue; | 175 | continue; |
176 | 176 | ||
177 | pr_debug("clockdomain: adding %s sleepdep/wkdep for " | 177 | pr_debug("clockdomain: %s: adding %s sleepdep/wkdep\n", |
178 | "clkdm %s\n", autodep->clkdm.ptr->name, | 178 | clkdm->name, autodep->clkdm.ptr->name); |
179 | clkdm->name); | ||
180 | 179 | ||
181 | clkdm_add_sleepdep(clkdm, autodep->clkdm.ptr); | 180 | clkdm_add_sleepdep(clkdm, autodep->clkdm.ptr); |
182 | clkdm_add_wkdep(clkdm, autodep->clkdm.ptr); | 181 | clkdm_add_wkdep(clkdm, autodep->clkdm.ptr); |
@@ -205,9 +204,8 @@ void _clkdm_del_autodeps(struct clockdomain *clkdm) | |||
205 | if (IS_ERR(autodep->clkdm.ptr)) | 204 | if (IS_ERR(autodep->clkdm.ptr)) |
206 | continue; | 205 | continue; |
207 | 206 | ||
208 | pr_debug("clockdomain: removing %s sleepdep/wkdep for " | 207 | pr_debug("clockdomain: %s: removing %s sleepdep/wkdep\n", |
209 | "clkdm %s\n", autodep->clkdm.ptr->name, | 208 | clkdm->name, autodep->clkdm.ptr->name); |
210 | clkdm->name); | ||
211 | 209 | ||
212 | clkdm_del_sleepdep(clkdm, autodep->clkdm.ptr); | 210 | clkdm_del_sleepdep(clkdm, autodep->clkdm.ptr); |
213 | clkdm_del_wkdep(clkdm, autodep->clkdm.ptr); | 211 | clkdm_del_wkdep(clkdm, autodep->clkdm.ptr); |
@@ -469,14 +467,14 @@ int clkdm_add_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |||
469 | ret = -EINVAL; | 467 | ret = -EINVAL; |
470 | 468 | ||
471 | if (ret) { | 469 | if (ret) { |
472 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | 470 | pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n", |
473 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | 471 | clkdm1->name, clkdm2->name); |
474 | return ret; | 472 | return ret; |
475 | } | 473 | } |
476 | 474 | ||
477 | if (atomic_inc_return(&cd->wkdep_usecount) == 1) { | 475 | if (atomic_inc_return(&cd->wkdep_usecount) == 1) { |
478 | pr_debug("clockdomain: hardware will wake up %s when %s wakes " | 476 | pr_debug("clockdomain: hardware will wake up %s when %s wakes up\n", |
479 | "up\n", clkdm1->name, clkdm2->name); | 477 | clkdm1->name, clkdm2->name); |
480 | 478 | ||
481 | ret = arch_clkdm->clkdm_add_wkdep(clkdm1, clkdm2); | 479 | ret = arch_clkdm->clkdm_add_wkdep(clkdm1, clkdm2); |
482 | } | 480 | } |
@@ -510,14 +508,14 @@ int clkdm_del_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |||
510 | ret = -EINVAL; | 508 | ret = -EINVAL; |
511 | 509 | ||
512 | if (ret) { | 510 | if (ret) { |
513 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | 511 | pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n", |
514 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | 512 | clkdm1->name, clkdm2->name); |
515 | return ret; | 513 | return ret; |
516 | } | 514 | } |
517 | 515 | ||
518 | if (atomic_dec_return(&cd->wkdep_usecount) == 0) { | 516 | if (atomic_dec_return(&cd->wkdep_usecount) == 0) { |
519 | pr_debug("clockdomain: hardware will no longer wake up %s " | 517 | pr_debug("clockdomain: hardware will no longer wake up %s after %s wakes up\n", |
520 | "after %s wakes up\n", clkdm1->name, clkdm2->name); | 518 | clkdm1->name, clkdm2->name); |
521 | 519 | ||
522 | ret = arch_clkdm->clkdm_del_wkdep(clkdm1, clkdm2); | 520 | ret = arch_clkdm->clkdm_del_wkdep(clkdm1, clkdm2); |
523 | } | 521 | } |
@@ -555,8 +553,8 @@ int clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |||
555 | ret = -EINVAL; | 553 | ret = -EINVAL; |
556 | 554 | ||
557 | if (ret) { | 555 | if (ret) { |
558 | pr_debug("clockdomain: hardware cannot set/clear wake up of " | 556 | pr_debug("clockdomain: hardware cannot set/clear wake up of %s when %s wakes up\n", |
559 | "%s when %s wakes up\n", clkdm1->name, clkdm2->name); | 557 | clkdm1->name, clkdm2->name); |
560 | return ret; | 558 | return ret; |
561 | } | 559 | } |
562 | 560 | ||
@@ -613,15 +611,14 @@ int clkdm_add_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |||
613 | ret = -EINVAL; | 611 | ret = -EINVAL; |
614 | 612 | ||
615 | if (ret) { | 613 | if (ret) { |
616 | pr_debug("clockdomain: hardware cannot set/clear sleep " | 614 | pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n", |
617 | "dependency affecting %s from %s\n", clkdm1->name, | 615 | clkdm1->name, clkdm2->name); |
618 | clkdm2->name); | ||
619 | return ret; | 616 | return ret; |
620 | } | 617 | } |
621 | 618 | ||
622 | if (atomic_inc_return(&cd->sleepdep_usecount) == 1) { | 619 | if (atomic_inc_return(&cd->sleepdep_usecount) == 1) { |
623 | pr_debug("clockdomain: will prevent %s from sleeping if %s " | 620 | pr_debug("clockdomain: will prevent %s from sleeping if %s is active\n", |
624 | "is active\n", clkdm1->name, clkdm2->name); | 621 | clkdm1->name, clkdm2->name); |
625 | 622 | ||
626 | ret = arch_clkdm->clkdm_add_sleepdep(clkdm1, clkdm2); | 623 | ret = arch_clkdm->clkdm_add_sleepdep(clkdm1, clkdm2); |
627 | } | 624 | } |
@@ -657,16 +654,14 @@ int clkdm_del_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |||
657 | ret = -EINVAL; | 654 | ret = -EINVAL; |
658 | 655 | ||
659 | if (ret) { | 656 | if (ret) { |
660 | pr_debug("clockdomain: hardware cannot set/clear sleep " | 657 | pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n", |
661 | "dependency affecting %s from %s\n", clkdm1->name, | 658 | clkdm1->name, clkdm2->name); |
662 | clkdm2->name); | ||
663 | return ret; | 659 | return ret; |
664 | } | 660 | } |
665 | 661 | ||
666 | if (atomic_dec_return(&cd->sleepdep_usecount) == 0) { | 662 | if (atomic_dec_return(&cd->sleepdep_usecount) == 0) { |
667 | pr_debug("clockdomain: will no longer prevent %s from " | 663 | pr_debug("clockdomain: will no longer prevent %s from sleeping if %s is active\n", |
668 | "sleeping if %s is active\n", clkdm1->name, | 664 | clkdm1->name, clkdm2->name); |
669 | clkdm2->name); | ||
670 | 665 | ||
671 | ret = arch_clkdm->clkdm_del_sleepdep(clkdm1, clkdm2); | 666 | ret = arch_clkdm->clkdm_del_sleepdep(clkdm1, clkdm2); |
672 | } | 667 | } |
@@ -706,9 +701,8 @@ int clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) | |||
706 | ret = -EINVAL; | 701 | ret = -EINVAL; |
707 | 702 | ||
708 | if (ret) { | 703 | if (ret) { |
709 | pr_debug("clockdomain: hardware cannot set/clear sleep " | 704 | pr_debug("clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\n", |
710 | "dependency affecting %s from %s\n", clkdm1->name, | 705 | clkdm1->name, clkdm2->name); |
711 | clkdm2->name); | ||
712 | return ret; | 706 | return ret; |
713 | } | 707 | } |
714 | 708 | ||
@@ -755,8 +749,8 @@ int clkdm_sleep(struct clockdomain *clkdm) | |||
755 | return -EINVAL; | 749 | return -EINVAL; |
756 | 750 | ||
757 | if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { | 751 | if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { |
758 | pr_debug("clockdomain: %s does not support forcing " | 752 | pr_debug("clockdomain: %s does not support forcing sleep via software\n", |
759 | "sleep via software\n", clkdm->name); | 753 | clkdm->name); |
760 | return -EINVAL; | 754 | return -EINVAL; |
761 | } | 755 | } |
762 | 756 | ||
@@ -790,8 +784,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) | |||
790 | return -EINVAL; | 784 | return -EINVAL; |
791 | 785 | ||
792 | if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { | 786 | if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { |
793 | pr_debug("clockdomain: %s does not support forcing " | 787 | pr_debug("clockdomain: %s does not support forcing wakeup via software\n", |
794 | "wakeup via software\n", clkdm->name); | 788 | clkdm->name); |
795 | return -EINVAL; | 789 | return -EINVAL; |
796 | } | 790 | } |
797 | 791 | ||
@@ -826,8 +820,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) | |||
826 | return; | 820 | return; |
827 | 821 | ||
828 | if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { | 822 | if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { |
829 | pr_debug("clock: automatic idle transitions cannot be enabled " | 823 | pr_debug("clock: %s: automatic idle transitions cannot be enabled\n", |
830 | "on clockdomain %s\n", clkdm->name); | 824 | clkdm->name); |
831 | return; | 825 | return; |
832 | } | 826 | } |
833 | 827 | ||
@@ -861,8 +855,8 @@ void clkdm_deny_idle(struct clockdomain *clkdm) | |||
861 | return; | 855 | return; |
862 | 856 | ||
863 | if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { | 857 | if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { |
864 | pr_debug("clockdomain: automatic idle transitions cannot be " | 858 | pr_debug("clockdomain: %s: automatic idle transitions cannot be disabled\n", |
865 | "disabled on %s\n", clkdm->name); | 859 | clkdm->name); |
866 | return; | 860 | return; |
867 | } | 861 | } |
868 | 862 | ||
@@ -927,7 +921,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) | |||
927 | pwrdm_state_switch(clkdm->pwrdm.ptr); | 921 | pwrdm_state_switch(clkdm->pwrdm.ptr); |
928 | spin_unlock_irqrestore(&clkdm->lock, flags); | 922 | spin_unlock_irqrestore(&clkdm->lock, flags); |
929 | 923 | ||
930 | pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); | 924 | pr_debug("clockdomain: %s: enabled\n", clkdm->name); |
931 | 925 | ||
932 | return 0; | 926 | return 0; |
933 | } | 927 | } |
@@ -952,7 +946,7 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) | |||
952 | pwrdm_state_switch(clkdm->pwrdm.ptr); | 946 | pwrdm_state_switch(clkdm->pwrdm.ptr); |
953 | spin_unlock_irqrestore(&clkdm->lock, flags); | 947 | spin_unlock_irqrestore(&clkdm->lock, flags); |
954 | 948 | ||
955 | pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); | 949 | pr_debug("clockdomain: %s: disabled\n", clkdm->name); |
956 | 950 | ||
957 | return 0; | 951 | return 0; |
958 | } | 952 | } |
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c index 013fedc9e131..f81dd0a18aaf 100644 --- a/arch/arm/mach-omap2/common-board-devices.c +++ b/arch/arm/mach-omap2/common-board-devices.c | |||
@@ -120,8 +120,7 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts, | |||
120 | } | 120 | } |
121 | 121 | ||
122 | if (nandcs > GPMC_CS_NUM) { | 122 | if (nandcs > GPMC_CS_NUM) { |
123 | printk(KERN_INFO "NAND: Unable to find configuration " | 123 | pr_info("NAND: Unable to find configuration in GPMC\n"); |
124 | "in GPMC\n "); | ||
125 | return; | 124 | return; |
126 | } | 125 | } |
127 | 126 | ||
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index d8318dc5ee91..ef666455c13a 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c | |||
@@ -623,8 +623,11 @@ unsigned long omap3_clkoutx2_recalc(struct clk *clk) | |||
623 | while (pclk && !pclk->dpll_data) | 623 | while (pclk && !pclk->dpll_data) |
624 | pclk = pclk->parent; | 624 | pclk = pclk->parent; |
625 | 625 | ||
626 | /* clk does not have a DPLL as a parent? */ | 626 | /* clk does not have a DPLL as a parent? error in the clock data */ |
627 | WARN_ON(!pclk); | 627 | if (!pclk) { |
628 | WARN_ON(1); | ||
629 | return 0; | ||
630 | } | ||
628 | 631 | ||
629 | dd = pclk->dpll_data; | 632 | dd = pclk->dpll_data; |
630 | 633 | ||
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 7b52bdfc59c9..e7b246da02d0 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c | |||
@@ -61,6 +61,7 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
61 | pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL); | 61 | pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL); |
62 | if (!pdata->regs) { | 62 | if (!pdata->regs) { |
63 | pr_err("gpio%d: Memory allocation failed\n", id); | 63 | pr_err("gpio%d: Memory allocation failed\n", id); |
64 | kfree(pdata); | ||
64 | return -ENOMEM; | 65 | return -ENOMEM; |
65 | } | 66 | } |
66 | 67 | ||
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 055ae8bd943f..72428bd45efc 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -297,7 +297,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) | |||
297 | 297 | ||
298 | div = gpmc_cs_calc_divider(cs, t->sync_clk); | 298 | div = gpmc_cs_calc_divider(cs, t->sync_clk); |
299 | if (div < 0) | 299 | if (div < 0) |
300 | return -1; | 300 | return div; |
301 | 301 | ||
302 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on); | 302 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on); |
303 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off); | 303 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off); |
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 7219df0e831a..6b98a178fbe0 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -161,9 +161,8 @@ void __init omap2xxx_check_revision(void) | |||
161 | } | 161 | } |
162 | 162 | ||
163 | if (j == ARRAY_SIZE(omap_ids)) { | 163 | if (j == ARRAY_SIZE(omap_ids)) { |
164 | printk(KERN_ERR "Unknown OMAP device type. " | 164 | pr_err("Unknown OMAP device type. Handling it as OMAP%04x\n", |
165 | "Handling it as OMAP%04x\n", | 165 | omap_ids[i].type >> 16); |
166 | omap_ids[i].type >> 16); | ||
167 | j = i; | 166 | j = i; |
168 | } | 167 | } |
169 | 168 | ||
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index efed4f540adb..3926f370448f 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -108,9 +108,8 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) | |||
108 | unsigned long tmp; | 108 | unsigned long tmp; |
109 | 109 | ||
110 | tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff; | 110 | tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff; |
111 | printk(KERN_INFO "IRQ: Found an INTC at 0x%p " | 111 | pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n", |
112 | "(revision %ld.%ld) with %d interrupts\n", | 112 | bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); |
113 | bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); | ||
114 | 113 | ||
115 | tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG); | 114 | tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG); |
116 | tmp |= 1 << 1; /* soft reset */ | 115 | tmp |= 1 << 1; /* soft reset */ |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 9db1684df697..80b7359500f1 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -1438,8 +1438,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) | |||
1438 | * Return the bit position of the reset line that match the | 1438 | * Return the bit position of the reset line that match the |
1439 | * input name. Return -ENOENT if not found. | 1439 | * input name. Return -ENOENT if not found. |
1440 | */ | 1440 | */ |
1441 | static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name, | 1441 | static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, |
1442 | struct omap_hwmod_rst_info *ohri) | 1442 | struct omap_hwmod_rst_info *ohri) |
1443 | { | 1443 | { |
1444 | int i; | 1444 | int i; |
1445 | 1445 | ||
@@ -1475,7 +1475,7 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name, | |||
1475 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) | 1475 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) |
1476 | { | 1476 | { |
1477 | struct omap_hwmod_rst_info ohri; | 1477 | struct omap_hwmod_rst_info ohri; |
1478 | u8 ret = -EINVAL; | 1478 | int ret = -EINVAL; |
1479 | 1479 | ||
1480 | if (!oh) | 1480 | if (!oh) |
1481 | return -EINVAL; | 1481 | return -EINVAL; |
@@ -1484,7 +1484,7 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) | |||
1484 | return -ENOSYS; | 1484 | return -ENOSYS; |
1485 | 1485 | ||
1486 | ret = _lookup_hardreset(oh, name, &ohri); | 1486 | ret = _lookup_hardreset(oh, name, &ohri); |
1487 | if (IS_ERR_VALUE(ret)) | 1487 | if (ret < 0) |
1488 | return ret; | 1488 | return ret; |
1489 | 1489 | ||
1490 | ret = soc_ops.assert_hardreset(oh, &ohri); | 1490 | ret = soc_ops.assert_hardreset(oh, &ohri); |
@@ -1542,7 +1542,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) | |||
1542 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) | 1542 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) |
1543 | { | 1543 | { |
1544 | struct omap_hwmod_rst_info ohri; | 1544 | struct omap_hwmod_rst_info ohri; |
1545 | u8 ret = -EINVAL; | 1545 | int ret = -EINVAL; |
1546 | 1546 | ||
1547 | if (!oh) | 1547 | if (!oh) |
1548 | return -EINVAL; | 1548 | return -EINVAL; |
@@ -1551,7 +1551,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name) | |||
1551 | return -ENOSYS; | 1551 | return -ENOSYS; |
1552 | 1552 | ||
1553 | ret = _lookup_hardreset(oh, name, &ohri); | 1553 | ret = _lookup_hardreset(oh, name, &ohri); |
1554 | if (IS_ERR_VALUE(ret)) | 1554 | if (ret < 0) |
1555 | return ret; | 1555 | return ret; |
1556 | 1556 | ||
1557 | return soc_ops.is_hardreset_asserted(oh, &ohri); | 1557 | return soc_ops.is_hardreset_asserted(oh, &ohri); |
@@ -1641,8 +1641,8 @@ static int _ocp_softreset(struct omap_hwmod *oh) | |||
1641 | 1641 | ||
1642 | /* clocks must be on for this operation */ | 1642 | /* clocks must be on for this operation */ |
1643 | if (oh->_state != _HWMOD_STATE_ENABLED) { | 1643 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
1644 | pr_warning("omap_hwmod: %s: reset can only be entered from " | 1644 | pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n", |
1645 | "enabled state\n", oh->name); | 1645 | oh->name); |
1646 | return -EINVAL; | 1646 | return -EINVAL; |
1647 | } | 1647 | } |
1648 | 1648 | ||
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c index d8f6dbf45d16..45ad7f74f356 100644 --- a/arch/arm/mach-omap2/opp.c +++ b/arch/arm/mach-omap2/opp.c | |||
@@ -64,25 +64,22 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, | |||
64 | } | 64 | } |
65 | oh = omap_hwmod_lookup(opp_def->hwmod_name); | 65 | oh = omap_hwmod_lookup(opp_def->hwmod_name); |
66 | if (!oh || !oh->od) { | 66 | if (!oh || !oh->od) { |
67 | pr_debug("%s: no hwmod or odev for %s, [%d] " | 67 | pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n", |
68 | "cannot add OPPs.\n", __func__, | 68 | __func__, opp_def->hwmod_name, i); |
69 | opp_def->hwmod_name, i); | ||
70 | continue; | 69 | continue; |
71 | } | 70 | } |
72 | dev = &oh->od->pdev->dev; | 71 | dev = &oh->od->pdev->dev; |
73 | 72 | ||
74 | r = opp_add(dev, opp_def->freq, opp_def->u_volt); | 73 | r = opp_add(dev, opp_def->freq, opp_def->u_volt); |
75 | if (r) { | 74 | if (r) { |
76 | dev_err(dev, "%s: add OPP %ld failed for %s [%d] " | 75 | dev_err(dev, "%s: add OPP %ld failed for %s [%d] result=%d\n", |
77 | "result=%d\n", | 76 | __func__, opp_def->freq, |
78 | __func__, opp_def->freq, | 77 | opp_def->hwmod_name, i, r); |
79 | opp_def->hwmod_name, i, r); | ||
80 | } else { | 78 | } else { |
81 | if (!opp_def->default_available) | 79 | if (!opp_def->default_available) |
82 | r = opp_disable(dev, opp_def->freq); | 80 | r = opp_disable(dev, opp_def->freq); |
83 | if (r) | 81 | if (r) |
84 | dev_err(dev, "%s: disable %ld failed for %s " | 82 | dev_err(dev, "%s: disable %ld failed for %s [%d] result=%d\n", |
85 | "[%d] result=%d\n", | ||
86 | __func__, opp_def->freq, | 83 | __func__, opp_def->freq, |
87 | opp_def->hwmod_name, i, r); | 84 | opp_def->hwmod_name, i, r); |
88 | } | 85 | } |
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 9cb5cede0f50..939bd6f70b51 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c | |||
@@ -203,8 +203,8 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, | |||
203 | bootup_volt = opp_get_voltage(opp); | 203 | bootup_volt = opp_get_voltage(opp); |
204 | rcu_read_unlock(); | 204 | rcu_read_unlock(); |
205 | if (!bootup_volt) { | 205 | if (!bootup_volt) { |
206 | pr_err("%s: unable to find voltage corresponding " | 206 | pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n", |
207 | "to the bootup OPP for vdd_%s\n", __func__, vdd_name); | 207 | __func__, vdd_name); |
208 | goto exit; | 208 | goto exit; |
209 | } | 209 | } |
210 | 210 | ||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 90480f759974..ba670db1fd37 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -391,9 +391,8 @@ restore: | |||
391 | list_for_each_entry(pwrst, &pwrst_list, node) { | 391 | list_for_each_entry(pwrst, &pwrst_list, node) { |
392 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); | 392 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); |
393 | if (state > pwrst->next_state) { | 393 | if (state > pwrst->next_state) { |
394 | pr_info("Powerdomain (%s) didn't enter " | 394 | pr_info("Powerdomain (%s) didn't enter target state %d\n", |
395 | "target state %d\n", | 395 | pwrst->pwrdm->name, pwrst->next_state); |
396 | pwrst->pwrdm->name, pwrst->next_state); | ||
397 | ret = -1; | 396 | ret = -1; |
398 | } | 397 | } |
399 | omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); | 398 | omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); |
@@ -733,8 +732,7 @@ int __init omap3_pm_init(void) | |||
733 | omap3_secure_ram_storage = | 732 | omap3_secure_ram_storage = |
734 | kmalloc(0x803F, GFP_KERNEL); | 733 | kmalloc(0x803F, GFP_KERNEL); |
735 | if (!omap3_secure_ram_storage) | 734 | if (!omap3_secure_ram_storage) |
736 | pr_err("Memory allocation failed when " | 735 | pr_err("Memory allocation failed when allocating for secure sram context\n"); |
737 | "allocating for secure sram context\n"); | ||
738 | 736 | ||
739 | local_irq_disable(); | 737 | local_irq_disable(); |
740 | local_fiq_disable(); | 738 | local_fiq_disable(); |
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index ea24174f5707..04922d149068 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c | |||
@@ -69,9 +69,8 @@ static int omap4_pm_suspend(void) | |||
69 | list_for_each_entry(pwrst, &pwrst_list, node) { | 69 | list_for_each_entry(pwrst, &pwrst_list, node) { |
70 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); | 70 | state = pwrdm_read_prev_pwrst(pwrst->pwrdm); |
71 | if (state > pwrst->next_state) { | 71 | if (state > pwrst->next_state) { |
72 | pr_info("Powerdomain (%s) didn't enter " | 72 | pr_info("Powerdomain (%s) didn't enter target state %d\n", |
73 | "target state %d\n", | 73 | pwrst->pwrdm->name, pwrst->next_state); |
74 | pwrst->pwrdm->name, pwrst->next_state); | ||
75 | ret = -1; | 74 | ret = -1; |
76 | } | 75 | } |
77 | omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); | 76 | omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); |
@@ -189,8 +188,7 @@ int __init omap4_pm_init(void) | |||
189 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); | 188 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm); |
190 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); | 189 | ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm); |
191 | if (ret) { | 190 | if (ret) { |
192 | pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 " | 191 | pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 wakeup dependency\n"); |
193 | "wakeup dependency\n"); | ||
194 | goto err2; | 192 | goto err2; |
195 | } | 193 | } |
196 | 194 | ||
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index ca5be83d5019..1678a3284233 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -341,8 +341,8 @@ int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) | |||
341 | if (!pwrdm || !clkdm) | 341 | if (!pwrdm || !clkdm) |
342 | return -EINVAL; | 342 | return -EINVAL; |
343 | 343 | ||
344 | pr_debug("powerdomain: associating clockdomain %s with powerdomain " | 344 | pr_debug("powerdomain: %s: associating clockdomain %s\n", |
345 | "%s\n", clkdm->name, pwrdm->name); | 345 | pwrdm->name, clkdm->name); |
346 | 346 | ||
347 | for (i = 0; i < PWRDM_MAX_CLKDMS; i++) { | 347 | for (i = 0; i < PWRDM_MAX_CLKDMS; i++) { |
348 | if (!pwrdm->pwrdm_clkdms[i]) | 348 | if (!pwrdm->pwrdm_clkdms[i]) |
@@ -356,8 +356,8 @@ int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) | |||
356 | } | 356 | } |
357 | 357 | ||
358 | if (i == PWRDM_MAX_CLKDMS) { | 358 | if (i == PWRDM_MAX_CLKDMS) { |
359 | pr_debug("powerdomain: increase PWRDM_MAX_CLKDMS for " | 359 | pr_debug("powerdomain: %s: increase PWRDM_MAX_CLKDMS for clkdm %s\n", |
360 | "pwrdm %s clkdm %s\n", pwrdm->name, clkdm->name); | 360 | pwrdm->name, clkdm->name); |
361 | WARN_ON(1); | 361 | WARN_ON(1); |
362 | ret = -ENOMEM; | 362 | ret = -ENOMEM; |
363 | goto pac_exit; | 363 | goto pac_exit; |
@@ -389,16 +389,16 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) | |||
389 | if (!pwrdm || !clkdm) | 389 | if (!pwrdm || !clkdm) |
390 | return -EINVAL; | 390 | return -EINVAL; |
391 | 391 | ||
392 | pr_debug("powerdomain: dissociating clockdomain %s from powerdomain " | 392 | pr_debug("powerdomain: %s: dissociating clockdomain %s\n", |
393 | "%s\n", clkdm->name, pwrdm->name); | 393 | pwrdm->name, clkdm->name); |
394 | 394 | ||
395 | for (i = 0; i < PWRDM_MAX_CLKDMS; i++) | 395 | for (i = 0; i < PWRDM_MAX_CLKDMS; i++) |
396 | if (pwrdm->pwrdm_clkdms[i] == clkdm) | 396 | if (pwrdm->pwrdm_clkdms[i] == clkdm) |
397 | break; | 397 | break; |
398 | 398 | ||
399 | if (i == PWRDM_MAX_CLKDMS) { | 399 | if (i == PWRDM_MAX_CLKDMS) { |
400 | pr_debug("powerdomain: clkdm %s not associated with pwrdm " | 400 | pr_debug("powerdomain: %s: clkdm %s not associated?!\n", |
401 | "%s ?!\n", clkdm->name, pwrdm->name); | 401 | pwrdm->name, clkdm->name); |
402 | ret = -ENOENT; | 402 | ret = -ENOENT; |
403 | goto pdc_exit; | 403 | goto pdc_exit; |
404 | } | 404 | } |
@@ -487,7 +487,7 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) | |||
487 | if (!(pwrdm->pwrsts & (1 << pwrst))) | 487 | if (!(pwrdm->pwrsts & (1 << pwrst))) |
488 | return -EINVAL; | 488 | return -EINVAL; |
489 | 489 | ||
490 | pr_debug("powerdomain: setting next powerstate for %s to %0x\n", | 490 | pr_debug("powerdomain: %s: setting next powerstate to %0x\n", |
491 | pwrdm->name, pwrst); | 491 | pwrdm->name, pwrst); |
492 | 492 | ||
493 | if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) { | 493 | if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) { |
@@ -589,7 +589,7 @@ int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) | |||
589 | if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst))) | 589 | if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst))) |
590 | return -EINVAL; | 590 | return -EINVAL; |
591 | 591 | ||
592 | pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n", | 592 | pr_debug("powerdomain: %s: setting next logic powerstate to %0x\n", |
593 | pwrdm->name, pwrst); | 593 | pwrdm->name, pwrst); |
594 | 594 | ||
595 | if (arch_pwrdm && arch_pwrdm->pwrdm_set_logic_retst) | 595 | if (arch_pwrdm && arch_pwrdm->pwrdm_set_logic_retst) |
@@ -626,8 +626,8 @@ int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) | |||
626 | if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst))) | 626 | if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst))) |
627 | return -EINVAL; | 627 | return -EINVAL; |
628 | 628 | ||
629 | pr_debug("powerdomain: setting next memory powerstate for domain %s " | 629 | pr_debug("powerdomain: %s: setting next memory powerstate for bank %0x while pwrdm-ON to %0x\n", |
630 | "bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst); | 630 | pwrdm->name, bank, pwrst); |
631 | 631 | ||
632 | if (arch_pwrdm && arch_pwrdm->pwrdm_set_mem_onst) | 632 | if (arch_pwrdm && arch_pwrdm->pwrdm_set_mem_onst) |
633 | ret = arch_pwrdm->pwrdm_set_mem_onst(pwrdm, bank, pwrst); | 633 | ret = arch_pwrdm->pwrdm_set_mem_onst(pwrdm, bank, pwrst); |
@@ -664,8 +664,8 @@ int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) | |||
664 | if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst))) | 664 | if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst))) |
665 | return -EINVAL; | 665 | return -EINVAL; |
666 | 666 | ||
667 | pr_debug("powerdomain: setting next memory powerstate for domain %s " | 667 | pr_debug("powerdomain: %s: setting next memory powerstate for bank %0x while pwrdm-RET to %0x\n", |
668 | "bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst); | 668 | pwrdm->name, bank, pwrst); |
669 | 669 | ||
670 | if (arch_pwrdm && arch_pwrdm->pwrdm_set_mem_retst) | 670 | if (arch_pwrdm && arch_pwrdm->pwrdm_set_mem_retst) |
671 | ret = arch_pwrdm->pwrdm_set_mem_retst(pwrdm, bank, pwrst); | 671 | ret = arch_pwrdm->pwrdm_set_mem_retst(pwrdm, bank, pwrst); |
@@ -843,7 +843,7 @@ int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) | |||
843 | * warn & fail if it is not ON. | 843 | * warn & fail if it is not ON. |
844 | */ | 844 | */ |
845 | 845 | ||
846 | pr_debug("powerdomain: clearing previous power state reg for %s\n", | 846 | pr_debug("powerdomain: %s: clearing previous power state reg\n", |
847 | pwrdm->name); | 847 | pwrdm->name); |
848 | 848 | ||
849 | if (arch_pwrdm && arch_pwrdm->pwrdm_clear_all_prev_pwrst) | 849 | if (arch_pwrdm && arch_pwrdm->pwrdm_clear_all_prev_pwrst) |
@@ -873,8 +873,7 @@ int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) | |||
873 | if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) | 873 | if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) |
874 | return ret; | 874 | return ret; |
875 | 875 | ||
876 | pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n", | 876 | pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n", pwrdm->name); |
877 | pwrdm->name); | ||
878 | 877 | ||
879 | if (arch_pwrdm && arch_pwrdm->pwrdm_enable_hdwr_sar) | 878 | if (arch_pwrdm && arch_pwrdm->pwrdm_enable_hdwr_sar) |
880 | ret = arch_pwrdm->pwrdm_enable_hdwr_sar(pwrdm); | 879 | ret = arch_pwrdm->pwrdm_enable_hdwr_sar(pwrdm); |
@@ -903,8 +902,7 @@ int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) | |||
903 | if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) | 902 | if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) |
904 | return ret; | 903 | return ret; |
905 | 904 | ||
906 | pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n", | 905 | pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n", pwrdm->name); |
907 | pwrdm->name); | ||
908 | 906 | ||
909 | if (arch_pwrdm && arch_pwrdm->pwrdm_disable_hdwr_sar) | 907 | if (arch_pwrdm && arch_pwrdm->pwrdm_disable_hdwr_sar) |
910 | ret = arch_pwrdm->pwrdm_disable_hdwr_sar(pwrdm); | 908 | ret = arch_pwrdm->pwrdm_disable_hdwr_sar(pwrdm); |
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c index 0f0a9f1592fe..3950ccfe5f4a 100644 --- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c +++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c | |||
@@ -122,8 +122,8 @@ static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) | |||
122 | udelay(1); | 122 | udelay(1); |
123 | 123 | ||
124 | if (c > PWRDM_TRANSITION_BAILOUT) { | 124 | if (c > PWRDM_TRANSITION_BAILOUT) { |
125 | printk(KERN_ERR "powerdomain: waited too long for " | 125 | pr_err("powerdomain: %s: waited too long to complete transition\n", |
126 | "powerdomain %s to complete transition\n", pwrdm->name); | 126 | pwrdm->name); |
127 | return -EAGAIN; | 127 | return -EAGAIN; |
128 | } | 128 | } |
129 | 129 | ||
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c index 601325b852a4..aeac6f35ca10 100644 --- a/arch/arm/mach-omap2/powerdomain44xx.c +++ b/arch/arm/mach-omap2/powerdomain44xx.c | |||
@@ -198,8 +198,8 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) | |||
198 | udelay(1); | 198 | udelay(1); |
199 | 199 | ||
200 | if (c > PWRDM_TRANSITION_BAILOUT) { | 200 | if (c > PWRDM_TRANSITION_BAILOUT) { |
201 | printk(KERN_ERR "powerdomain: waited too long for " | 201 | pr_err("powerdomain: %s: waited too long to complete transition\n", |
202 | "powerdomain %s to complete transition\n", pwrdm->name); | 202 | pwrdm->name); |
203 | return -EAGAIN; | 203 | return -EAGAIN; |
204 | } | 204 | } |
205 | 205 | ||
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 9c9d23c10205..0f51e034e0aa 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -139,11 +139,11 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, | |||
139 | MAX_MODULE_ENABLE_WAIT, i); | 139 | MAX_MODULE_ENABLE_WAIT, i); |
140 | 140 | ||
141 | if (i < MAX_MODULE_ENABLE_WAIT) | 141 | if (i < MAX_MODULE_ENABLE_WAIT) |
142 | pr_debug("cm: Module associated with clock %s ready after %d " | 142 | pr_debug("cm: Module associated with clock %s ready after %d loops\n", |
143 | "loops\n", name, i); | 143 | name, i); |
144 | else | 144 | else |
145 | pr_err("cm: Module associated with clock %s didn't enable in " | 145 | pr_err("cm: Module associated with clock %s didn't enable in %d tries\n", |
146 | "%d tries\n", name, MAX_MODULE_ENABLE_WAIT); | 146 | name, MAX_MODULE_ENABLE_WAIT); |
147 | 147 | ||
148 | return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; | 148 | return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; |
149 | }; | 149 | }; |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 7ca266e987f6..0405c8190803 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -232,9 +232,8 @@ static int __init omap_serial_early_init(void) | |||
232 | 232 | ||
233 | if (console_loglevel >= 10) { | 233 | if (console_loglevel >= 10) { |
234 | uart_debug = true; | 234 | uart_debug = true; |
235 | pr_info("%s used as console in debug mode" | 235 | pr_info("%s used as console in debug mode: uart%d clocks will not be gated", |
236 | " uart%d clocks will not be" | 236 | uart_name, uart->num); |
237 | " gated", uart_name, uart->num); | ||
238 | } | 237 | } |
239 | 238 | ||
240 | if (cmdline_find_option("no_console_suspend")) | 239 | if (cmdline_find_option("no_console_suspend")) |
@@ -319,8 +318,11 @@ void __init omap_serial_init_port(struct omap_board_data *bdata, | |||
319 | 318 | ||
320 | pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size, | 319 | pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size, |
321 | NULL, 0, false); | 320 | NULL, 0, false); |
322 | WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", | 321 | if (IS_ERR(pdev)) { |
323 | name, oh->name); | 322 | WARN(1, "Could not build omap_device for %s: %s.\n", name, |
323 | oh->name); | ||
324 | return; | ||
325 | } | ||
324 | 326 | ||
325 | if ((console_uart_id == bdata->id) && no_console_suspend) | 327 | if ((console_uart_id == bdata->id) && no_console_suspend) |
326 | omap_device_disable_idle_on_suspend(pdev); | 328 | omap_device_disable_idle_on_suspend(pdev); |
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index d033a65f4e4e..cbeae56b56a9 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c | |||
@@ -104,16 +104,15 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) | |||
104 | 104 | ||
105 | sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL); | 105 | sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL); |
106 | if (!sr_data) { | 106 | if (!sr_data) { |
107 | pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n", | 107 | pr_err("%s: Unable to allocate memory for %s sr_data\n", |
108 | __func__, oh->name); | 108 | __func__, oh->name); |
109 | return -ENOMEM; | 109 | return -ENOMEM; |
110 | } | 110 | } |
111 | 111 | ||
112 | sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr; | 112 | sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr; |
113 | if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) { | 113 | if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) { |
114 | pr_err("%s: No voltage domain specified for %s." | 114 | pr_err("%s: No voltage domain specified for %s. Cannot initialize\n", |
115 | "Cannot initialize\n", __func__, | 115 | __func__, oh->name); |
116 | oh->name); | ||
117 | goto exit; | 116 | goto exit; |
118 | } | 117 | } |
119 | 118 | ||
@@ -131,8 +130,8 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) | |||
131 | 130 | ||
132 | omap_voltage_get_volttable(sr_data->voltdm, &volt_data); | 131 | omap_voltage_get_volttable(sr_data->voltdm, &volt_data); |
133 | if (!volt_data) { | 132 | if (!volt_data) { |
134 | pr_warning("%s: No Voltage table registered fo VDD%d." | 133 | pr_err("%s: No Voltage table registered for VDD%d\n", |
135 | "Something really wrong\n\n", __func__, i + 1); | 134 | __func__, i + 1); |
136 | goto exit; | 135 | goto exit; |
137 | } | 136 | } |
138 | 137 | ||
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 25cbe73b0cd7..e17cf974d16c 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -213,7 +213,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, | |||
213 | res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); | 213 | res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); |
214 | BUG_ON(res); | 214 | BUG_ON(res); |
215 | 215 | ||
216 | omap2_gp_timer_irq.dev_id = (void *)&clkev; | 216 | omap2_gp_timer_irq.dev_id = &clkev; |
217 | setup_irq(clkev.irq, &omap2_gp_timer_irq); | 217 | setup_irq(clkev.irq, &omap2_gp_timer_irq); |
218 | 218 | ||
219 | __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); | 219 | __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); |
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index b451f3c13292..880249b17012 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c | |||
@@ -115,9 +115,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | |||
115 | } | 115 | } |
116 | 116 | ||
117 | if (!voltdm->pmic->uv_to_vsel) { | 117 | if (!voltdm->pmic->uv_to_vsel) { |
118 | pr_err("%s: PMIC function to convert voltage in uV to" | 118 | pr_err("%s: PMIC function to convert voltage in uV to vsel not registered. Hence unable to scale voltage for vdd_%s\n", |
119 | "vsel not registered. Hence unable to scale voltage" | 119 | __func__, voltdm->name); |
120 | "for vdd_%s\n", __func__, voltdm->name); | ||
121 | return -ENODATA; | 120 | return -ENODATA; |
122 | } | 121 | } |
123 | 122 | ||
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 4dc60e83e00d..3ac8fe1d8213 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c | |||
@@ -195,8 +195,8 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | |||
195 | return &voltdm->volt_data[i]; | 195 | return &voltdm->volt_data[i]; |
196 | } | 196 | } |
197 | 197 | ||
198 | pr_notice("%s: Unable to match the current voltage with the voltage" | 198 | pr_notice("%s: Unable to match the current voltage with the voltage table for vdd_%s\n", |
199 | "table for vdd_%s\n", __func__, voltdm->name); | 199 | __func__, voltdm->name); |
200 | 200 | ||
201 | return ERR_PTR(-ENODATA); | 201 | return ERR_PTR(-ENODATA); |
202 | } | 202 | } |
@@ -249,8 +249,8 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, | |||
249 | voltdm->scale = omap_vc_bypass_scale; | 249 | voltdm->scale = omap_vc_bypass_scale; |
250 | return; | 250 | return; |
251 | default: | 251 | default: |
252 | pr_warning("%s: Trying to change the method of voltage scaling" | 252 | pr_warn("%s: Trying to change the method of voltage scaling to an unsupported one!\n", |
253 | "to an unsupported one!\n", __func__); | 253 | __func__); |
254 | } | 254 | } |
255 | } | 255 | } |
256 | 256 | ||
@@ -331,8 +331,8 @@ int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm) | |||
331 | if (!voltdm || !pwrdm) | 331 | if (!voltdm || !pwrdm) |
332 | return -EINVAL; | 332 | return -EINVAL; |
333 | 333 | ||
334 | pr_debug("voltagedomain: associating powerdomain %s with voltagedomain " | 334 | pr_debug("voltagedomain: %s: associating powerdomain %s\n", |
335 | "%s\n", pwrdm->name, voltdm->name); | 335 | voltdm->name, pwrdm->name); |
336 | 336 | ||
337 | list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list); | 337 | list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list); |
338 | 338 | ||
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index f95c1bad9dc6..85241b828c02 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c | |||
@@ -138,8 +138,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | |||
138 | udelay(1); | 138 | udelay(1); |
139 | } | 139 | } |
140 | if (timeout >= VP_TRANXDONE_TIMEOUT) { | 140 | if (timeout >= VP_TRANXDONE_TIMEOUT) { |
141 | pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." | 141 | pr_warn("%s: vdd_%s TRANXDONE timeout exceeded. Voltage change aborted", |
142 | "Voltage change aborted", __func__, voltdm->name); | 142 | __func__, voltdm->name); |
143 | return -ETIMEDOUT; | 143 | return -ETIMEDOUT; |
144 | } | 144 | } |
145 | 145 | ||
@@ -157,9 +157,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | |||
157 | omap_test_timeout(vp->common->ops->check_txdone(vp->id), | 157 | omap_test_timeout(vp->common->ops->check_txdone(vp->id), |
158 | VP_TRANXDONE_TIMEOUT, timeout); | 158 | VP_TRANXDONE_TIMEOUT, timeout); |
159 | if (timeout >= VP_TRANXDONE_TIMEOUT) | 159 | if (timeout >= VP_TRANXDONE_TIMEOUT) |
160 | pr_err("%s: vdd_%s TRANXDONE timeout exceeded." | 160 | pr_err("%s: vdd_%s TRANXDONE timeout exceeded. TRANXDONE never got set after the voltage update\n", |
161 | "TRANXDONE never got set after the voltage update\n", | 161 | __func__, voltdm->name); |
162 | __func__, voltdm->name); | ||
163 | 162 | ||
164 | omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); | 163 | omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); |
165 | 164 | ||
@@ -176,8 +175,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | |||
176 | } | 175 | } |
177 | 176 | ||
178 | if (timeout >= VP_TRANXDONE_TIMEOUT) | 177 | if (timeout >= VP_TRANXDONE_TIMEOUT) |
179 | pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" | 178 | pr_warn("%s: vdd_%s TRANXDONE timeout exceeded while trying to clear the TRANXDONE status\n", |
180 | "to clear the TRANXDONE status\n", | ||
181 | __func__, voltdm->name); | 179 | __func__, voltdm->name); |
182 | 180 | ||
183 | /* Clear force bit */ | 181 | /* Clear force bit */ |
@@ -257,8 +255,8 @@ void omap_vp_disable(struct voltagedomain *voltdm) | |||
257 | 255 | ||
258 | /* If VP is already disabled, do nothing. Return */ | 256 | /* If VP is already disabled, do nothing. Return */ |
259 | if (!vp->enabled) { | 257 | if (!vp->enabled) { |
260 | pr_warning("%s: Trying to disable VP for vdd_%s when" | 258 | pr_warn("%s: Trying to disable VP for vdd_%s when it is already disabled\n", |
261 | "it is already disabled\n", __func__, voltdm->name); | 259 | __func__, voltdm->name); |
262 | return; | 260 | return; |
263 | } | 261 | } |
264 | 262 | ||