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authorGovindraj.R <govindraj.raja@ti.com>2011-09-13 04:31:01 -0400
committerKevin Hilman <khilman@ti.com>2011-12-14 18:49:02 -0500
commit273558b3a0399e368d99da5b3daf1c0e11b93e06 (patch)
tree449dfc24f02cae12bff15011bb9a41ae9b47a1c4 /arch/arm/mach-omap2
parent8a60585159067f110075ef8ffda13abd94826daf (diff)
ARM: OMAP2+: UART: Cleanup part of clock gating mechanism for uart
Currently we use a shared irq handler to identify uart activity and then trigger a timer. By default the timeout value is zero and can be set or modified from sysfs. If there was no uart activity for the period set through sysfs, the timer will expire and call timer handler this will set a flag can_sleep using which decision to gate uart clocks can be taken. Since the clock gating mechanism is outside the uart driver, we currently use this mechanism. In preparation to runtime implementation for omap-serial driver we can cleanup this mechanism and use runtime API's to gate uart clocks. Removes the following: * timer related info from local uart_state struct * the code used to set timeout value from sysfs. * irqflags used to set shared irq handler. * un-used function omap_uart_check_wakeup. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> (for drivers/tty changes) Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/serial.c118
1 files changed, 2 insertions, 116 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index e027bc99251c..5bdbc42e42a6 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -58,8 +58,6 @@
58struct omap_uart_state { 58struct omap_uart_state {
59 int num; 59 int num;
60 int can_sleep; 60 int can_sleep;
61 struct timer_list timer;
62 u32 timeout;
63 61
64 void __iomem *wk_st; 62 void __iomem *wk_st;
65 void __iomem *wk_en; 63 void __iomem *wk_en;
@@ -67,13 +65,9 @@ struct omap_uart_state {
67 u32 padconf; 65 u32 padconf;
68 u32 dma_enabled; 66 u32 dma_enabled;
69 67
70 struct clk *ick;
71 struct clk *fck;
72 int clocked; 68 int clocked;
73 69
74 int irq;
75 int regshift; 70 int regshift;
76 int irqflags;
77 void __iomem *membase; 71 void __iomem *membase;
78 resource_size_t mapbase; 72 resource_size_t mapbase;
79 73
@@ -331,32 +325,6 @@ static void omap_uart_block_sleep(struct omap_uart_state *uart)
331 325
332 omap_uart_smart_idle_enable(uart, 0); 326 omap_uart_smart_idle_enable(uart, 0);
333 uart->can_sleep = 0; 327 uart->can_sleep = 0;
334 if (uart->timeout)
335 mod_timer(&uart->timer, jiffies + uart->timeout);
336 else
337 del_timer(&uart->timer);
338}
339
340static void omap_uart_allow_sleep(struct omap_uart_state *uart)
341{
342 if (device_may_wakeup(&uart->pdev->dev))
343 omap_uart_enable_wakeup(uart);
344 else
345 omap_uart_disable_wakeup(uart);
346
347 if (!uart->clocked)
348 return;
349
350 omap_uart_smart_idle_enable(uart, 1);
351 uart->can_sleep = 1;
352 del_timer(&uart->timer);
353}
354
355static void omap_uart_idle_timer(unsigned long data)
356{
357 struct omap_uart_state *uart = (struct omap_uart_state *)data;
358
359 omap_uart_allow_sleep(uart);
360} 328}
361 329
362int omap_uart_can_sleep(void) 330int omap_uart_can_sleep(void)
@@ -380,35 +348,11 @@ int omap_uart_can_sleep(void)
380 return can_sleep; 348 return can_sleep;
381} 349}
382 350
383/**
384 * omap_uart_interrupt()
385 *
386 * This handler is used only to detect that *any* UART interrupt has
387 * occurred. It does _nothing_ to handle the interrupt. Rather,
388 * any UART interrupt will trigger the inactivity timer so the
389 * UART will not idle or sleep for its timeout period.
390 *
391 **/
392/* static int first_interrupt; */
393static irqreturn_t omap_uart_interrupt(int irq, void *dev_id)
394{
395 struct omap_uart_state *uart = dev_id;
396
397 omap_uart_block_sleep(uart);
398
399 return IRQ_NONE;
400}
401
402static void omap_uart_idle_init(struct omap_uart_state *uart) 351static void omap_uart_idle_init(struct omap_uart_state *uart)
403{ 352{
404 int ret; 353 int ret;
405 354
406 uart->can_sleep = 0; 355 uart->can_sleep = 0;
407 uart->timeout = DEFAULT_TIMEOUT;
408 setup_timer(&uart->timer, omap_uart_idle_timer,
409 (unsigned long) uart);
410 if (uart->timeout)
411 mod_timer(&uart->timer, jiffies + uart->timeout);
412 omap_uart_smart_idle_enable(uart, 0); 356 omap_uart_smart_idle_enable(uart, 0);
413 357
414 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) { 358 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) {
@@ -470,51 +414,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
470 uart->wk_mask = 0; 414 uart->wk_mask = 0;
471 uart->padconf = 0; 415 uart->padconf = 0;
472 } 416 }
473
474 uart->irqflags |= IRQF_SHARED;
475 ret = request_threaded_irq(uart->irq, NULL, omap_uart_interrupt,
476 IRQF_SHARED, "serial idle", (void *)uart);
477 WARN_ON(ret);
478}
479
480static ssize_t sleep_timeout_show(struct device *dev,
481 struct device_attribute *attr,
482 char *buf)
483{
484 struct platform_device *pdev = to_platform_device(dev);
485 struct omap_device *odev = to_omap_device(pdev);
486 struct omap_uart_state *uart = odev->hwmods[0]->dev_attr;
487
488 return sprintf(buf, "%u\n", uart->timeout / HZ);
489} 417}
490 418
491static ssize_t sleep_timeout_store(struct device *dev,
492 struct device_attribute *attr,
493 const char *buf, size_t n)
494{
495 struct platform_device *pdev = to_platform_device(dev);
496 struct omap_device *odev = to_omap_device(pdev);
497 struct omap_uart_state *uart = odev->hwmods[0]->dev_attr;
498 unsigned int value;
499
500 if (sscanf(buf, "%u", &value) != 1) {
501 dev_err(dev, "sleep_timeout_store: Invalid value\n");
502 return -EINVAL;
503 }
504
505 uart->timeout = value * HZ;
506 if (uart->timeout)
507 mod_timer(&uart->timer, jiffies + uart->timeout);
508 else
509 /* A zero value means disable timeout feature */
510 omap_uart_block_sleep(uart);
511
512 return n;
513}
514
515static DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show,
516 sleep_timeout_store);
517#define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr))
518#else 419#else
519static inline void omap_uart_idle_init(struct omap_uart_state *uart) {} 420static inline void omap_uart_idle_init(struct omap_uart_state *uart) {}
520static void omap_uart_block_sleep(struct omap_uart_state *uart) 421static void omap_uart_block_sleep(struct omap_uart_state *uart)
@@ -522,7 +423,6 @@ static void omap_uart_block_sleep(struct omap_uart_state *uart)
522 /* Needed to enable UART clocks when built without CONFIG_PM */ 423 /* Needed to enable UART clocks when built without CONFIG_PM */
523 omap_uart_enable_clocks(uart); 424 omap_uart_enable_clocks(uart);
524} 425}
525#define DEV_CREATE_FILE(dev, attr)
526#endif /* CONFIG_PM */ 426#endif /* CONFIG_PM */
527 427
528static int __init omap_serial_early_init(void) 428static int __init omap_serial_early_init(void)
@@ -606,8 +506,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
606 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; 506 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
607 omap_up.mapbase = oh->slaves[0]->addr->pa_start; 507 omap_up.mapbase = oh->slaves[0]->addr->pa_start;
608 omap_up.membase = omap_hwmod_get_mpu_rt_va(oh); 508 omap_up.membase = omap_hwmod_get_mpu_rt_va(oh);
609 omap_up.irqflags = IRQF_SHARED; 509 omap_up.flags = UPF_BOOT_AUTOCONF;
610 omap_up.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
611 510
612 pdata = &omap_up; 511 pdata = &omap_up;
613 pdata_size = sizeof(struct omap_uart_port_info); 512 pdata_size = sizeof(struct omap_uart_port_info);
@@ -623,7 +522,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
623 omap_device_disable_idle_on_suspend(pdev); 522 omap_device_disable_idle_on_suspend(pdev);
624 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); 523 oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
625 524
626 uart->irq = oh->mpu_irqs[0].irq;
627 uart->regshift = 2; 525 uart->regshift = 2;
628 uart->mapbase = oh->slaves[0]->addr->pa_start; 526 uart->mapbase = oh->slaves[0]->addr->pa_start;
629 uart->membase = omap_hwmod_get_mpu_rt_va(oh); 527 uart->membase = omap_hwmod_get_mpu_rt_va(oh);
@@ -646,24 +544,12 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
646 omap_hwmod_enable_wakeup(uart->oh); 544 omap_hwmod_enable_wakeup(uart->oh);
647 omap_device_idle(uart->pdev); 545 omap_device_idle(uart->pdev);
648 546
649 /*
650 * Need to block sleep long enough for interrupt driven
651 * driver to start. Console driver is in polling mode
652 * so device needs to be kept enabled while polling driver
653 * is in use.
654 */
655 if (uart->timeout)
656 uart->timeout = (30 * HZ);
657 omap_uart_block_sleep(uart); 547 omap_uart_block_sleep(uart);
658 uart->timeout = DEFAULT_TIMEOUT;
659
660 console_unlock(); 548 console_unlock();
661 549
662 if ((cpu_is_omap34xx() && uart->padconf) || 550 if ((cpu_is_omap34xx() && uart->padconf) ||
663 (uart->wk_en && uart->wk_mask)) { 551 (uart->wk_en && uart->wk_mask))
664 device_init_wakeup(&pdev->dev, true); 552 device_init_wakeup(&pdev->dev, true);
665 DEV_CREATE_FILE(&pdev->dev, &dev_attr_sleep_timeout);
666 }
667 553
668 /* Enable the MDR1 errata for OMAP3 */ 554 /* Enable the MDR1 errata for OMAP3 */
669 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) 555 if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx()))