diff options
author | Felipe Balbi <balbi@ti.com> | 2014-09-08 20:54:37 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2014-09-11 16:03:37 -0400 |
commit | 1198365625bf22294263267df3360cb2a4c76f2d (patch) | |
tree | cf1a2ecf9379e52616bd102fbaac22c9cc7d35bf /arch/arm/mach-omap2 | |
parent | 33ca0be0836c834ceba12761b506ff73cf46a376 (diff) |
arm: omap: irq: switch over to intc_readl on omap_intc_handle_irq
an almost blind conversion from readl_relaxed
to our newly introduced intc_readl().
While at that, also remove some hardcoded
register addresses.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/irq.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 39afbd5c1cfe..e1fc4f7c3eb5 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -41,11 +41,13 @@ | |||
41 | #define INTC_MIR_CLEAR0 0x0088 | 41 | #define INTC_MIR_CLEAR0 0x0088 |
42 | #define INTC_MIR_SET0 0x008c | 42 | #define INTC_MIR_SET0 0x008c |
43 | #define INTC_PENDING_IRQ0 0x0098 | 43 | #define INTC_PENDING_IRQ0 0x0098 |
44 | #define INTC_PENDING_IRQ1 0x00b8 | ||
45 | #define INTC_PENDING_IRQ2 0x00d8 | ||
46 | #define INTC_PENDING_IRQ3 0x00f8 | ||
44 | #define INTC_ILR0 0x0100 | 47 | #define INTC_ILR0 0x0100 |
45 | 48 | ||
46 | #define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) | 49 | #define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) |
47 | #define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) | 50 | #define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) |
48 | #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ | ||
49 | #define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ | 51 | #define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ |
50 | #define INTCPS_NR_ILR_REGS 128 | 52 | #define INTCPS_NR_ILR_REGS 128 |
51 | #define INTCPS_NR_MIR_REGS 3 | 53 | #define INTCPS_NR_MIR_REGS 3 |
@@ -192,26 +194,26 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs | |||
192 | int handled_irq = 0; | 194 | int handled_irq = 0; |
193 | 195 | ||
194 | do { | 196 | do { |
195 | irqnr = readl_relaxed(base_addr + 0x98); | 197 | irqnr = intc_readl(INTC_PENDING_IRQ0); |
196 | if (irqnr) | 198 | if (irqnr) |
197 | goto out; | 199 | goto out; |
198 | 200 | ||
199 | irqnr = readl_relaxed(base_addr + 0xb8); | 201 | irqnr = intc_readl(INTC_PENDING_IRQ1); |
200 | if (irqnr) | 202 | if (irqnr) |
201 | goto out; | 203 | goto out; |
202 | 204 | ||
203 | irqnr = readl_relaxed(base_addr + 0xd8); | 205 | irqnr = intc_readl(INTC_PENDING_IRQ2); |
204 | #if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX) | 206 | #if IS_ENABLED(CONFIG_SOC_TI81XX) || IS_ENABLED(CONFIG_SOC_AM33XX) |
205 | if (irqnr) | 207 | if (irqnr) |
206 | goto out; | 208 | goto out; |
207 | irqnr = readl_relaxed(base_addr + 0xf8); | 209 | irqnr = intc_readl(INTC_PENDING_IRQ3); |
208 | #endif | 210 | #endif |
209 | 211 | ||
210 | out: | 212 | out: |
211 | if (!irqnr) | 213 | if (!irqnr) |
212 | break; | 214 | break; |
213 | 215 | ||
214 | irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET); | 216 | irqnr = intc_readl(INTC_SIR); |
215 | irqnr &= ACTIVEIRQ_MASK; | 217 | irqnr &= ACTIVEIRQ_MASK; |
216 | 218 | ||
217 | if (irqnr) { | 219 | if (irqnr) { |