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authorRajendra Nayak <rnayak@ti.com>2011-02-25 17:48:14 -0500
committerPaul Walmsley <paul@pwsan.com>2011-02-25 18:09:05 -0500
commit04eb7773d803bd0a8249c5bba37f81c496253ea1 (patch)
treecceb00f50dc272bf80218b918aa72cd25df3af90 /arch/arm/mach-omap2
parent514c5948b2b5a3f9f9ebc344fc03073f3bd481b4 (diff)
OMAP4: CM: Add CM accesor api for bitwise control
Add new OMAP4 CM accesor apis to set/clear and read bitfields (based on mask) from CM registers. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c21
-rw-r--r--arch/arm/mach-omap2/cminst44xx.h6
2 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index c04bbbea17a5..a482bfa0a954 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -73,6 +73,27 @@ u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
73 return v; 73 return v;
74} 74}
75 75
76u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, s16 inst, s16 idx)
77{
78 return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
79}
80
81u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, s16 idx)
82{
83 return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
84}
85
86u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
87{
88 u32 v;
89
90 v = omap4_cminst_read_inst_reg(part, inst, idx);
91 v &= mask;
92 v >>= __ffs(mask);
93
94 return v;
95}
96
76/* 97/*
77 * 98 *
78 */ 99 */
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index a6abd0a8cb82..2b32c181a2ee 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -25,6 +25,12 @@ extern u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx);
25extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); 25extern void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
26extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, 26extern u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
27 s16 inst, s16 idx); 27 s16 inst, s16 idx);
28extern u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, s16 inst,
29 s16 idx);
30extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst,
31 s16 idx);
32extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
33 u32 mask);
28 34
29extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); 35extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
30 36