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authorKevin Hilman <khilman@ti.com>2011-06-09 14:01:55 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 15:02:56 -0400
commite4e021c5491537783f5f65a6defa92e6098a3658 (patch)
tree01f6736da2d7584f6740401b6f297d80f8565dc6 /arch/arm/mach-omap2/vc3xxx_data.c
parentba112a4e86ba8f0f9546bd953374cde064b507ca (diff)
OMAP3+: VC: cleanup PMIC register address configuration
- support both voltage register address and command register address for each VC channel - add fields for voltage register address (volra) and command register address (cmdra) to struct omap_vc_channel - use VC/VP register access read/modify/write helper - remove volra_shift field (use __ffs(mask) for shift value) - I2C addresses 10-bit, change size to u16 Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/vc3xxx_data.c')
-rw-r--r--arch/arm/mach-omap2/vc3xxx_data.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index 86be50c263ac..df8bd5ead7e4 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -32,6 +32,7 @@
32static struct omap_vc_common omap3_vc_common = { 32static struct omap_vc_common omap3_vc_common = {
33 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, 33 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
34 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, 34 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
35 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
35 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, 36 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
36 .data_shift = OMAP3430_DATA_SHIFT, 37 .data_shift = OMAP3430_DATA_SHIFT,
37 .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, 38 .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
@@ -48,14 +49,14 @@ struct omap_vc_channel omap3_vc_mpu = {
48 .common = &omap3_vc_common, 49 .common = &omap3_vc_common,
49 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, 50 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
50 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, 51 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
51 .smps_volra_shift = OMAP3430_VOLRA0_SHIFT,
52 .smps_volra_mask = OMAP3430_VOLRA0_MASK, 52 .smps_volra_mask = OMAP3430_VOLRA0_MASK,
53 .smps_cmdra_mask = OMAP3430_CMDRA0_MASK,
53}; 54};
54 55
55struct omap_vc_channel omap3_vc_core = { 56struct omap_vc_channel omap3_vc_core = {
56 .common = &omap3_vc_common, 57 .common = &omap3_vc_common,
57 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, 58 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
58 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, 59 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
59 .smps_volra_shift = OMAP3430_VOLRA1_SHIFT,
60 .smps_volra_mask = OMAP3430_VOLRA1_MASK, 60 .smps_volra_mask = OMAP3430_VOLRA1_MASK,
61 .smps_cmdra_mask = OMAP3430_CMDRA1_MASK,
61}; 62};