OMAP2/3 SDRC: don't set SDRC_POWER.PWDENA on boot

Stop setting SDRC_POWER.PWDENA on boot.  There is a nasty erratum
(34xx erratum 1.150) that can cause memory corruption if PWDENA is
enabled.

Based originally on a patch from Samu P. Onkalo <samu.p.onkalo@nokia.com>.

Tested on BeagleBoard rev C2.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Samu P. Onkalo <samu.p.onkalo@nokia.com>

1 files changed, 0 insertions, 2 deletions

diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index 3aef7448b2a5..9c2d0465a83c 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -58,7 +58,6 @@
 
 /* SDRC_POWER bit settings */
 #define SRFRONIDLEREQ_MASK              0x40
-#define PWDENA_MASK                     0x4
 
 /* CM_IDLEST1_CORE bit settings */
 #define ST_SDRC_MASK                    0x2
@@ -160,7 +159,6 @@ sdram_in_selfrefresh:
         ldr     r12, [r11]              @ read the contents of SDRC_POWER
         mov     r9, r12                 @ keep a copy of SDRC_POWER bits
         orr     r12, r12, #SRFRONIDLEREQ_MASK   @ enable self refresh on idle
-        bic     r12, r12, #PWDENA_MASK  @ clear PWDENA
         str     r12, [r11]              @ write back to SDRC_POWER register
         ldr     r12, [r11]              @ posted-write barrier for SDRC
 idle_sdrc: