diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-10-28 11:54:49 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-10-28 11:54:49 -0400 |
commit | d1a76187a5be4f89c6cb19d800cb5fb7aac735c5 (patch) | |
tree | 2fac3ffbfffc7560eeef8364b541d0d7a0057920 /arch/arm/mach-omap2/serial.c | |
parent | c7e78cff6b7518212247fb20b1dc6411540dc9af (diff) | |
parent | 0173a3265b228da319ceb9c1ec6a5682fd1b2d92 (diff) |
Merge commit 'v2.6.28-rc2' into core/locking
Conflicts:
arch/um/include/asm/system.h
Diffstat (limited to 'arch/arm/mach-omap2/serial.c')
-rw-r--r-- | arch/arm/mach-omap2/serial.c | 119 |
1 files changed, 49 insertions, 70 deletions
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index adc8a26a8fb0..4dcf39c285b9 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * OMAP2 serial support. | 4 | * OMAP2 serial support. |
5 | * | 5 | * |
6 | * Copyright (C) 2005 Nokia Corporation | 6 | * Copyright (C) 2005-2008 Nokia Corporation |
7 | * Author: Paul Mundt <paul.mundt@nokia.com> | 7 | * Author: Paul Mundt <paul.mundt@nokia.com> |
8 | * | 8 | * |
9 | * Based off of arch/arm/mach-omap/omap1/serial.c | 9 | * Based off of arch/arm/mach-omap/omap1/serial.c |
@@ -17,44 +17,39 @@ | |||
17 | #include <linux/serial_8250.h> | 17 | #include <linux/serial_8250.h> |
18 | #include <linux/serial_reg.h> | 18 | #include <linux/serial_reg.h> |
19 | #include <linux/clk.h> | 19 | #include <linux/clk.h> |
20 | 20 | #include <linux/io.h> | |
21 | #include <asm/io.h> | ||
22 | 21 | ||
23 | #include <mach/common.h> | 22 | #include <mach/common.h> |
24 | #include <mach/board.h> | 23 | #include <mach/board.h> |
25 | 24 | ||
26 | static struct clk * uart1_ick = NULL; | 25 | static struct clk *uart_ick[OMAP_MAX_NR_PORTS]; |
27 | static struct clk * uart1_fck = NULL; | 26 | static struct clk *uart_fck[OMAP_MAX_NR_PORTS]; |
28 | static struct clk * uart2_ick = NULL; | ||
29 | static struct clk * uart2_fck = NULL; | ||
30 | static struct clk * uart3_ick = NULL; | ||
31 | static struct clk * uart3_fck = NULL; | ||
32 | 27 | ||
33 | static struct plat_serial8250_port serial_platform_data[] = { | 28 | static struct plat_serial8250_port serial_platform_data[] = { |
34 | { | 29 | { |
35 | .membase = (char *)IO_ADDRESS(OMAP_UART1_BASE), | 30 | .membase = IO_ADDRESS(OMAP_UART1_BASE), |
36 | .mapbase = (unsigned long)OMAP_UART1_BASE, | 31 | .mapbase = OMAP_UART1_BASE, |
37 | .irq = 72, | 32 | .irq = 72, |
38 | .flags = UPF_BOOT_AUTOCONF, | 33 | .flags = UPF_BOOT_AUTOCONF, |
39 | .iotype = UPIO_MEM, | 34 | .iotype = UPIO_MEM, |
40 | .regshift = 2, | 35 | .regshift = 2, |
41 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 36 | .uartclk = OMAP24XX_BASE_BAUD * 16, |
42 | }, { | 37 | }, { |
43 | .membase = (char *)IO_ADDRESS(OMAP_UART2_BASE), | 38 | .membase = IO_ADDRESS(OMAP_UART2_BASE), |
44 | .mapbase = (unsigned long)OMAP_UART2_BASE, | 39 | .mapbase = OMAP_UART2_BASE, |
45 | .irq = 73, | 40 | .irq = 73, |
46 | .flags = UPF_BOOT_AUTOCONF, | 41 | .flags = UPF_BOOT_AUTOCONF, |
47 | .iotype = UPIO_MEM, | 42 | .iotype = UPIO_MEM, |
48 | .regshift = 2, | 43 | .regshift = 2, |
49 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 44 | .uartclk = OMAP24XX_BASE_BAUD * 16, |
50 | }, { | 45 | }, { |
51 | .membase = (char *)IO_ADDRESS(OMAP_UART3_BASE), | 46 | .membase = IO_ADDRESS(OMAP_UART3_BASE), |
52 | .mapbase = (unsigned long)OMAP_UART3_BASE, | 47 | .mapbase = OMAP_UART3_BASE, |
53 | .irq = 74, | 48 | .irq = 74, |
54 | .flags = UPF_BOOT_AUTOCONF, | 49 | .flags = UPF_BOOT_AUTOCONF, |
55 | .iotype = UPIO_MEM, | 50 | .iotype = UPIO_MEM, |
56 | .regshift = 2, | 51 | .regshift = 2, |
57 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 52 | .uartclk = OMAP24XX_BASE_BAUD * 16, |
58 | }, { | 53 | }, { |
59 | .flags = 0 | 54 | .flags = 0 |
60 | } | 55 | } |
@@ -71,7 +66,7 @@ static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, | |||
71 | int value) | 66 | int value) |
72 | { | 67 | { |
73 | offset <<= p->regshift; | 68 | offset <<= p->regshift; |
74 | __raw_writeb(value, (unsigned long)(p->membase + offset)); | 69 | __raw_writeb(value, p->membase + offset); |
75 | } | 70 | } |
76 | 71 | ||
77 | /* | 72 | /* |
@@ -87,10 +82,27 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p) | |||
87 | serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0)); | 82 | serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0)); |
88 | } | 83 | } |
89 | 84 | ||
90 | void __init omap_serial_init() | 85 | void omap_serial_enable_clocks(int enable) |
86 | { | ||
87 | int i; | ||
88 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | ||
89 | if (uart_ick[i] && uart_fck[i]) { | ||
90 | if (enable) { | ||
91 | clk_enable(uart_ick[i]); | ||
92 | clk_enable(uart_fck[i]); | ||
93 | } else { | ||
94 | clk_disable(uart_ick[i]); | ||
95 | clk_disable(uart_fck[i]); | ||
96 | } | ||
97 | } | ||
98 | } | ||
99 | } | ||
100 | |||
101 | void __init omap_serial_init(void) | ||
91 | { | 102 | { |
92 | int i; | 103 | int i; |
93 | const struct omap_uart_config *info; | 104 | const struct omap_uart_config *info; |
105 | char name[16]; | ||
94 | 106 | ||
95 | /* | 107 | /* |
96 | * Make sure the serial ports are muxed on at this point. | 108 | * Make sure the serial ports are muxed on at this point. |
@@ -98,8 +110,7 @@ void __init omap_serial_init() | |||
98 | * if not needed. | 110 | * if not needed. |
99 | */ | 111 | */ |
100 | 112 | ||
101 | info = omap_get_config(OMAP_TAG_UART, | 113 | info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); |
102 | struct omap_uart_config); | ||
103 | 114 | ||
104 | if (info == NULL) | 115 | if (info == NULL) |
105 | return; | 116 | return; |
@@ -108,58 +119,26 @@ void __init omap_serial_init() | |||
108 | struct plat_serial8250_port *p = serial_platform_data + i; | 119 | struct plat_serial8250_port *p = serial_platform_data + i; |
109 | 120 | ||
110 | if (!(info->enabled_uarts & (1 << i))) { | 121 | if (!(info->enabled_uarts & (1 << i))) { |
111 | p->membase = 0; | 122 | p->membase = NULL; |
112 | p->mapbase = 0; | 123 | p->mapbase = 0; |
113 | continue; | 124 | continue; |
114 | } | 125 | } |
115 | 126 | ||
116 | switch (i) { | 127 | sprintf(name, "uart%d_ick", i+1); |
117 | case 0: | 128 | uart_ick[i] = clk_get(NULL, name); |
118 | uart1_ick = clk_get(NULL, "uart1_ick"); | 129 | if (IS_ERR(uart_ick[i])) { |
119 | if (IS_ERR(uart1_ick)) | 130 | printk(KERN_ERR "Could not get uart%d_ick\n", i+1); |
120 | printk("Could not get uart1_ick\n"); | 131 | uart_ick[i] = NULL; |
121 | else { | 132 | } else |
122 | clk_enable(uart1_ick); | 133 | clk_enable(uart_ick[i]); |
123 | } | 134 | |
124 | 135 | sprintf(name, "uart%d_fck", i+1); | |
125 | uart1_fck = clk_get(NULL, "uart1_fck"); | 136 | uart_fck[i] = clk_get(NULL, name); |
126 | if (IS_ERR(uart1_fck)) | 137 | if (IS_ERR(uart_fck[i])) { |
127 | printk("Could not get uart1_fck\n"); | 138 | printk(KERN_ERR "Could not get uart%d_fck\n", i+1); |
128 | else { | 139 | uart_fck[i] = NULL; |
129 | clk_enable(uart1_fck); | 140 | } else |
130 | } | 141 | clk_enable(uart_fck[i]); |
131 | break; | ||
132 | case 1: | ||
133 | uart2_ick = clk_get(NULL, "uart2_ick"); | ||
134 | if (IS_ERR(uart2_ick)) | ||
135 | printk("Could not get uart2_ick\n"); | ||
136 | else { | ||
137 | clk_enable(uart2_ick); | ||
138 | } | ||
139 | |||
140 | uart2_fck = clk_get(NULL, "uart2_fck"); | ||
141 | if (IS_ERR(uart2_fck)) | ||
142 | printk("Could not get uart2_fck\n"); | ||
143 | else { | ||
144 | clk_enable(uart2_fck); | ||
145 | } | ||
146 | break; | ||
147 | case 2: | ||
148 | uart3_ick = clk_get(NULL, "uart3_ick"); | ||
149 | if (IS_ERR(uart3_ick)) | ||
150 | printk("Could not get uart3_ick\n"); | ||
151 | else { | ||
152 | clk_enable(uart3_ick); | ||
153 | } | ||
154 | |||
155 | uart3_fck = clk_get(NULL, "uart3_fck"); | ||
156 | if (IS_ERR(uart3_fck)) | ||
157 | printk("Could not get uart3_fck\n"); | ||
158 | else { | ||
159 | clk_enable(uart3_fck); | ||
160 | } | ||
161 | break; | ||
162 | } | ||
163 | 142 | ||
164 | omap_serial_reset(p); | 143 | omap_serial_reset(p); |
165 | } | 144 | } |