Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc power management changes from Arnd Bergmann:
 "These are various power management related changes, mainly concerning
  cpuidle on i.MX and OMAP, as well as a the move of the omap
  smartreflex driver to live in the power subsystem."

Fix up conflicts in arch/arm/mach-{imx/mach-imx6q.c,omap2/prm2xxx_3xxx.h}

* tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
  ARM: OMAP2+: PM: fix IRQ_NOAUTOEN removal by mis-merge
  ARM: OMAP2+: do not allow SmartReflex to be built as a module
  ARM: OMAP2: Use hwmod to initialize mmc for 2420
  ARM: OMAP3: PM: cpuidle: optimize the clkdm idle latency in C1 state
  ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state
  ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_state
  ARM: OMAP3: PM: cleanup cam_pwrdm leftovers
  ARM: OMAP3: PM: call pre/post transition per powerdomain
  ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm
  ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle
  ARM: OMAP3PLUS: hwmod: reconfigure IO Daisychain during hwmod mux
  ARM: OMAP3+: PRM: Enable IO wake up
  ARM: OMAP4: PRM: Add IO Daisychain support
  ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file
  ARM: OMAP3: PM: correct enable/disable of daisy io chain
  ARM: OMAP2+: PRM: fix compile for OMAP4-only build
  W1: OMAP HDQ1W: use runtime PM
  ARM: OMAP2+: HDQ1W: use omap_device
  W1: OMAP HDQ1W: use 32-bit register accesses
  W1: OMAP HDQ1W: allow driver to be built on all OMAP2+
  ...

1 files changed, 62 insertions, 1 deletions

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index f106d21ff581..bb727c2d9337 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -233,10 +233,71 @@ void omap44xx_prm_restore_irqen(u32 *saved_mask)
                                  OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
 }
 
+/**
+ * omap44xx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
+ *
+ * Clear any previously-latched I/O wakeup events and ensure that the
+ * I/O wakeup gates are aligned with the current mux settings.  Works
+ * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then
+ * deasserting WUCLKIN and waiting for WUCLKOUT to be deasserted.
+ * No return value. XXX Are the final two steps necessary?
+ */
+void omap44xx_prm_reconfigure_io_chain(void)
+{
+        int i = 0;
+
+        /* Trigger WUCLKIN enable */
+        omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
+                                    OMAP4430_WUCLK_CTRL_MASK,
+                                    OMAP4430_PRM_DEVICE_INST,
+                                    OMAP4_PRM_IO_PMCTRL_OFFSET);
+        omap_test_timeout(
+                (((omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
+                                           OMAP4_PRM_IO_PMCTRL_OFFSET) &
+                   OMAP4430_WUCLK_STATUS_MASK) >>
+                  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
+                MAX_IOPAD_LATCH_TIME, i);
+        if (i == MAX_IOPAD_LATCH_TIME)
+                pr_warn("PRM: I/O chain clock line assertion timed out\n");
+
+        /* Trigger WUCLKIN disable */
+        omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
+                                    OMAP4430_PRM_DEVICE_INST,
+                                    OMAP4_PRM_IO_PMCTRL_OFFSET);
+        omap_test_timeout(
+                (((omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
+                                           OMAP4_PRM_IO_PMCTRL_OFFSET) &
+                   OMAP4430_WUCLK_STATUS_MASK) >>
+                  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
+                MAX_IOPAD_LATCH_TIME, i);
+        if (i == MAX_IOPAD_LATCH_TIME)
+                pr_warn("PRM: I/O chain clock line deassertion timed out\n");
+
+        return;
+}
+
+/**
+ * omap44xx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches
+ *
+ * Activates the I/O wakeup event latches and allows events logged by
+ * those latches to signal a wakeup event to the PRCM.  For I/O wakeups
+ * to occur, WAKEUPENABLE bits must be set in the pad mux registers, and
+ * omap44xx_prm_reconfigure_io_chain() must be called.  No return value.
+ */
+static void __init omap44xx_prm_enable_io_wakeup(void)
+{
+        omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
+                                    OMAP4430_GLOBAL_WUEN_MASK,
+                                    OMAP4430_PRM_DEVICE_INST,
+                                    OMAP4_PRM_IO_PMCTRL_OFFSET);
+}
+
 static int __init omap4xxx_prcm_init(void)
 {
-        if (cpu_is_omap44xx())
+        if (cpu_is_omap44xx()) {
+                omap44xx_prm_enable_io_wakeup();
                 return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
+        }
         return 0;
 }
 subsys_initcall(omap4xxx_prcm_init);