aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/prm2xxx_3xxx.c
diff options
context:
space:
mode:
authorPaul Walmsley <paul@pwsan.com>2012-12-28 04:10:44 -0500
committerPaul Walmsley <paul@pwsan.com>2013-01-02 14:07:16 -0500
commit7e7fff8254e318cede06a1a8c55b0d86dd4d8c5b (patch)
tree38ad0446026932ed55ae1af167dae17c0a417f3a /arch/arm/mach-omap2/prm2xxx_3xxx.c
parentcfef4b2723d525a6588c4c55b42f9b98be27937f (diff)
ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values
On OMAP2xxx chips, the register bitfields for the PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are different than those used on OMAP3/4. The order is reversed. So, for example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0 indicates 'OFF'. Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on OMAP3/4, 0x3 indicates 'ON'. To fix this, we treat the OMAP3/4 values as the powerdomain API values, and create new low-level powerdomain functions for the OMAP2xxx chips which translate between the OMAP2xxx values and the OMAP3/4 values. Without this patch, the conversion of the OMAP2xxx PM code to the functional powerstate code results in a non-booting kernel. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm2xxx_3xxx.c')
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c22
1 files changed, 0 insertions, 22 deletions
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 30517f5af707..a3e121f94a86 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
103/* Powerdomain low-level functions */ 103/* Powerdomain low-level functions */
104 104
105/* Common functions across OMAP2 and OMAP3 */ 105/* Common functions across OMAP2 and OMAP3 */
106int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
107{
108 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
109 (pwrst << OMAP_POWERSTATE_SHIFT),
110 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
111 return 0;
112}
113
114int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
115{
116 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
117 OMAP2_PM_PWSTCTRL,
118 OMAP_POWERSTATE_MASK);
119}
120
121int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
122{
123 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
124 OMAP2_PM_PWSTST,
125 OMAP_POWERSTATEST_MASK);
126}
127
128int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, 106int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
129 u8 pwrst) 107 u8 pwrst)
130{ 108{