diff options
author | Kevin Hilman <khilman@ti.com> | 2011-03-28 13:25:12 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@ti.com> | 2011-09-15 15:02:07 -0400 |
commit | 4bb73adec43bbf63d39e1c2021de0aab0c60ea34 (patch) | |
tree | dc05e399041841aaebe773c4ac37fd86e82777d2 /arch/arm/mach-omap2/prm2xxx_3xxx.c | |
parent | 842ec22852cf843558828e6f7a6da2bf72f341a5 (diff) |
OMAP2+: PRM: add register access functions for VC/VP
On OMAP3+, the voltage controller (VC) and voltage processor (VP) are
inside the PRM. Add some PRM helper functions for register access to
these module registers.
Thanks to Nishanth Menon for finding/fixing a sparse problem.
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm2xxx_3xxx.c')
-rw-r--r-- | arch/arm/mach-omap2/prm2xxx_3xxx.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 58c5c878b295..f02d87f68e54 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c | |||
@@ -169,7 +169,7 @@ struct omap3_vp { | |||
169 | u32 tranxdone_status; | 169 | u32 tranxdone_status; |
170 | }; | 170 | }; |
171 | 171 | ||
172 | struct omap3_vp omap3_vp[] = { | 172 | static struct omap3_vp omap3_vp[] = { |
173 | [OMAP3_VP_VDD_MPU_ID] = { | 173 | [OMAP3_VP_VDD_MPU_ID] = { |
174 | .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, | 174 | .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, |
175 | }, | 175 | }, |
@@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id) | |||
197 | omap2_prm_write_mod_reg(vp->tranxdone_status, | 197 | omap2_prm_write_mod_reg(vp->tranxdone_status, |
198 | OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | 198 | OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); |
199 | } | 199 | } |
200 | |||
201 | u32 omap3_prm_vcvp_read(u8 offset) | ||
202 | { | ||
203 | return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); | ||
204 | } | ||
205 | |||
206 | void omap3_prm_vcvp_write(u32 val, u8 offset) | ||
207 | { | ||
208 | omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); | ||
209 | } | ||
210 | |||
211 | u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) | ||
212 | { | ||
213 | return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); | ||
214 | } | ||