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authorSuman Anna <s-anna@ti.com>2014-07-06 17:51:23 -0400
committerPaul Walmsley <paul@pwsan.com>2014-07-06 17:51:23 -0400
commit0cd8d4052ae4c690fc3ea6133a0ad5404360308d (patch)
treecd6799dfb6936835c423f19b7402482497cfa0a8 /arch/arm/mach-omap2/prm-regbits-34xx.h
parenta497c3ba1d97fc69c1e78e7b96435ba8c2cb42ee (diff)
ARM: OMAP3: PRM/CM: Add back macros used by TI DSP/Bridge driver
The commit 7be914f {ARM: OMAP3: PRM/CM: Cleanup unused header} removed some of the macros used by the TI DSP/Bridge driver. This fixes the following build errors when trying to build DSP/Bridge driver (disabled at present), otherwise results in the following build errors: drivers/staging/tidspbridge/core/tiomap3430.c:531:31: error: 'OMAP3430_AUTO_IVA2_DPLL_SHIFT' undeclared (first use in this function) drivers/staging/tidspbridge/core/tiomap3430.c:531:31: note: each undeclared identifier is reported only once for each function it appears in make[3]: *** [drivers/staging/tidspbridge/core/tiomap3430.o] Error 1 make[3]: *** Waiting for unfinished jobs.... drivers/staging/tidspbridge/core/tiomap_io.c: In function 'sm_interrupt_dsp': drivers/staging/tidspbridge/core/tiomap_io.c:404:31: error: 'OMAP3430_AUTO_IVA2_DPLL_SHIFT' undeclared (first use in this function) drivers/staging/tidspbridge/core/tiomap_io.c:404:31: note: each undeclared identifier is reported only once for each function it appears in drivers/staging/tidspbridge/core/tiomap_io.c:414:12: error: 'OMAP3430_IVA2_DPLL_FREQSEL_SHIFT' undeclared (first use in this function) drivers/staging/tidspbridge/core/tiomap_io.c:415:12: error: 'OMAP3430_EN_IVA2_DPLL_SHIFT' undeclared (first use in this function) make[3]: *** [drivers/staging/tidspbridge/core/tiomap_io.o] Error 1 drivers/staging/tidspbridge/core/tiomap3430_pwr.c: In function 'dsp_clk_wakeup_event_ctrl': drivers/staging/tidspbridge/core/tiomap3430_pwr.c:442:19: error: 'OMAP3430_GRPSEL_GPT5_MASK' undeclared (first use in this function) drivers/staging/tidspbridge/core/tiomap3430_pwr.c:442:19: note: each undeclared identifier is reported only once for each function it appears in drivers/staging/tidspbridge/core/tiomap3430_pwr.c:455:19: error: 'OMAP3430_GRPSEL_GPT6_MASK' undeclared (first use in this function) drivers/staging/tidspbridge/core/tiomap3430_pwr.c:468:19: error: 'OMAP3430_GRPSEL_GPT7_MASK' undeclared (first use in this function) drivers/staging/tidspbridge/core/tiomap3430_pwr.c:481:19: error: 'OMAP3430_GRPSEL_GPT8_MASK' undeclared (first use in this function) drivers/staging/tidspbridge/core/tiomap3430_pwr.c:494:19: error: 'OMAP3430_GRPSEL_MCBSP1_MASK' undeclared (first use in this function) drivers/staging/tidspbridge/core/tiomap3430_pwr.c:546:19: error: 'OMAP3430_GRPSEL_MCBSP5_MASK' undeclared (first use in this function) make[3]: *** [drivers/staging/tidspbridge/core/tiomap3430_pwr.o] Error 1 make[2]: *** [drivers/staging/tidspbridge] Error 2 Fixes: 7be914f (ARM: OMAP3: PRM/CM: Cleanup unused header) Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm-regbits-34xx.h')
-rw-r--r--arch/arm/mach-omap2/prm-regbits-34xx.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 106132db532b..cbefbd7cfdb5 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -35,6 +35,8 @@
35#define OMAP3430_LOGICSTATEST_MASK (1 << 2) 35#define OMAP3430_LOGICSTATEST_MASK (1 << 2)
36#define OMAP3430_LASTLOGICSTATEENTERED_MASK (1 << 2) 36#define OMAP3430_LASTLOGICSTATEENTERED_MASK (1 << 2)
37#define OMAP3430_LASTPOWERSTATEENTERED_MASK (0x3 << 0) 37#define OMAP3430_LASTPOWERSTATEENTERED_MASK (0x3 << 0)
38#define OMAP3430_GRPSEL_MCBSP5_MASK (1 << 10)
39#define OMAP3430_GRPSEL_MCBSP1_MASK (1 << 9)
38#define OMAP3630_GRPSEL_UART4_MASK (1 << 18) 40#define OMAP3630_GRPSEL_UART4_MASK (1 << 18)
39#define OMAP3430_GRPSEL_GPIO6_MASK (1 << 17) 41#define OMAP3430_GRPSEL_GPIO6_MASK (1 << 17)
40#define OMAP3430_GRPSEL_GPIO5_MASK (1 << 16) 42#define OMAP3430_GRPSEL_GPIO5_MASK (1 << 16)
@@ -42,6 +44,10 @@
42#define OMAP3430_GRPSEL_GPIO3_MASK (1 << 14) 44#define OMAP3430_GRPSEL_GPIO3_MASK (1 << 14)
43#define OMAP3430_GRPSEL_GPIO2_MASK (1 << 13) 45#define OMAP3430_GRPSEL_GPIO2_MASK (1 << 13)
44#define OMAP3430_GRPSEL_UART3_MASK (1 << 11) 46#define OMAP3430_GRPSEL_UART3_MASK (1 << 11)
47#define OMAP3430_GRPSEL_GPT8_MASK (1 << 9)
48#define OMAP3430_GRPSEL_GPT7_MASK (1 << 8)
49#define OMAP3430_GRPSEL_GPT6_MASK (1 << 7)
50#define OMAP3430_GRPSEL_GPT5_MASK (1 << 6)
45#define OMAP3430_GRPSEL_MCBSP4_MASK (1 << 2) 51#define OMAP3430_GRPSEL_MCBSP4_MASK (1 << 2)
46#define OMAP3430_GRPSEL_MCBSP3_MASK (1 << 1) 52#define OMAP3430_GRPSEL_MCBSP3_MASK (1 << 1)
47#define OMAP3430_GRPSEL_MCBSP2_MASK (1 << 0) 53#define OMAP3430_GRPSEL_MCBSP2_MASK (1 << 0)