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authorPaul Walmsley <paul@pwsan.com>2010-12-21 23:05:14 -0500
committerPaul Walmsley <paul@pwsan.com>2010-12-21 23:05:14 -0500
commitc4d7e58fb52c632d8e33cd23a4917d7a7f8302ac (patch)
tree20a56db9f93ff411fc439ea1961b1e51f2ecf15b /arch/arm/mach-omap2/powerdomain44xx.c
parentdac9a77120e2724e22696f06f3ecb4838da1e3e4 (diff)
OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_"
Now that OMAP4-specific PRCM functions have been added, distinguish the existing OMAP2/3-specific PRCM functions by prefixing them with "omap2_". This patch should not result in any functional change. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomain44xx.c')
-rw-r--r--arch/arm/mach-omap2/powerdomain44xx.c33
1 files changed, 18 insertions, 15 deletions
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index dae767bf1952..4c5ab1a2d44b 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -25,7 +25,7 @@
25 25
26static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) 26static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
27{ 27{
28 prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, 28 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
29 (pwrst << OMAP_POWERSTATE_SHIFT), 29 (pwrst << OMAP_POWERSTATE_SHIFT),
30 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); 30 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
31 return 0; 31 return 0;
@@ -33,25 +33,25 @@ static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
33 33
34static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) 34static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
35{ 35{
36 return prm_read_mod_bits_shift(pwrdm->prcm_offs, 36 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
37 OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK); 37 OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK);
38} 38}
39 39
40static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) 40static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
41{ 41{
42 return prm_read_mod_bits_shift(pwrdm->prcm_offs, 42 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
43 OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK); 43 OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK);
44} 44}
45 45
46static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) 46static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
47{ 47{
48 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, 48 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
49 OMAP4430_LASTPOWERSTATEENTERED_MASK); 49 OMAP4430_LASTPOWERSTATEENTERED_MASK);
50} 50}
51 51
52static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) 52static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
53{ 53{
54 prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, 54 omap2_prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
55 (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), 55 (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
56 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); 56 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
57 return 0; 57 return 0;
@@ -59,7 +59,7 @@ static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
59 59
60static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) 60static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
61{ 61{
62 prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, 62 omap2_prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
63 OMAP4430_LASTPOWERSTATEENTERED_MASK, 63 OMAP4430_LASTPOWERSTATEENTERED_MASK,
64 pwrdm->prcm_offs, OMAP4_PM_PWSTST); 64 pwrdm->prcm_offs, OMAP4_PM_PWSTST);
65 return 0; 65 return 0;
@@ -70,7 +70,7 @@ static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
70 u32 v; 70 u32 v;
71 71
72 v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); 72 v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
73 prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, 73 omap2_prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
74 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); 74 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
75 75
76 return 0; 76 return 0;
@@ -83,7 +83,7 @@ static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
83 83
84 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); 84 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
85 85
86 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, 86 omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
87 OMAP4_PM_PWSTCTRL); 87 OMAP4_PM_PWSTCTRL);
88 88
89 return 0; 89 return 0;
@@ -96,7 +96,7 @@ static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
96 96
97 m = omap2_pwrdm_get_mem_bank_retst_mask(bank); 97 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
98 98
99 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, 99 omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
100 OMAP4_PM_PWSTCTRL); 100 OMAP4_PM_PWSTCTRL);
101 101
102 return 0; 102 return 0;
@@ -104,14 +104,15 @@ static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
104 104
105static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) 105static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
106{ 106{
107 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, 107 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
108 OMAP4430_LOGICSTATEST_MASK); 108 OMAP4430_LOGICSTATEST_MASK);
109} 109}
110 110
111static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) 111static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
112{ 112{
113 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL, 113 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
114 OMAP4430_LOGICRETSTATE_MASK); 114 OMAP4_PM_PWSTCTRL,
115 OMAP4430_LOGICRETSTATE_MASK);
115} 116}
116 117
117static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) 118static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
@@ -120,7 +121,8 @@ static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
120 121
121 m = omap2_pwrdm_get_mem_bank_stst_mask(bank); 122 m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
122 123
123 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST, m); 124 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
125 m);
124} 126}
125 127
126static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) 128static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
@@ -129,7 +131,8 @@ static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
129 131
130 m = omap2_pwrdm_get_mem_bank_retst_mask(bank); 132 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
131 133
132 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL, m); 134 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
135 OMAP4_PM_PWSTCTRL, m);
133} 136}
134 137
135static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) 138static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
@@ -143,7 +146,7 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
143 */ 146 */
144 147
145 /* XXX Is this udelay() value meaningful? */ 148 /* XXX Is this udelay() value meaningful? */
146 while ((prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) & 149 while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) &
147 OMAP_INTRANSITION_MASK) && 150 OMAP_INTRANSITION_MASK) &&
148 (c++ < PWRDM_TRANSITION_BAILOUT)) 151 (c++ < PWRDM_TRANSITION_BAILOUT))
149 udelay(1); 152 udelay(1);