aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/omap_twl.c
diff options
context:
space:
mode:
authorTero Kristo <t-kristo@ti.com>2012-09-25 12:33:42 -0400
committerKevin Hilman <khilman@ti.com>2012-11-05 18:22:05 -0500
commit5a84dc5bc5d7d35d3788f4d1a9c928912c3ad41b (patch)
tree317fa4b8f8b3493930286b5c03f7d80fde4fc650 /arch/arm/mach-omap2/omap_twl.c
parentd68ff977b82954fed8e3f4bde8431517455c2003 (diff)
ARM: OMAP: TWL: change the vddmin / vddmax voltages to spec
As vddmin / vddmax voltages for the pmic only describe the pmic capabilities now, change the voltages to be according to spec. TWL data manuals give following values: TWL4030 (SWCS019L) : VDD1: 600mV ... 1450mV, VDD2: 600mV ... 1500mV TWL5030 (SWCS030E) : VDD1: 600mV ... 1450mV, VDD2: 600mV ... 1500mV TWL6030 (SWCS045A) : 0V ... 2100mV Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_twl.c')
-rw-r--r--arch/arm/mach-omap2/omap_twl.c27
1 files changed, 10 insertions, 17 deletions
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index dca1d662d5e0..188f21027c9a 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -145,8 +145,8 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = {
145 .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, 145 .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
146 .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, 146 .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN,
147 .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, 147 .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX,
148 .vddmin = OMAP3430_VP1_VLIMITTO_VDDMIN, 148 .vddmin = 600000,
149 .vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, 149 .vddmax = 1450000,
150 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, 150 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
151 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, 151 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
152 .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, 152 .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG,
@@ -162,8 +162,8 @@ static struct omap_voltdm_pmic omap3_core_pmic = {
162 .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, 162 .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
163 .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, 163 .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN,
164 .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, 164 .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX,
165 .vddmin = OMAP3430_VP2_VLIMITTO_VDDMIN, 165 .vddmin = 600000,
166 .vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, 166 .vddmax = 1450000,
167 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, 167 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
168 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, 168 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
169 .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, 169 .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG,
@@ -179,8 +179,8 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
179 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, 179 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
180 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, 180 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
181 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, 181 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
182 .vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN, 182 .vddmin = 0,
183 .vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, 183 .vddmax = 2100000,
184 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, 184 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
185 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, 185 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
186 .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, 186 .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
@@ -197,8 +197,8 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
197 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, 197 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
198 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, 198 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
199 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, 199 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
200 .vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN, 200 .vddmin = 0,
201 .vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, 201 .vddmax = 2100000,
202 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, 202 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
203 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, 203 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
204 .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, 204 .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
@@ -215,8 +215,8 @@ static struct omap_voltdm_pmic omap4_core_pmic = {
215 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, 215 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
216 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, 216 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
217 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, 217 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
218 .vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN, 218 .vddmin = 0,
219 .vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, 219 .vddmax = 2100000,
220 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, 220 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
221 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, 221 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
222 .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, 222 .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG,
@@ -251,13 +251,6 @@ int __init omap3_twl_init(void)
251 if (!cpu_is_omap34xx()) 251 if (!cpu_is_omap34xx())
252 return -ENODEV; 252 return -ENODEV;
253 253
254 if (cpu_is_omap3630()) {
255 omap3_mpu_pmic.vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
256 omap3_mpu_pmic.vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
257 omap3_core_pmic.vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
258 omap3_core_pmic.vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
259 }
260
261 /* 254 /*
262 * The smartreflex bit on twl4030 specifies if the setting of voltage 255 * The smartreflex bit on twl4030 specifies if the setting of voltage
263 * is done over the I2C_SR path. Since this setting is independent of 256 * is done over the I2C_SR path. Since this setting is independent of