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authorHema HK <hemahk@ti.com>2011-02-28 03:49:36 -0500
committerFelipe Balbi <balbi@ti.com>2011-03-01 04:35:28 -0500
commit8c59ef38119102ccd2a8db6f19a8864a7c8d4e73 (patch)
tree2eb3db1db118811de9200838106d08051b71784b /arch/arm/mach-omap2/omap_phy_internal.c
parent37db3af11f02c2ccdf44a788694da16062a0333c (diff)
usb: otg: OMAP4430: Save/restore the context
Add the context save/restore for the control module register used for OMAP4430 musb with UTMI embedded PHY interface. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_phy_internal.c')
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 3ce675899fce..ebe33df708bd 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -43,6 +43,7 @@
43 43
44static struct clk *phyclk, *clk48m, *clk32k; 44static struct clk *phyclk, *clk48m, *clk32k;
45static void __iomem *ctrl_base; 45static void __iomem *ctrl_base;
46static int usbotghs_control;
46 47
47int omap4430_phy_init(struct device *dev) 48int omap4430_phy_init(struct device *dev)
48{ 49{
@@ -129,6 +130,9 @@ int omap4430_phy_suspend(struct device *dev, int suspend)
129 omap4430_phy_set_clk(dev, 0); 130 omap4430_phy_set_clk(dev, 0);
130 /* Power down the phy */ 131 /* Power down the phy */
131 __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF); 132 __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
133
134 /* save the context */
135 usbotghs_control = __raw_readl(ctrl_base + USBOTGHS_CONTROL);
132 } else { 136 } else {
133 /* Enable the internel phy clcoks */ 137 /* Enable the internel phy clcoks */
134 omap4430_phy_set_clk(dev, 1); 138 omap4430_phy_set_clk(dev, 1);
@@ -137,6 +141,9 @@ int omap4430_phy_suspend(struct device *dev, int suspend)
137 __raw_writel(~PHY_PD, ctrl_base + CONTROL_DEV_CONF); 141 __raw_writel(~PHY_PD, ctrl_base + CONTROL_DEV_CONF);
138 mdelay(200); 142 mdelay(200);
139 } 143 }
144
145 /* restore the context */
146 __raw_writel(usbotghs_control, ctrl_base + USBOTGHS_CONTROL);
140 } 147 }
141 148
142 return 0; 149 return 0;