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authorPaul Walmsley <paul@pwsan.com>2011-09-14 19:23:19 -0400
committerPaul Walmsley <paul@pwsan.com>2011-09-14 19:23:19 -0400
commitd6504acd2125984c61dce24727dd3842d0144015 (patch)
tree8775088801266bebf063a707eaf987051306cdf3 /arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
parent8179488a36985d4929cf89be5d9171145a769511 (diff)
OMAP2+: hwmod: remove OMAP_CHIP*
At Tony's request, remove the OMAP_CHIP* flags from the hwmod data, and replace it instead with chip family, variant, and ES level-specific lists of hwmods to register. Thanks to Gražvydas Ignotas <notasas@gmail.com> for finding a bug in the AM3517/3505 support, and for other review comments. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Gražvydas Ignotas <notasas@gmail.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_3xxx_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c169
1 files changed, 85 insertions, 84 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 25bf43b5a4ec..ab35acbc2d1d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -156,7 +156,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = {
156 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), 156 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters),
157 .slaves = omap3xxx_l3_main_slaves, 157 .slaves = omap3xxx_l3_main_slaves,
158 .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves), 158 .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves),
159 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
160 .flags = HWMOD_NO_IDLEST, 159 .flags = HWMOD_NO_IDLEST,
161}; 160};
162 161
@@ -459,7 +458,6 @@ static struct omap_hwmod omap3xxx_l4_core_hwmod = {
459 .class = &l4_hwmod_class, 458 .class = &l4_hwmod_class,
460 .slaves = omap3xxx_l4_core_slaves, 459 .slaves = omap3xxx_l4_core_slaves,
461 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves), 460 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves),
462 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
463 .flags = HWMOD_NO_IDLEST, 461 .flags = HWMOD_NO_IDLEST,
464}; 462};
465 463
@@ -474,7 +472,6 @@ static struct omap_hwmod omap3xxx_l4_per_hwmod = {
474 .class = &l4_hwmod_class, 472 .class = &l4_hwmod_class,
475 .slaves = omap3xxx_l4_per_slaves, 473 .slaves = omap3xxx_l4_per_slaves,
476 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves), 474 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves),
477 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
478 .flags = HWMOD_NO_IDLEST, 475 .flags = HWMOD_NO_IDLEST,
479}; 476};
480 477
@@ -489,7 +486,6 @@ static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {
489 .class = &l4_hwmod_class, 486 .class = &l4_hwmod_class,
490 .slaves = omap3xxx_l4_wkup_slaves, 487 .slaves = omap3xxx_l4_wkup_slaves,
491 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves), 488 .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves),
492 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
493 .flags = HWMOD_NO_IDLEST, 489 .flags = HWMOD_NO_IDLEST,
494}; 490};
495 491
@@ -505,7 +501,6 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
505 .main_clk = "arm_fck", 501 .main_clk = "arm_fck",
506 .masters = omap3xxx_mpu_masters, 502 .masters = omap3xxx_mpu_masters,
507 .masters_cnt = ARRAY_SIZE(omap3xxx_mpu_masters), 503 .masters_cnt = ARRAY_SIZE(omap3xxx_mpu_masters),
508 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
509}; 504};
510 505
511/* 506/*
@@ -533,7 +528,6 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
533 .class = &iva_hwmod_class, 528 .class = &iva_hwmod_class,
534 .masters = omap3xxx_iva_masters, 529 .masters = omap3xxx_iva_masters,
535 .masters_cnt = ARRAY_SIZE(omap3xxx_iva_masters), 530 .masters_cnt = ARRAY_SIZE(omap3xxx_iva_masters),
536 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
537}; 531};
538 532
539/* timer class */ 533/* timer class */
@@ -613,7 +607,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
613 .slaves = omap3xxx_timer1_slaves, 607 .slaves = omap3xxx_timer1_slaves,
614 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves), 608 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves),
615 .class = &omap3xxx_timer_1ms_hwmod_class, 609 .class = &omap3xxx_timer_1ms_hwmod_class,
616 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
617}; 610};
618 611
619/* timer2 */ 612/* timer2 */
@@ -659,7 +652,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
659 .slaves = omap3xxx_timer2_slaves, 652 .slaves = omap3xxx_timer2_slaves,
660 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves), 653 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves),
661 .class = &omap3xxx_timer_1ms_hwmod_class, 654 .class = &omap3xxx_timer_1ms_hwmod_class,
662 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
663}; 655};
664 656
665/* timer3 */ 657/* timer3 */
@@ -705,7 +697,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
705 .slaves = omap3xxx_timer3_slaves, 697 .slaves = omap3xxx_timer3_slaves,
706 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves), 698 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves),
707 .class = &omap3xxx_timer_hwmod_class, 699 .class = &omap3xxx_timer_hwmod_class,
708 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
709}; 700};
710 701
711/* timer4 */ 702/* timer4 */
@@ -751,7 +742,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
751 .slaves = omap3xxx_timer4_slaves, 742 .slaves = omap3xxx_timer4_slaves,
752 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves), 743 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves),
753 .class = &omap3xxx_timer_hwmod_class, 744 .class = &omap3xxx_timer_hwmod_class,
754 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
755}; 745};
756 746
757/* timer5 */ 747/* timer5 */
@@ -797,7 +787,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
797 .slaves = omap3xxx_timer5_slaves, 787 .slaves = omap3xxx_timer5_slaves,
798 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves), 788 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves),
799 .class = &omap3xxx_timer_hwmod_class, 789 .class = &omap3xxx_timer_hwmod_class,
800 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
801}; 790};
802 791
803/* timer6 */ 792/* timer6 */
@@ -843,7 +832,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
843 .slaves = omap3xxx_timer6_slaves, 832 .slaves = omap3xxx_timer6_slaves,
844 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves), 833 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves),
845 .class = &omap3xxx_timer_hwmod_class, 834 .class = &omap3xxx_timer_hwmod_class,
846 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
847}; 835};
848 836
849/* timer7 */ 837/* timer7 */
@@ -889,7 +877,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
889 .slaves = omap3xxx_timer7_slaves, 877 .slaves = omap3xxx_timer7_slaves,
890 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves), 878 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves),
891 .class = &omap3xxx_timer_hwmod_class, 879 .class = &omap3xxx_timer_hwmod_class,
892 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
893}; 880};
894 881
895/* timer8 */ 882/* timer8 */
@@ -935,7 +922,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
935 .slaves = omap3xxx_timer8_slaves, 922 .slaves = omap3xxx_timer8_slaves,
936 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves), 923 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves),
937 .class = &omap3xxx_timer_hwmod_class, 924 .class = &omap3xxx_timer_hwmod_class,
938 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
939}; 925};
940 926
941/* timer9 */ 927/* timer9 */
@@ -981,7 +967,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
981 .slaves = omap3xxx_timer9_slaves, 967 .slaves = omap3xxx_timer9_slaves,
982 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves), 968 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves),
983 .class = &omap3xxx_timer_hwmod_class, 969 .class = &omap3xxx_timer_hwmod_class,
984 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
985}; 970};
986 971
987/* timer10 */ 972/* timer10 */
@@ -1018,7 +1003,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
1018 .slaves = omap3xxx_timer10_slaves, 1003 .slaves = omap3xxx_timer10_slaves,
1019 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves), 1004 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves),
1020 .class = &omap3xxx_timer_1ms_hwmod_class, 1005 .class = &omap3xxx_timer_1ms_hwmod_class,
1021 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
1022}; 1006};
1023 1007
1024/* timer11 */ 1008/* timer11 */
@@ -1055,7 +1039,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
1055 .slaves = omap3xxx_timer11_slaves, 1039 .slaves = omap3xxx_timer11_slaves,
1056 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves), 1040 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves),
1057 .class = &omap3xxx_timer_hwmod_class, 1041 .class = &omap3xxx_timer_hwmod_class,
1058 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
1059}; 1042};
1060 1043
1061/* timer12*/ 1044/* timer12*/
@@ -1105,7 +1088,6 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
1105 .slaves = omap3xxx_timer12_slaves, 1088 .slaves = omap3xxx_timer12_slaves,
1106 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves), 1089 .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves),
1107 .class = &omap3xxx_timer_hwmod_class, 1090 .class = &omap3xxx_timer_hwmod_class,
1108 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
1109}; 1091};
1110 1092
1111/* l4_wkup -> wd_timer2 */ 1093/* l4_wkup -> wd_timer2 */
@@ -1182,7 +1164,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
1182 }, 1164 },
1183 .slaves = omap3xxx_wd_timer2_slaves, 1165 .slaves = omap3xxx_wd_timer2_slaves,
1184 .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves), 1166 .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves),
1185 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1186 /* 1167 /*
1187 * XXX: Use software supervised mode, HW supervised smartidle seems to 1168 * XXX: Use software supervised mode, HW supervised smartidle seems to
1188 * block CORE power domain idle transitions. Maybe a HW bug in wdt2? 1169 * block CORE power domain idle transitions. Maybe a HW bug in wdt2?
@@ -1213,7 +1194,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
1213 .slaves = omap3xxx_uart1_slaves, 1194 .slaves = omap3xxx_uart1_slaves,
1214 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves), 1195 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves),
1215 .class = &omap2_uart_class, 1196 .class = &omap2_uart_class,
1216 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1217}; 1197};
1218 1198
1219/* UART2 */ 1199/* UART2 */
@@ -1239,7 +1219,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
1239 .slaves = omap3xxx_uart2_slaves, 1219 .slaves = omap3xxx_uart2_slaves,
1240 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves), 1220 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves),
1241 .class = &omap2_uart_class, 1221 .class = &omap2_uart_class,
1242 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1243}; 1222};
1244 1223
1245/* UART3 */ 1224/* UART3 */
@@ -1265,7 +1244,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
1265 .slaves = omap3xxx_uart3_slaves, 1244 .slaves = omap3xxx_uart3_slaves,
1266 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves), 1245 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves),
1267 .class = &omap2_uart_class, 1246 .class = &omap2_uart_class,
1268 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1269}; 1247};
1270 1248
1271/* UART4 */ 1249/* UART4 */
@@ -1302,7 +1280,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
1302 .slaves = omap3xxx_uart4_slaves, 1280 .slaves = omap3xxx_uart4_slaves,
1303 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves), 1281 .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves),
1304 .class = &omap2_uart_class, 1282 .class = &omap2_uart_class,
1305 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
1306}; 1283};
1307 1284
1308static struct omap_hwmod_class i2c_class = { 1285static struct omap_hwmod_class i2c_class = {
@@ -1390,7 +1367,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1390 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves), 1367 .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves),
1391 .masters = omap3xxx_dss_masters, 1368 .masters = omap3xxx_dss_masters,
1392 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), 1369 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1393 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
1394 .flags = HWMOD_NO_IDLEST, 1370 .flags = HWMOD_NO_IDLEST,
1395}; 1371};
1396 1372
@@ -1415,8 +1391,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1415 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_slaves), 1391 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_slaves),
1416 .masters = omap3xxx_dss_masters, 1392 .masters = omap3xxx_dss_masters,
1417 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), 1393 .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1418 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2 |
1419 CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1),
1420}; 1394};
1421 1395
1422/* l4_core -> dss_dispc */ 1396/* l4_core -> dss_dispc */
@@ -1454,9 +1428,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1454 }, 1428 },
1455 .slaves = omap3xxx_dss_dispc_slaves, 1429 .slaves = omap3xxx_dss_dispc_slaves,
1456 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves), 1430 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
1457 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1458 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1459 CHIP_GE_OMAP3630ES1_1),
1460 .flags = HWMOD_NO_IDLEST, 1431 .flags = HWMOD_NO_IDLEST,
1461}; 1432};
1462 1433
@@ -1518,9 +1489,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1518 }, 1489 },
1519 .slaves = omap3xxx_dss_dsi1_slaves, 1490 .slaves = omap3xxx_dss_dsi1_slaves,
1520 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves), 1491 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
1521 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1522 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1523 CHIP_GE_OMAP3630ES1_1),
1524 .flags = HWMOD_NO_IDLEST, 1492 .flags = HWMOD_NO_IDLEST,
1525}; 1493};
1526 1494
@@ -1558,9 +1526,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1558 }, 1526 },
1559 .slaves = omap3xxx_dss_rfbi_slaves, 1527 .slaves = omap3xxx_dss_rfbi_slaves,
1560 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves), 1528 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
1561 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1562 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1563 CHIP_GE_OMAP3630ES1_1),
1564 .flags = HWMOD_NO_IDLEST, 1529 .flags = HWMOD_NO_IDLEST,
1565}; 1530};
1566 1531
@@ -1599,9 +1564,6 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1599 }, 1564 },
1600 .slaves = omap3xxx_dss_venc_slaves, 1565 .slaves = omap3xxx_dss_venc_slaves,
1601 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves), 1566 .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
1602 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
1603 CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
1604 CHIP_GE_OMAP3630ES1_1),
1605 .flags = HWMOD_NO_IDLEST, 1567 .flags = HWMOD_NO_IDLEST,
1606}; 1568};
1607 1569
@@ -1637,7 +1599,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1637 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c1_slaves), 1599 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c1_slaves),
1638 .class = &i2c_class, 1600 .class = &i2c_class,
1639 .dev_attr = &i2c1_dev_attr, 1601 .dev_attr = &i2c1_dev_attr,
1640 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1641}; 1602};
1642 1603
1643/* I2C2 */ 1604/* I2C2 */
@@ -1672,7 +1633,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1672 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c2_slaves), 1633 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c2_slaves),
1673 .class = &i2c_class, 1634 .class = &i2c_class,
1674 .dev_attr = &i2c2_dev_attr, 1635 .dev_attr = &i2c2_dev_attr,
1675 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1676}; 1636};
1677 1637
1678/* I2C3 */ 1638/* I2C3 */
@@ -1718,7 +1678,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1718 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c3_slaves), 1678 .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c3_slaves),
1719 .class = &i2c_class, 1679 .class = &i2c_class,
1720 .dev_attr = &i2c3_dev_attr, 1680 .dev_attr = &i2c3_dev_attr,
1721 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1722}; 1681};
1723 1682
1724/* l4_wkup -> gpio1 */ 1683/* l4_wkup -> gpio1 */
@@ -1880,7 +1839,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
1880 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio1_slaves), 1839 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio1_slaves),
1881 .class = &omap3xxx_gpio_hwmod_class, 1840 .class = &omap3xxx_gpio_hwmod_class,
1882 .dev_attr = &gpio_dev_attr, 1841 .dev_attr = &gpio_dev_attr,
1883 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1884}; 1842};
1885 1843
1886/* gpio2 */ 1844/* gpio2 */
@@ -1912,7 +1870,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
1912 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio2_slaves), 1870 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio2_slaves),
1913 .class = &omap3xxx_gpio_hwmod_class, 1871 .class = &omap3xxx_gpio_hwmod_class,
1914 .dev_attr = &gpio_dev_attr, 1872 .dev_attr = &gpio_dev_attr,
1915 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1916}; 1873};
1917 1874
1918/* gpio3 */ 1875/* gpio3 */
@@ -1944,7 +1901,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
1944 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio3_slaves), 1901 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio3_slaves),
1945 .class = &omap3xxx_gpio_hwmod_class, 1902 .class = &omap3xxx_gpio_hwmod_class,
1946 .dev_attr = &gpio_dev_attr, 1903 .dev_attr = &gpio_dev_attr,
1947 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1948}; 1904};
1949 1905
1950/* gpio4 */ 1906/* gpio4 */
@@ -1976,7 +1932,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
1976 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio4_slaves), 1932 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio4_slaves),
1977 .class = &omap3xxx_gpio_hwmod_class, 1933 .class = &omap3xxx_gpio_hwmod_class,
1978 .dev_attr = &gpio_dev_attr, 1934 .dev_attr = &gpio_dev_attr,
1979 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
1980}; 1935};
1981 1936
1982/* gpio5 */ 1937/* gpio5 */
@@ -2013,7 +1968,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
2013 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio5_slaves), 1968 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio5_slaves),
2014 .class = &omap3xxx_gpio_hwmod_class, 1969 .class = &omap3xxx_gpio_hwmod_class,
2015 .dev_attr = &gpio_dev_attr, 1970 .dev_attr = &gpio_dev_attr,
2016 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2017}; 1971};
2018 1972
2019/* gpio6 */ 1973/* gpio6 */
@@ -2050,7 +2004,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
2050 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio6_slaves), 2004 .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio6_slaves),
2051 .class = &omap3xxx_gpio_hwmod_class, 2005 .class = &omap3xxx_gpio_hwmod_class,
2052 .dev_attr = &gpio_dev_attr, 2006 .dev_attr = &gpio_dev_attr,
2053 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2054}; 2007};
2055 2008
2056/* dma_system -> L3 */ 2009/* dma_system -> L3 */
@@ -2134,7 +2087,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
2134 .masters = omap3xxx_dma_system_masters, 2087 .masters = omap3xxx_dma_system_masters,
2135 .masters_cnt = ARRAY_SIZE(omap3xxx_dma_system_masters), 2088 .masters_cnt = ARRAY_SIZE(omap3xxx_dma_system_masters),
2136 .dev_attr = &dma_dev_attr, 2089 .dev_attr = &dma_dev_attr,
2137 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2138 .flags = HWMOD_NO_IDLEST, 2090 .flags = HWMOD_NO_IDLEST,
2139}; 2091};
2140 2092
@@ -2207,7 +2159,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
2207 }, 2159 },
2208 .slaves = omap3xxx_mcbsp1_slaves, 2160 .slaves = omap3xxx_mcbsp1_slaves,
2209 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_slaves), 2161 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_slaves),
2210 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2211}; 2162};
2212 2163
2213/* mcbsp2 */ 2164/* mcbsp2 */
@@ -2264,7 +2215,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
2264 .slaves = omap3xxx_mcbsp2_slaves, 2215 .slaves = omap3xxx_mcbsp2_slaves,
2265 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves), 2216 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves),
2266 .dev_attr = &omap34xx_mcbsp2_dev_attr, 2217 .dev_attr = &omap34xx_mcbsp2_dev_attr,
2267 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2268}; 2218};
2269 2219
2270/* mcbsp3 */ 2220/* mcbsp3 */
@@ -2321,7 +2271,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
2321 .slaves = omap3xxx_mcbsp3_slaves, 2271 .slaves = omap3xxx_mcbsp3_slaves,
2322 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves), 2272 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves),
2323 .dev_attr = &omap34xx_mcbsp3_dev_attr, 2273 .dev_attr = &omap34xx_mcbsp3_dev_attr,
2324 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2325}; 2274};
2326 2275
2327/* mcbsp4 */ 2276/* mcbsp4 */
@@ -2379,7 +2328,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
2379 }, 2328 },
2380 .slaves = omap3xxx_mcbsp4_slaves, 2329 .slaves = omap3xxx_mcbsp4_slaves,
2381 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_slaves), 2330 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_slaves),
2382 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2383}; 2331};
2384 2332
2385/* mcbsp5 */ 2333/* mcbsp5 */
@@ -2437,7 +2385,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
2437 }, 2385 },
2438 .slaves = omap3xxx_mcbsp5_slaves, 2386 .slaves = omap3xxx_mcbsp5_slaves,
2439 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_slaves), 2387 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_slaves),
2440 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2441}; 2388};
2442/* 'mcbsp sidetone' class */ 2389/* 'mcbsp sidetone' class */
2443 2390
@@ -2498,7 +2445,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
2498 }, 2445 },
2499 .slaves = omap3xxx_mcbsp2_sidetone_slaves, 2446 .slaves = omap3xxx_mcbsp2_sidetone_slaves,
2500 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves), 2447 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves),
2501 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2502}; 2448};
2503 2449
2504/* mcbsp3_sidetone */ 2450/* mcbsp3_sidetone */
@@ -2547,7 +2493,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
2547 }, 2493 },
2548 .slaves = omap3xxx_mcbsp3_sidetone_slaves, 2494 .slaves = omap3xxx_mcbsp3_sidetone_slaves,
2549 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves), 2495 .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves),
2550 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2551}; 2496};
2552 2497
2553 2498
@@ -2609,9 +2554,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
2609 }, 2554 },
2610 .slaves = omap3_sr1_slaves, 2555 .slaves = omap3_sr1_slaves,
2611 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), 2556 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
2612 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
2613 CHIP_IS_OMAP3430ES3_0 |
2614 CHIP_IS_OMAP3430ES3_1),
2615 .flags = HWMOD_SET_DEFAULT_CLOCKACT, 2557 .flags = HWMOD_SET_DEFAULT_CLOCKACT,
2616}; 2558};
2617 2559
@@ -2631,7 +2573,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
2631 }, 2573 },
2632 .slaves = omap3_sr1_slaves, 2574 .slaves = omap3_sr1_slaves,
2633 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), 2575 .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
2634 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
2635}; 2576};
2636 2577
2637/* SR2 */ 2578/* SR2 */
@@ -2655,9 +2596,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
2655 }, 2596 },
2656 .slaves = omap3_sr2_slaves, 2597 .slaves = omap3_sr2_slaves,
2657 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), 2598 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
2658 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
2659 CHIP_IS_OMAP3430ES3_0 |
2660 CHIP_IS_OMAP3430ES3_1),
2661 .flags = HWMOD_SET_DEFAULT_CLOCKACT, 2599 .flags = HWMOD_SET_DEFAULT_CLOCKACT,
2662}; 2600};
2663 2601
@@ -2677,7 +2615,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
2677 }, 2615 },
2678 .slaves = omap3_sr2_slaves, 2616 .slaves = omap3_sr2_slaves,
2679 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), 2617 .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
2680 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
2681}; 2618};
2682 2619
2683/* 2620/*
@@ -2745,7 +2682,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
2745 }, 2682 },
2746 .slaves = omap3xxx_mailbox_slaves, 2683 .slaves = omap3xxx_mailbox_slaves,
2747 .slaves_cnt = ARRAY_SIZE(omap3xxx_mailbox_slaves), 2684 .slaves_cnt = ARRAY_SIZE(omap3xxx_mailbox_slaves),
2748 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2749}; 2685};
2750 2686
2751/* l4 core -> mcspi1 interface */ 2687/* l4 core -> mcspi1 interface */
@@ -2843,7 +2779,6 @@ static struct omap_hwmod omap34xx_mcspi1 = {
2843 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi1_slaves), 2779 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi1_slaves),
2844 .class = &omap34xx_mcspi_class, 2780 .class = &omap34xx_mcspi_class,
2845 .dev_attr = &omap_mcspi1_dev_attr, 2781 .dev_attr = &omap_mcspi1_dev_attr,
2846 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2847}; 2782};
2848 2783
2849/* mcspi2 */ 2784/* mcspi2 */
@@ -2873,7 +2808,6 @@ static struct omap_hwmod omap34xx_mcspi2 = {
2873 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi2_slaves), 2808 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi2_slaves),
2874 .class = &omap34xx_mcspi_class, 2809 .class = &omap34xx_mcspi_class,
2875 .dev_attr = &omap_mcspi2_dev_attr, 2810 .dev_attr = &omap_mcspi2_dev_attr,
2876 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2877}; 2811};
2878 2812
2879/* mcspi3 */ 2813/* mcspi3 */
@@ -2916,7 +2850,6 @@ static struct omap_hwmod omap34xx_mcspi3 = {
2916 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi3_slaves), 2850 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi3_slaves),
2917 .class = &omap34xx_mcspi_class, 2851 .class = &omap34xx_mcspi_class,
2918 .dev_attr = &omap_mcspi3_dev_attr, 2852 .dev_attr = &omap_mcspi3_dev_attr,
2919 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2920}; 2853};
2921 2854
2922/* SPI4 */ 2855/* SPI4 */
@@ -2957,7 +2890,6 @@ static struct omap_hwmod omap34xx_mcspi4 = {
2957 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi4_slaves), 2890 .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi4_slaves),
2958 .class = &omap34xx_mcspi_class, 2891 .class = &omap34xx_mcspi_class,
2959 .dev_attr = &omap_mcspi4_dev_attr, 2892 .dev_attr = &omap_mcspi4_dev_attr,
2960 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
2961}; 2893};
2962 2894
2963/* 2895/*
@@ -3014,7 +2946,6 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
3014 */ 2946 */
3015 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 2947 .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
3016 | HWMOD_SWSUP_MSTANDBY, 2948 | HWMOD_SWSUP_MSTANDBY,
3017 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
3018}; 2949};
3019 2950
3020/* usb_otg_hs */ 2951/* usb_otg_hs */
@@ -3042,7 +2973,6 @@ static struct omap_hwmod am35xx_usbhsotg_hwmod = {
3042 .slaves = am35xx_usbhsotg_slaves, 2973 .slaves = am35xx_usbhsotg_slaves,
3043 .slaves_cnt = ARRAY_SIZE(am35xx_usbhsotg_slaves), 2974 .slaves_cnt = ARRAY_SIZE(am35xx_usbhsotg_slaves),
3044 .class = &am35xx_usbotg_class, 2975 .class = &am35xx_usbotg_class,
3045 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1)
3046}; 2976};
3047 2977
3048/* MMC/SD/SDIO common */ 2978/* MMC/SD/SDIO common */
@@ -3108,7 +3038,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = {
3108 .slaves = omap3xxx_mmc1_slaves, 3038 .slaves = omap3xxx_mmc1_slaves,
3109 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves), 3039 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
3110 .class = &omap34xx_mmc_class, 3040 .class = &omap34xx_mmc_class,
3111 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
3112}; 3041};
3113 3042
3114/* MMC/SD/SDIO2 */ 3043/* MMC/SD/SDIO2 */
@@ -3151,7 +3080,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = {
3151 .slaves = omap3xxx_mmc2_slaves, 3080 .slaves = omap3xxx_mmc2_slaves,
3152 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves), 3081 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
3153 .class = &omap34xx_mmc_class, 3082 .class = &omap34xx_mmc_class,
3154 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
3155}; 3083};
3156 3084
3157/* MMC/SD/SDIO3 */ 3085/* MMC/SD/SDIO3 */
@@ -3193,7 +3121,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
3193 .slaves = omap3xxx_mmc3_slaves, 3121 .slaves = omap3xxx_mmc3_slaves,
3194 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc3_slaves), 3122 .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc3_slaves),
3195 .class = &omap34xx_mmc_class, 3123 .class = &omap34xx_mmc_class,
3196 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
3197}; 3124};
3198 3125
3199static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { 3126static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
@@ -3224,10 +3151,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3224 &omap3xxx_uart1_hwmod, 3151 &omap3xxx_uart1_hwmod,
3225 &omap3xxx_uart2_hwmod, 3152 &omap3xxx_uart2_hwmod,
3226 &omap3xxx_uart3_hwmod, 3153 &omap3xxx_uart3_hwmod,
3227 &omap3xxx_uart4_hwmod,
3228 /* dss class */ 3154 /* dss class */
3229 &omap3430es1_dss_core_hwmod,
3230 &omap3xxx_dss_core_hwmod,
3231 &omap3xxx_dss_dispc_hwmod, 3155 &omap3xxx_dss_dispc_hwmod,
3232 &omap3xxx_dss_dsi1_hwmod, 3156 &omap3xxx_dss_dsi1_hwmod,
3233 &omap3xxx_dss_rfbi_hwmod, 3157 &omap3xxx_dss_rfbi_hwmod,
@@ -3239,9 +3163,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3239 &omap3xxx_i2c3_hwmod, 3163 &omap3xxx_i2c3_hwmod,
3240 &omap34xx_sr1_hwmod, 3164 &omap34xx_sr1_hwmod,
3241 &omap34xx_sr2_hwmod, 3165 &omap34xx_sr2_hwmod,
3242 &omap36xx_sr1_hwmod,
3243 &omap36xx_sr2_hwmod,
3244
3245 3166
3246 /* gpio class */ 3167 /* gpio class */
3247 &omap3xxx_gpio1_hwmod, 3168 &omap3xxx_gpio1_hwmod,
@@ -3272,16 +3193,96 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
3272 &omap34xx_mcspi3, 3193 &omap34xx_mcspi3,
3273 &omap34xx_mcspi4, 3194 &omap34xx_mcspi4,
3274 3195
3275 /* usbotg class */ 3196 NULL,
3197};
3198
3199/* 3430ES1-only hwmods */
3200static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
3201 &omap3430es1_dss_core_hwmod,
3202 NULL
3203};
3204
3205/* 3430ES2+-only hwmods */
3206static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
3207 &omap3xxx_dss_core_hwmod,
3276 &omap3xxx_usbhsotg_hwmod, 3208 &omap3xxx_usbhsotg_hwmod,
3209 NULL
3210};
3277 3211
3278 /* usbotg for am35x */ 3212/* 34xx-only hwmods (all ES revisions) */
3279 &am35xx_usbhsotg_hwmod, 3213static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
3214 &omap34xx_sr1_hwmod,
3215 &omap34xx_sr2_hwmod,
3216 NULL
3217};
3280 3218
3281 NULL, 3219/* 36xx-only hwmods (all ES revisions) */
3220static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
3221 &omap3xxx_uart4_hwmod,
3222 &omap3xxx_dss_core_hwmod,
3223 &omap36xx_sr1_hwmod,
3224 &omap36xx_sr2_hwmod,
3225 &omap3xxx_usbhsotg_hwmod,
3226 NULL
3227};
3228
3229static __initdata struct omap_hwmod *am35xx_hwmods[] = {
3230 &omap3xxx_dss_core_hwmod, /* XXX ??? */
3231 &am35xx_usbhsotg_hwmod,
3232 NULL
3282}; 3233};
3283 3234
3284int __init omap3xxx_hwmod_init(void) 3235int __init omap3xxx_hwmod_init(void)
3285{ 3236{
3286 return omap_hwmod_register(omap3xxx_hwmods); 3237 int r;
3238 struct omap_hwmod **h = NULL;
3239 unsigned int rev;
3240
3241 /* Register hwmods common to all OMAP3 */
3242 r = omap_hwmod_register(omap3xxx_hwmods);
3243 if (!r)
3244 return r;
3245
3246 rev = omap_rev();
3247
3248 /*
3249 * Register hwmods common to individual OMAP3 families, all
3250 * silicon revisions (e.g., 34xx, or AM3505/3517, or 36xx)
3251 * All possible revisions should be included in this conditional.
3252 */
3253 if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
3254 rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||
3255 rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {
3256 h = omap34xx_hwmods;
3257 } else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) {
3258 h = am35xx_hwmods;
3259 } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||
3260 rev == OMAP3630_REV_ES1_2) {
3261 h = omap36xx_hwmods;
3262 } else {
3263 WARN(1, "OMAP3 hwmod family init: unknown chip type\n");
3264 return -EINVAL;
3265 };
3266
3267 r = omap_hwmod_register(h);
3268 if (!r)
3269 return r;
3270
3271 /*
3272 * Register hwmods specific to certain ES levels of a
3273 * particular family of silicon (e.g., 34xx ES1.0)
3274 */
3275 h = NULL;
3276 if (rev == OMAP3430_REV_ES1_0) {
3277 h = omap3430es1_hwmods;
3278 } else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 ||
3279 rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
3280 rev == OMAP3430_REV_ES3_1_2) {
3281 h = omap3430es2plus_hwmods;
3282 };
3283
3284 if (h)
3285 r = omap_hwmod_register(h);
3286
3287 return r;
3287} 3288}