diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-30 19:23:59 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-30 19:23:59 -0500 |
commit | cd5b49bce361caeb7488f5fa801326bcd799f6f2 (patch) | |
tree | 37063123bc28d0de6d8639be6d11273b6f792675 /arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |
parent | 8cd7920370a3715ccbd1c98bf33f172b8837dc0b (diff) | |
parent | 98014be39bda8277a5ad130bb274ed6eb18b74df (diff) |
Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits)
ARM: ux500: update defconfig
ARM: u300: update defconfig
ARM: at91: enable additional boards in existing soc defconfig files
ARM: at91: refresh soc defconfig files for 3.2
ARM: at91: rename defconfig files appropriately
ARM: OMAP2+: Fix Compilation error when omap_l3_noc built as module
ARM: OMAP2+: Remove empty io.h
ARM: OMAP2: select ARM_AMBA if OMAP3_EMU is defined
ARM: OMAP: smartreflex: fix IRQ handling bug
ARM: OMAP: PM: only register TWL with voltage layer when device is present
ARM: OMAP: hwmod: Fix the addr space, irq, dma count APIs
arm: mx28: fix bit operation in clock setting
ARM: imx: export imx_ioremap
ARM: imx/mm-imx3: conditionally compile i.MX31 and i.MX35 code
ARM: mx5: Fix checkpatch warnings in cpu-imx5.c
MAINTAINERS: Add missing directory
ARM: imx: drop 'ARCH_MX31' and 'ARCH_MX35'
ARM: imx6q: move clock register map to machine_desc.map_io
ARM: pxa168/gplugd: add the correct SSP device
ARM: Update mach-types to fix mxs build breakage
...
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_3xxx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 37 |
1 files changed, 32 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index bc9035ec87fc..7f8915ad5099 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -1369,9 +1369,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = { | |||
1369 | }; | 1369 | }; |
1370 | 1370 | ||
1371 | static struct omap_hwmod_opt_clk dss_opt_clks[] = { | 1371 | static struct omap_hwmod_opt_clk dss_opt_clks[] = { |
1372 | { .role = "tv_clk", .clk = "dss_tv_fck" }, | 1372 | /* |
1373 | { .role = "video_clk", .clk = "dss_96m_fck" }, | 1373 | * The DSS HW needs all DSS clocks enabled during reset. The dss_core |
1374 | * driver does not use these clocks. | ||
1375 | */ | ||
1374 | { .role = "sys_clk", .clk = "dss2_alwon_fck" }, | 1376 | { .role = "sys_clk", .clk = "dss2_alwon_fck" }, |
1377 | { .role = "tv_clk", .clk = "dss_tv_fck" }, | ||
1378 | /* required only on OMAP3430 */ | ||
1379 | { .role = "tv_dac_clk", .clk = "dss_96m_fck" }, | ||
1375 | }; | 1380 | }; |
1376 | 1381 | ||
1377 | static struct omap_hwmod omap3430es1_dss_core_hwmod = { | 1382 | static struct omap_hwmod omap3430es1_dss_core_hwmod = { |
@@ -1394,11 +1399,12 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { | |||
1394 | .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves), | 1399 | .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves), |
1395 | .masters = omap3xxx_dss_masters, | 1400 | .masters = omap3xxx_dss_masters, |
1396 | .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), | 1401 | .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), |
1397 | .flags = HWMOD_NO_IDLEST, | 1402 | .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
1398 | }; | 1403 | }; |
1399 | 1404 | ||
1400 | static struct omap_hwmod omap3xxx_dss_core_hwmod = { | 1405 | static struct omap_hwmod omap3xxx_dss_core_hwmod = { |
1401 | .name = "dss_core", | 1406 | .name = "dss_core", |
1407 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1402 | .class = &omap2_dss_hwmod_class, | 1408 | .class = &omap2_dss_hwmod_class, |
1403 | .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ | 1409 | .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ |
1404 | .sdma_reqs = omap3xxx_dss_sdma_chs, | 1410 | .sdma_reqs = omap3xxx_dss_sdma_chs, |
@@ -1456,6 +1462,7 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { | |||
1456 | .slaves = omap3xxx_dss_dispc_slaves, | 1462 | .slaves = omap3xxx_dss_dispc_slaves, |
1457 | .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves), | 1463 | .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves), |
1458 | .flags = HWMOD_NO_IDLEST, | 1464 | .flags = HWMOD_NO_IDLEST, |
1465 | .dev_attr = &omap2_3_dss_dispc_dev_attr | ||
1459 | }; | 1466 | }; |
1460 | 1467 | ||
1461 | /* | 1468 | /* |
@@ -1486,6 +1493,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { | |||
1486 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { | 1493 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { |
1487 | .master = &omap3xxx_l4_core_hwmod, | 1494 | .master = &omap3xxx_l4_core_hwmod, |
1488 | .slave = &omap3xxx_dss_dsi1_hwmod, | 1495 | .slave = &omap3xxx_dss_dsi1_hwmod, |
1496 | .clk = "dss_ick", | ||
1489 | .addr = omap3xxx_dss_dsi1_addrs, | 1497 | .addr = omap3xxx_dss_dsi1_addrs, |
1490 | .fw = { | 1498 | .fw = { |
1491 | .omap2 = { | 1499 | .omap2 = { |
@@ -1502,6 +1510,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = { | |||
1502 | &omap3xxx_l4_core__dss_dsi1, | 1510 | &omap3xxx_l4_core__dss_dsi1, |
1503 | }; | 1511 | }; |
1504 | 1512 | ||
1513 | static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { | ||
1514 | { .role = "sys_clk", .clk = "dss2_alwon_fck" }, | ||
1515 | }; | ||
1516 | |||
1505 | static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { | 1517 | static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { |
1506 | .name = "dss_dsi1", | 1518 | .name = "dss_dsi1", |
1507 | .class = &omap3xxx_dsi_hwmod_class, | 1519 | .class = &omap3xxx_dsi_hwmod_class, |
@@ -1514,6 +1526,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { | |||
1514 | .module_offs = OMAP3430_DSS_MOD, | 1526 | .module_offs = OMAP3430_DSS_MOD, |
1515 | }, | 1527 | }, |
1516 | }, | 1528 | }, |
1529 | .opt_clks = dss_dsi1_opt_clks, | ||
1530 | .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), | ||
1517 | .slaves = omap3xxx_dss_dsi1_slaves, | 1531 | .slaves = omap3xxx_dss_dsi1_slaves, |
1518 | .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves), | 1532 | .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves), |
1519 | .flags = HWMOD_NO_IDLEST, | 1533 | .flags = HWMOD_NO_IDLEST, |
@@ -1540,6 +1554,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = { | |||
1540 | &omap3xxx_l4_core__dss_rfbi, | 1554 | &omap3xxx_l4_core__dss_rfbi, |
1541 | }; | 1555 | }; |
1542 | 1556 | ||
1557 | static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { | ||
1558 | { .role = "ick", .clk = "dss_ick" }, | ||
1559 | }; | ||
1560 | |||
1543 | static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { | 1561 | static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { |
1544 | .name = "dss_rfbi", | 1562 | .name = "dss_rfbi", |
1545 | .class = &omap2_rfbi_hwmod_class, | 1563 | .class = &omap2_rfbi_hwmod_class, |
@@ -1551,6 +1569,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { | |||
1551 | .module_offs = OMAP3430_DSS_MOD, | 1569 | .module_offs = OMAP3430_DSS_MOD, |
1552 | }, | 1570 | }, |
1553 | }, | 1571 | }, |
1572 | .opt_clks = dss_rfbi_opt_clks, | ||
1573 | .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), | ||
1554 | .slaves = omap3xxx_dss_rfbi_slaves, | 1574 | .slaves = omap3xxx_dss_rfbi_slaves, |
1555 | .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves), | 1575 | .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves), |
1556 | .flags = HWMOD_NO_IDLEST, | 1576 | .flags = HWMOD_NO_IDLEST, |
@@ -1560,7 +1580,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { | |||
1560 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { | 1580 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { |
1561 | .master = &omap3xxx_l4_core_hwmod, | 1581 | .master = &omap3xxx_l4_core_hwmod, |
1562 | .slave = &omap3xxx_dss_venc_hwmod, | 1582 | .slave = &omap3xxx_dss_venc_hwmod, |
1563 | .clk = "dss_tv_fck", | 1583 | .clk = "dss_ick", |
1564 | .addr = omap2_dss_venc_addrs, | 1584 | .addr = omap2_dss_venc_addrs, |
1565 | .fw = { | 1585 | .fw = { |
1566 | .omap2 = { | 1586 | .omap2 = { |
@@ -1578,10 +1598,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = { | |||
1578 | &omap3xxx_l4_core__dss_venc, | 1598 | &omap3xxx_l4_core__dss_venc, |
1579 | }; | 1599 | }; |
1580 | 1600 | ||
1601 | static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = { | ||
1602 | /* required only on OMAP3430 */ | ||
1603 | { .role = "tv_dac_clk", .clk = "dss_96m_fck" }, | ||
1604 | }; | ||
1605 | |||
1581 | static struct omap_hwmod omap3xxx_dss_venc_hwmod = { | 1606 | static struct omap_hwmod omap3xxx_dss_venc_hwmod = { |
1582 | .name = "dss_venc", | 1607 | .name = "dss_venc", |
1583 | .class = &omap2_venc_hwmod_class, | 1608 | .class = &omap2_venc_hwmod_class, |
1584 | .main_clk = "dss1_alwon_fck", | 1609 | .main_clk = "dss_tv_fck", |
1585 | .prcm = { | 1610 | .prcm = { |
1586 | .omap2 = { | 1611 | .omap2 = { |
1587 | .prcm_reg_id = 1, | 1612 | .prcm_reg_id = 1, |
@@ -1589,6 +1614,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = { | |||
1589 | .module_offs = OMAP3430_DSS_MOD, | 1614 | .module_offs = OMAP3430_DSS_MOD, |
1590 | }, | 1615 | }, |
1591 | }, | 1616 | }, |
1617 | .opt_clks = dss_venc_opt_clks, | ||
1618 | .opt_clks_cnt = ARRAY_SIZE(dss_venc_opt_clks), | ||
1592 | .slaves = omap3xxx_dss_venc_slaves, | 1619 | .slaves = omap3xxx_dss_venc_slaves, |
1593 | .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves), | 1620 | .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves), |
1594 | .flags = HWMOD_NO_IDLEST, | 1621 | .flags = HWMOD_NO_IDLEST, |