Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

1 files changed, 50 insertions, 9 deletions

diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 13dc9794dcc2..9ef8c29dd817 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -26,26 +26,42 @@
 void __iomem *l2cache_base;
 #endif
 
-void __iomem *gic_cpu_base_addr;
 void __iomem *gic_dist_base_addr;
 
 
 void __init gic_init_irq(void)
 {
+        void __iomem *gic_cpu_base;
+
         /* Static mapping, never released */
         gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
         BUG_ON(!gic_dist_base_addr);
-        gic_dist_init(0, gic_dist_base_addr, 29);
 
         /* Static mapping, never released */
-        gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
-        BUG_ON(!gic_cpu_base_addr);
-        gic_cpu_init(0, gic_cpu_base_addr);
+        gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+        BUG_ON(!gic_cpu_base);
+
+        gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
 }
 
 #ifdef CONFIG_CACHE_L2X0
+
+static void omap4_l2x0_disable(void)
+{
+        /* Disable PL310 L2 Cache controller */
+        omap_smc1(0x102, 0x0);
+}
+
+static void omap4_l2x0_set_debug(unsigned long val)
+{
+        /* Program PL310 L2 Cache controller debug register */
+        omap_smc1(0x100, val);
+}
+
 static int __init omap_l2_cache_init(void)
 {
+        u32 aux_ctrl = 0;
+
         /*
          * To avoid code running on other OMAPs in
          * multi-omap builds
@@ -57,14 +73,39 @@ static int __init omap_l2_cache_init(void)
         l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
         BUG_ON(!l2cache_base);
 
+        /*
+         * 16-way associativity, parity disabled
+         * Way size - 32KB (es1.0)
+         * Way size - 64KB (es2.0 +)
+         */
+        aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
+                        (0x1 << 25) |
+                        (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) |
+                        (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT));
+
+        if (omap_rev() == OMAP4430_REV_ES1_0) {
+                aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
+        } else {
+                aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
+                        (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
+                        (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
+                        (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
+                        (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
+        }
+        if (omap_rev() != OMAP4430_REV_ES1_0)
+                omap_smc1(0x109, aux_ctrl);
+
         /* Enable PL310 L2 Cache controller */
         omap_smc1(0x102, 0x1);
 
+        l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
+
         /*
-         * 32KB way size, 16-way associativity,
-         * parity disabled
-         */
-        l2x0_init(l2cache_base, 0x0e050000, 0xc0000fff);
+         * Override default outer_cache.disable with a OMAP4
+         * specific one
+        */
+        outer_cache.disable = omap4_l2x0_disable;
+        outer_cache.set_debug = omap4_l2x0_set_debug;
 
         return 0;
 }