diff options
author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2013-02-10 03:24:00 -0500 |
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committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2013-03-28 03:25:59 -0400 |
commit | b699ddd19bf3542d43ffe293c6148161e160b1bc (patch) | |
tree | 3557753f8df2a4cefe686b58b9275a31c1c0168e /arch/arm/mach-omap2/omap-smp.c | |
parent | 2f82bd7814eeb553aaf63c202ba655e82350000a (diff) |
ARM: OMAP4+: Move the CPU wakeup prepare code under smp_prepare_cpus()
Move the secondary CPU wakeup prepare code under smp_prepare_cpus() where it
belongs. It was remainder of the pen release code which was borrowed from
ARM code initially.
While at it drop the un-necessary sev() and barrier which was under
prepare code.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap-smp.c')
-rw-r--r-- | arch/arm/mach-omap2/omap-smp.c | 51 |
1 files changed, 20 insertions, 31 deletions
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 1e14899dbbf5..0cbb677c4df4 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
@@ -164,36 +164,6 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct * | |||
164 | return 0; | 164 | return 0; |
165 | } | 165 | } |
166 | 166 | ||
167 | static void __init wakeup_secondary(void) | ||
168 | { | ||
169 | void *startup_addr = omap_secondary_startup; | ||
170 | void __iomem *base = omap_get_wakeupgen_base(); | ||
171 | |||
172 | if (cpu_is_omap446x()) { | ||
173 | startup_addr = omap_secondary_startup_4460; | ||
174 | pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD; | ||
175 | } | ||
176 | |||
177 | /* | ||
178 | * Write the address of secondary startup routine into the | ||
179 | * AuxCoreBoot1 where ROM code will jump and start executing | ||
180 | * on secondary core once out of WFE | ||
181 | * A barrier is added to ensure that write buffer is drained | ||
182 | */ | ||
183 | if (omap_secure_apis_support()) | ||
184 | omap_auxcoreboot_addr(virt_to_phys(startup_addr)); | ||
185 | else | ||
186 | __raw_writel(virt_to_phys(omap5_secondary_startup), | ||
187 | base + OMAP_AUX_CORE_BOOT_1); | ||
188 | |||
189 | /* | ||
190 | * Send a 'sev' to wake the secondary core from WFE. | ||
191 | * Drain the outstanding writes to memory | ||
192 | */ | ||
193 | dsb_sev(); | ||
194 | mb(); | ||
195 | } | ||
196 | |||
197 | /* | 167 | /* |
198 | * Initialise the CPU possible map early - this describes the CPUs | 168 | * Initialise the CPU possible map early - this describes the CPUs |
199 | * which may be present or become present in the system. | 169 | * which may be present or become present in the system. |
@@ -229,6 +199,8 @@ static void __init omap4_smp_init_cpus(void) | |||
229 | 199 | ||
230 | static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) | 200 | static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) |
231 | { | 201 | { |
202 | void *startup_addr = omap_secondary_startup; | ||
203 | void __iomem *base = omap_get_wakeupgen_base(); | ||
232 | 204 | ||
233 | /* | 205 | /* |
234 | * Initialise the SCU and wake up the secondary core using | 206 | * Initialise the SCU and wake up the secondary core using |
@@ -236,7 +208,24 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) | |||
236 | */ | 208 | */ |
237 | if (scu_base) | 209 | if (scu_base) |
238 | scu_enable(scu_base); | 210 | scu_enable(scu_base); |
239 | wakeup_secondary(); | 211 | |
212 | if (cpu_is_omap446x()) { | ||
213 | startup_addr = omap_secondary_startup_4460; | ||
214 | pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD; | ||
215 | } | ||
216 | |||
217 | /* | ||
218 | * Write the address of secondary startup routine into the | ||
219 | * AuxCoreBoot1 where ROM code will jump and start executing | ||
220 | * on secondary core once out of WFE | ||
221 | * A barrier is added to ensure that write buffer is drained | ||
222 | */ | ||
223 | if (omap_secure_apis_support()) | ||
224 | omap_auxcoreboot_addr(virt_to_phys(startup_addr)); | ||
225 | else | ||
226 | __raw_writel(virt_to_phys(omap5_secondary_startup), | ||
227 | base + OMAP_AUX_CORE_BOOT_1); | ||
228 | |||
240 | } | 229 | } |
241 | 230 | ||
242 | struct smp_operations omap4_smp_ops __initdata = { | 231 | struct smp_operations omap4_smp_ops __initdata = { |