Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits)
  [ARM] 3541/2: workaround for PXA27x erratum E7
  [ARM] nommu: provide a way for correct control register value selection
  [ARM] 3705/1: add supersection support to ioremap()
  [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure
  [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support
  [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency
  [ARM] 3703/1: Add help description for ARCH_EP80219
  [ARM] 3678/1: MMC: Make OMAP MMC work
  [ARM] 3677/1: OMAP: Update H2 defconfig
  [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1
  [ARM] Add section support to ioremap
  [ARM] Fix sa11x0 SDRAM selection
  [ARM] Set bit 4 on section mappings correctly depending on CPU
  [ARM] 3666/1: TRIZEPS4 [1/5] core
  ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring
  ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE
  ARM: OMAP: Update dmtimers
  ARM: OMAP: Make clock variables static
  ARM: OMAP: Fix GPMC compilation when DEBUG is defined
  ARM: OMAP: Mux updates for external DMA and GPIO
  ...

1 files changed, 32 insertions, 6 deletions

diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 4c5f2c04883e..60ef084faffd 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -52,6 +52,12 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ",	0x12c,	0,	1,	1,	1)
 /* 24xx clocks */
 MUX_CFG_24XX("W14_24XX_SYS_CLKOUT",     0x137,  0,      1,      1,      1)
 
+/* 24xx GPMC wait pin monitoring */
+MUX_CFG_24XX("L3_GPMC_WAIT0",           0x09a,  0,      1,      1,      1)
+MUX_CFG_24XX("N7_GPMC_WAIT1",           0x09b,  0,      1,      1,      1)
+MUX_CFG_24XX("M1_GPMC_WAIT2",           0x09c,  0,      1,      1,      1)
+MUX_CFG_24XX("P1_GPMC_WAIT3",           0x09d,  0,      1,      1,      1)
+
 /* 24xx McBSP */
 MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX",    0x124,  1,      1,      0,      1)
 MUX_CFG_24XX("R14_24XX_MCBSP2_FSX",     0x125,  1,      1,      0,      1)
@@ -59,18 +65,38 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR",	0x126,	1,	1,	0,	1)
 MUX_CFG_24XX("V15_24XX_MCBSP2_DX",      0x127,  1,      1,      0,      1)
 
 /* 24xx GPIO */
-MUX_CFG_24XX("M21_242X_GPIO11",  0x0c9,  3,      1,      1,      1)
+MUX_CFG_24XX("M21_242X_GPIO11",         0x0c9,  3,      1,      1,      1)
 MUX_CFG_24XX("AA10_242X_GPIO13",        0x0e5,  3,      0,      0,      1)
-MUX_CFG_24XX("AA6_242X_GPIO14",  0x0e6,  3,      0,      0,      1)
-MUX_CFG_24XX("AA4_242X_GPIO15",  0x0e7,  3,      0,      0,      1)
-MUX_CFG_24XX("Y11_242X_GPIO16",  0x0e8,  3,      0,      0,      1)
+MUX_CFG_24XX("AA6_242X_GPIO14",         0x0e6,  3,      0,      0,      1)
+MUX_CFG_24XX("AA4_242X_GPIO15",         0x0e7,  3,      0,      0,      1)
+MUX_CFG_24XX("Y11_242X_GPIO16",         0x0e8,  3,      0,      0,      1)
 MUX_CFG_24XX("AA12_242X_GPIO17",        0x0e9,  3,      0,      0,      1)
-MUX_CFG_24XX("AA8_242X_GPIO58",  0x0ea,  3,      0,      0,      1)
+MUX_CFG_24XX("AA8_242X_GPIO58",         0x0ea,  3,      0,      0,      1)
 MUX_CFG_24XX("Y20_24XX_GPIO60",         0x12c,  3,      0,      0,      1)
-MUX_CFG_24XX("W4__24XX_GPIO74",  0x0f2,  3,      0,      0,      1)
+MUX_CFG_24XX("W4__24XX_GPIO74",         0x0f2,  3,      0,      0,      1)
 MUX_CFG_24XX("M15_24XX_GPIO92",         0x10a,  3,      0,      0,      1)
 MUX_CFG_24XX("V14_24XX_GPIO117",        0x128,  3,      1,      0,      1)
 
+/* 242x DBG GPIO */
+MUX_CFG_24XX("V4_242X_GPIO49",          0xd3,   3,      0,      0,      1)
+MUX_CFG_24XX("W2_242X_GPIO50",          0xd4,   3,      0,      0,      1)
+MUX_CFG_24XX("U4_242X_GPIO51",          0xd5,   3,      0,      0,      1)
+MUX_CFG_24XX("V3_242X_GPIO52",          0xd6,   3,      0,      0,      1)
+MUX_CFG_24XX("V2_242X_GPIO53",          0xd7,   3,      0,      0,      1)
+MUX_CFG_24XX("V6_242X_GPIO53",          0xcf,   3,      0,      0,      1)
+MUX_CFG_24XX("T4_242X_GPIO54",          0xd8,   3,      0,      0,      1)
+MUX_CFG_24XX("Y4_242X_GPIO54",          0xd0,   3,      0,      0,      1)
+MUX_CFG_24XX("T3_242X_GPIO55",          0xd9,   3,      0,      0,      1)
+MUX_CFG_24XX("U2_242X_GPIO56",          0xda,   3,      0,      0,      1)
+
+/* 24xx external DMA requests */
+MUX_CFG_24XX("AA10_242X_DMAREQ0",       0x0e5,  2,      0,      0,      1)
+MUX_CFG_24XX("AA6_242X_DMAREQ1",        0x0e6,  2,      0,      0,      1)
+MUX_CFG_24XX("E4_242X_DMAREQ2",         0x074,  2,      0,      0,      1)
+MUX_CFG_24XX("G4_242X_DMAREQ3",         0x073,  2,      0,      0,      1)
+MUX_CFG_24XX("D3_242X_DMAREQ4",         0x072,  2,      0,      0,      1)
+MUX_CFG_24XX("E3_242X_DMAREQ5",         0x071,  2,      0,      0,      1)
+
 /* TSC IRQ */
 MUX_CFG_24XX("P20_24XX_TSC_IRQ",        0x108,  0,      0,      0,      1)