diff options
| author | Tony Lindgren <tony@atomide.com> | 2012-05-08 19:31:13 -0400 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2012-05-09 13:27:35 -0400 |
| commit | 256a4bd79632413b691fc7bc6c1dadf92494bb01 (patch) | |
| tree | 1e4ed55619f98d2d6a8ecf67d754489529ab0ec1 /arch/arm/mach-omap2/mailbox.c | |
| parent | 28ee793e7ad4a00e41c6267075501694c94451fb (diff) | |
ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox
Looks like the register offsets are incorrect in the OMAP mailbox code
(arch/arm/mach-omap2/mailbox.c) for the OMAP4_MAILBOX_IRQ* macros. The
discrepancy is with p.224 of TI document SPRUGX9 and p3891 of SWPU231K.
Acked-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Henry Chan <enli.chan@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/mailbox.c')
| -rw-r--r-- | arch/arm/mach-omap2/mailbox.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 415a6f1cf419..19b8b6774862 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
| @@ -26,9 +26,9 @@ | |||
| 26 | #define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) | 26 | #define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) |
| 27 | #define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) | 27 | #define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) |
| 28 | 28 | ||
| 29 | #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 10 * (u)) | 29 | #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u)) |
| 30 | #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 10 * (u)) | 30 | #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u)) |
| 31 | #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 10 * (u)) | 31 | #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u)) |
| 32 | 32 | ||
| 33 | #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m))) | 33 | #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m))) |
| 34 | #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1)) | 34 | #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1)) |