Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (95 commits)
  [ARM] 4578/1: CM-x270: PCMCIA support
  [ARM] 4577/1: ITE 8152 PCI bridge support
  [ARM] 4576/1: CM-X270 machine support
  [ARM] pxa: Avoid pxa_gpio_mode() in gpio_direction_{in,out}put()
  [ARM] pxa: move pxa_set_mode() from pxa2xx_mainstone.c to mainstone.c
  [ARM] pxa: move pxa_set_mode() from pxa2xx_lubbock.c to lubbock.c
  [ARM] pxa: Make cpu_is_pxaXXX dependent on configuration symbols
  [ARM] pxa: PXA3xx base support
  [NET] smc91x: fix PXA DMA support code
  [SERIAL] Fix console initialisation ordering
  [ARM] pxa: tidy up arch/arm/mach-pxa/Makefile
  [ARM] Update arch/arm/Kconfig for drivers/Kconfig changes
  [ARM] 4600/1: fix kernel build failure with build-id-supporting binutils
  [ARM] 4599/1: Preserve ATAG list for use with kexec (2.6.23)
  [ARM] Rename consistent_sync() as dma_cache_maint()
  [ARM] 4572/1: ep93xx: add cirrus logic edb9307 support
  [ARM] 4596/1: S3C2412: Correct IRQs for SDI+CF and add decoding support
  [ARM] 4595/1: ns9xxx: define registers as void __iomem * instead of volatile u32
  [ARM] 4594/1: ns9xxx: use the new gpio functions
  [ARM] 4593/1: ns9xxx: implement generic clockevents
  ...

1 files changed, 11 insertions, 8 deletions

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index a39d30680300..f064f725e724 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -37,7 +37,7 @@ static struct omap_irq_bank {
 } __attribute__ ((aligned(4))) irq_banks[] = {
         {
                 /* MPU INTC */
-                .base_reg       = OMAP24XX_IC_BASE,
+                .base_reg       = IO_ADDRESS(OMAP24XX_IC_BASE),
                 .nr_irqs        = 96,
         }, {
                 /* XXX: DSP INTC */
@@ -47,7 +47,7 @@ static struct omap_irq_bank {
 /* XXX: FIQ and additional INTC support (only MPU at the moment) */
 static void omap_ack_irq(unsigned int irq)
 {
-        omap_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL);
+        __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL);
 }
 
 static void omap_mask_irq(unsigned int irq)
@@ -60,7 +60,7 @@ static void omap_mask_irq(unsigned int irq)
                 irq %= 32;
         }
 
-        omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset);
+        __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset);
 }
 
 static void omap_unmask_irq(unsigned int irq)
@@ -73,7 +73,7 @@ static void omap_unmask_irq(unsigned int irq)
                 irq %= 32;
         }
 
-        omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset);
+        __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset);
 }
 
 static void omap_mask_ack_irq(unsigned int irq)
@@ -93,17 +93,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
 {
         unsigned long tmp;
 
-        tmp = omap_readl(bank->base_reg + INTC_REVISION) & 0xff;
+        tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff;
         printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx "
                          "(revision %ld.%ld) with %d interrupts\n",
                          bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
 
-        tmp = omap_readl(bank->base_reg + INTC_SYSCONFIG);
+        tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG);
         tmp |= 1 << 1;  /* soft reset */
-        omap_writel(tmp, bank->base_reg + INTC_SYSCONFIG);
+        __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG);
 
-        while (!(omap_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1))
+        while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1))
                 /* Wait for reset to complete */;
+
+        /* Enable autoidle */
+        __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG);
 }
 
 void __init omap_init_irq(void)