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authorTony Lindgren <tony@atomide.com>2012-10-08 12:11:22 -0400
committerTony Lindgren <tony@atomide.com>2012-10-17 14:36:50 -0400
commit3a8761c0272c961c707e5af2eb0179adf3ef7e14 (patch)
tree101b61bd1bc57de37c52587ecaff1da4e84d7742 /arch/arm/mach-omap2/i2c.c
parent8599e7c58786e3aef0bdb0fa093fd5150ae8a9bc (diff)
ARM: OMAP: Split plat-omap/i2c.c into mach-omap1 and mach-omap2
There's no need to keep the device related things in the common i2c.c as omap2+ is using hwmod. Split the code to mach-omap1 and mach-omap2 parts and only leave common code to plat-omap/i2c.c. Note that as omap1 only has one i2c controller, we can now remove the old device related macros. Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/i2c.c')
-rw-r--r--arch/arm/mach-omap2/i2c.c50
1 files changed, 48 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index fc57e67b321f..9f12f63ec54d 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -19,11 +19,12 @@
19 * 19 *
20 */ 20 */
21 21
22#include <plat/i2c.h>
23#include "common.h" 22#include "common.h"
24#include <plat/omap_hwmod.h> 23#include <plat/omap_hwmod.h>
24#include <plat/omap_device.h>
25 25
26#include "mux.h" 26#include "mux.h"
27#include "i2c.h"
27 28
28/* In register I2C_CON, Bit 15 is the I2C enable bit */ 29/* In register I2C_CON, Bit 15 is the I2C enable bit */
29#define I2C_EN BIT(15) 30#define I2C_EN BIT(15)
@@ -33,7 +34,9 @@
33/* Maximum microseconds to wait for OMAP module to softreset */ 34/* Maximum microseconds to wait for OMAP module to softreset */
34#define MAX_MODULE_SOFTRESET_WAIT 10000 35#define MAX_MODULE_SOFTRESET_WAIT 10000
35 36
36void __init omap2_i2c_mux_pins(int bus_id) 37#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
38
39static void __init omap2_i2c_mux_pins(int bus_id)
37{ 40{
38 char mux_name[sizeof("i2c2_scl.i2c2_scl")]; 41 char mux_name[sizeof("i2c2_scl.i2c2_scl")];
39 42
@@ -104,3 +107,46 @@ int omap_i2c_reset(struct omap_hwmod *oh)
104 107
105 return 0; 108 return 0;
106} 109}
110
111static const char name[] = "omap_i2c";
112
113int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
114 int bus_id)
115{
116 int l;
117 struct omap_hwmod *oh;
118 struct platform_device *pdev;
119 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
120 struct omap_i2c_bus_platform_data *pdata;
121 struct omap_i2c_dev_attr *dev_attr;
122
123 omap2_i2c_mux_pins(bus_id);
124
125 l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
126 WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
127 "String buffer overflow in I2C%d device setup\n", bus_id);
128 oh = omap_hwmod_lookup(oh_name);
129 if (!oh) {
130 pr_err("Could not look up %s\n", oh_name);
131 return -EEXIST;
132 }
133
134 pdata = i2c_pdata;
135 /*
136 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
137 * use, and functionality implementation flags, up to the OMAP I2C
138 * driver via platform data
139 */
140 pdata->rev = oh->class->rev;
141
142 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
143 pdata->flags = dev_attr->flags;
144
145 pdev = omap_device_build(name, bus_id, oh, pdata,
146 sizeof(struct omap_i2c_bus_platform_data),
147 NULL, 0, 0);
148 WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
149
150 return PTR_RET(pdev);
151}
152