OMAP1/2/3 clock: remove paranoid checks in preparation for clock{,2xxx,3xxx}_data.c

Some parts of the clock code took advantage of the fact that the statically
allocated clock tree was in clock{,24xx,34xx}.c's local namespace to do some
extra argument checks.  These are overzealous and are more difficult to
maintain when the clock tree is in a separate namespace, so, remove them.

Signed-off-by: Paul Walmsley <paul@pwsan.com>

1 files changed, 0 insertions, 18 deletions

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index ecbb5cd8eec8..523978a58d4e 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -520,9 +520,6 @@ static int _omap3_noncore_dpll_lock(struct clk *clk)
         u8 ai;
         int r;
 
-        if (clk == &dpll3_ck)
-                return -EINVAL;
-
         pr_debug("clock: locking DPLL %s\n", clk->name);
 
         ai = omap3_dpll_autoidle_read(clk);
@@ -557,9 +554,6 @@ static int _omap3_noncore_dpll_bypass(struct clk *clk)
         int r;
         u8 ai;
 
-        if (clk == &dpll3_ck)
-                return -EINVAL;
-
         if (!(clk->dpll_data->modes & (1 << DPLL_LOW_POWER_BYPASS)))
                 return -EINVAL;
 
@@ -593,9 +587,6 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
 {
         u8 ai;
 
-        if (clk == &dpll3_ck)
-                return -EINVAL;
-
         if (!(clk->dpll_data->modes & (1 << DPLL_LOW_POWER_STOP)))
                 return -EINVAL;
 
@@ -632,9 +623,6 @@ static int omap3_noncore_dpll_enable(struct clk *clk)
         int r;
         struct dpll_data *dd;
 
-        if (clk == &dpll3_ck)
-                return -EINVAL;
-
         dd = clk->dpll_data;
         if (!dd)
                 return -EINVAL;
@@ -669,9 +657,6 @@ static int omap3_noncore_dpll_enable(struct clk *clk)
  */
 static void omap3_noncore_dpll_disable(struct clk *clk)
 {
-        if (clk == &dpll3_ck)
-                return;
-
         _omap3_noncore_dpll_stop(clk);
 }
 
@@ -844,9 +829,6 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
         if (!clk || !rate)
                 return -EINVAL;
 
-        if (clk != &dpll3_m2_ck)
-                return -EINVAL;
-
         validrate = omap2_clksel_round_rate_div(clk, rate, &new_div);
         if (validrate != rate)
                 return -EINVAL;