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authorRichard Woodruff <r-woodruff2@ti.com>2010-02-23 00:09:08 -0500
committerPaul Walmsley <paul@pwsan.com>2010-02-24 14:15:02 -0500
commit358965d7bab9c70c11b64931da02667b161cb03a (patch)
tree884a13c783f9ba43cc5fe063c5fbeecde7804f58 /arch/arm/mach-omap2/clock.h
parent91808a81fe7cc8a786b575ebc2d102c59d83c1a7 (diff)
OMAP3 clock: introduce DPLL4 Jtype
DPLL4 for 3630 introduces a changed block called j type dpll, requiring special divisor bits and additional reg fields. To allow for silicons to use this, this is introduced as a flag and is enabled for 3630 silicon. OMAP4 also has j type dpll for usb. Tested with 3630 ZOOM3 and OMAP3430 ZOOM2 Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vishwanath BS <Vishwanath.bs@ti.com> [paul@pwsan.com: added some comments; updated copyrights and credits; fixed some style issues] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock.h')
-rw-r--r--arch/arm/mach-omap2/clock.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 86e32bf2a693..0b0f52083121 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -47,6 +47,10 @@
47#define DPLL_LOW_POWER_BYPASS 0x5 47#define DPLL_LOW_POWER_BYPASS 0x5
48#define DPLL_LOCKED 0x7 48#define DPLL_LOCKED 0x7
49 49
50/* DPLL Type and DCO Selection Flags */
51#define DPLL_J_TYPE 0x1
52#define DPLL_NO_DCO_SEL 0x2
53
50int omap2_clk_enable(struct clk *clk); 54int omap2_clk_enable(struct clk *clk);
51void omap2_clk_disable(struct clk *clk); 55void omap2_clk_disable(struct clk *clk);
52long omap2_clk_round_rate(struct clk *clk, unsigned long rate); 56long omap2_clk_round_rate(struct clk *clk, unsigned long rate);