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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-02-19 08:25:16 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-19 08:25:16 -0500
commit41f3103fcfffff096c34f5267d7c9a26b44d89d3 (patch)
tree011bbbc5d7b5e25f2c49ee3de825086b167bc653 /arch/arm/mach-omap2/clock.c
parent22eb36f49e24e922ca6594a99157a3fcb92d3824 (diff)
[ARM] omap: fix clock reparenting in omap2_clk_set_parent()
When changing the parent of a clock, it is necessary to keep the clock use counts balanced otherwise things the parent state will get corrupted. Since we already disable and re-enable the clock, we might as well use the recursive versions instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
-rw-r--r--arch/arm/mach-omap2/clock.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index e64549e4e326..ce4d46a4a838 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -746,7 +746,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
746 return -EINVAL; 746 return -EINVAL;
747 747
748 if (clk->usecount > 0) 748 if (clk->usecount > 0)
749 _omap2_clk_disable(clk); 749 omap2_clk_disable(clk);
750 750
751 /* Set new source value (previous dividers if any in effect) */ 751 /* Set new source value (previous dividers if any in effect) */
752 reg_val = __raw_readl(src_addr) & ~field_mask; 752 reg_val = __raw_readl(src_addr) & ~field_mask;
@@ -759,11 +759,11 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
759 wmb(); 759 wmb();
760 } 760 }
761 761
762 if (clk->usecount > 0)
763 _omap2_clk_enable(clk);
764
765 clk->parent = new_parent; 762 clk->parent = new_parent;
766 763
764 if (clk->usecount > 0)
765 omap2_clk_enable(clk);
766
767 /* CLKSEL clocks follow their parents' rates, divided by a divisor */ 767 /* CLKSEL clocks follow their parents' rates, divided by a divisor */
768 clk->rate = new_parent->rate; 768 clk->rate = new_parent->rate;
769 769