Merge tag 'omap-cleanup-makefile-sparse-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

From Tony Lindgren:
From Paul Walmsley <paul@pwsan.com>:

Clean up and standardize several parts of
arch/arm/mach-omap2/Makefile.  Beyond readability and diffstat
improvements, the series should reduce the risk of conflicts during
future cleanups by ensuring related lines are in the same section of the
Makefile.

smatch and string-wrapping cleanups for the OMAP subarch code.

These changes fix some of the more meaningful warnings that smatch
returns for the OMAP subarch code, and unwraps strings that are
wrapped at the 80-column boundary, to conform with the current
practice.

* tag 'omap-cleanup-makefile-sparse-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: unwrap strings
  ARM: OMAP: clean up some smatch warnings, fix some printk(KERN_ERR ...
  ARM: OMAP2+: clean up PRCM sections of the Makefile
  ARM: OMAP2+: clean up OMAP clock Makefile sections
  ARM: OMAP2+: clean up OMAP4 PRM & sleep build directives in Makefile
  ARM: OMAP2+: move MPU INTCPS, secure monitor, SDRC build directives in Makefile
  ARM: OMAP2+: clean up omap_hwmod.o build directives in Makefile
  ARM: OMAP2+: clean up whitespace in Makefile

1 files changed, 4 insertions, 6 deletions

diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index d6e34dd9e7e7..298887b5bf66 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -92,15 +92,13 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
 
         pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate,
                  validrate);
-        pr_debug("clock: SDRC CS0 timing params used:"
-                 " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n",
+        pr_debug("clock: SDRC CS0 timing params used: RFR %08x CTRLA %08x CTRLB %08x MR %08x\n",
                  sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla,
                  sdrc_cs0->actim_ctrlb, sdrc_cs0->mr);
         if (sdrc_cs1)
-                pr_debug("clock: SDRC CS1 timing params used: "
-                 " RFR %08x CTRLA %08x CTRLB %08x MR %08x\n",
-                 sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla,
-                 sdrc_cs1->actim_ctrlb, sdrc_cs1->mr);
+                pr_debug("clock: SDRC CS1 timing params used: RFR %08x CTRLA %08x CTRLB %08x MR %08x\n",
+                         sdrc_cs1->rfr_ctrl, sdrc_cs1->actim_ctrla,
+                         sdrc_cs1->actim_ctrlb, sdrc_cs1->mr);
 
         if (sdrc_cs1)
                 omap3_configure_core_dpll(