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authorOlof Johansson <olof@lixom.net>2012-09-16 23:12:26 -0400
committerOlof Johansson <olof@lixom.net>2012-09-16 23:13:04 -0400
commitf4936639bc4a75218b5598ff69c52b9a8dd7f23d (patch)
tree9c08fc81cb3d3e658ca7f8dc20a949496d9e6130 /arch/arm/mach-omap1
parentd1226e8f98f130918265fb5b4dddcb60b783eb34 (diff)
parent11964f53eb4d9ce59a058be9999d9cfcb1ced878 (diff)
Merge tag 'omap-devel-am33xx-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren: From Paul Walmsley <paul@pwsan.com>: AM33xx hwmod data and miscellaneous clock and hwmod fixes. AM33xx should now boot on mainline after this is applied, according to Vaibhav. (The shortlog makes no sense here since it contains mostly the dependent cleanups that are part of the preceding branches). Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq-handler.S1
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-omap1/board-fsample.c1
-rw-r--r--arch/arm/mach-omap1/board-generic.c6
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c3
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c1
-rw-r--r--arch/arm/mach-omap1/board-osk.c2
-rw-r--r--arch/arm/mach-omap1/board-palmte.c2
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c2
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c2
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c1
-rw-r--r--arch/arm/mach-omap1/board-sx1.c1
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c6
-rw-r--r--arch/arm/mach-omap1/clock_data.c8
-rw-r--r--arch/arm/mach-omap1/devices.c3
-rw-r--r--arch/arm/mach-omap1/dma.c3
-rw-r--r--arch/arm/mach-omap1/gpio15xx.c1
-rw-r--r--arch/arm/mach-omap1/gpio16xx.c1
-rw-r--r--arch/arm/mach-omap1/gpio7xx.c1
-rw-r--r--arch/arm/mach-omap1/include/mach/ams-delta-fiq.h2
-rw-r--r--arch/arm/mach-omap1/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-omap1/include/mach/hardware.h285
-rw-r--r--arch/arm/mach-omap1/include/mach/irqs.h267
-rw-r--r--arch/arm/mach-omap1/include/mach/omap1510.h49
-rw-r--r--arch/arm/mach-omap1/include/mach/omap16xx.h201
-rw-r--r--arch/arm/mach-omap1/include/mach/omap7xx.h106
-rw-r--r--arch/arm/mach-omap1/leds-h2p2-debug.c1
-rw-r--r--arch/arm/mach-omap1/leds.c1
-rw-r--r--arch/arm/mach-omap1/serial.c1
29 files changed, 918 insertions, 44 deletions
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index a051cb8ae57f..d2b6acce8fc1 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -18,6 +18,7 @@
18 18
19#include <plat/board-ams-delta.h> 19#include <plat/board-ams-delta.h>
20 20
21#include <mach/irqs.h>
21#include <mach/ams-delta-fiq.h> 22#include <mach/ams-delta-fiq.h>
22 23
23#include "iomap.h" 24#include "iomap.h"
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index c53469802c03..6f192c4900b1 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -26,6 +26,7 @@
26#include <linux/export.h> 26#include <linux/export.h>
27#include <linux/omapfb.h> 27#include <linux/omapfb.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/platform_data/gpio-omap.h>
29 30
30#include <media/soc_camera.h> 31#include <media/soc_camera.h>
31 32
@@ -37,7 +38,6 @@
37#include <plat/board-ams-delta.h> 38#include <plat/board-ams-delta.h>
38#include <plat/keypad.h> 39#include <plat/keypad.h>
39#include <plat/mux.h> 40#include <plat/mux.h>
40#include <plat/board.h>
41 41
42#include <mach/hardware.h> 42#include <mach/hardware.h>
43#include <mach/ams-delta-fiq.h> 43#include <mach/ams-delta-fiq.h>
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 6872f3fd400f..6d985521a39e 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -32,7 +32,6 @@
32#include <plat/flash.h> 32#include <plat/flash.h>
33#include <plat/fpga.h> 33#include <plat/fpga.h>
34#include <plat/keypad.h> 34#include <plat/keypad.h>
35#include <plat/board.h>
36 35
37#include <mach/hardware.h> 36#include <mach/hardware.h>
38 37
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 6ec385e2b98e..04b5fdaff831 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -23,7 +23,6 @@
23#include <asm/mach/map.h> 23#include <asm/mach/map.h>
24 24
25#include <plat/mux.h> 25#include <plat/mux.h>
26#include <plat/board.h>
27 26
28#include <mach/usb.h> 27#include <mach/usb.h>
29 28
@@ -52,9 +51,6 @@ static struct omap_usb_config generic1610_usb_config __initdata = {
52}; 51};
53#endif 52#endif
54 53
55static struct omap_board_config_kernel generic_config[] __initdata = {
56};
57
58static void __init omap_generic_init(void) 54static void __init omap_generic_init(void)
59{ 55{
60#ifdef CONFIG_ARCH_OMAP15XX 56#ifdef CONFIG_ARCH_OMAP15XX
@@ -76,8 +72,6 @@ static void __init omap_generic_init(void)
76 } 72 }
77#endif 73#endif
78 74
79 omap_board_config = generic_config;
80 omap_board_config_size = ARRAY_SIZE(generic_config);
81 omap_serial_init(); 75 omap_serial_init();
82 omap_register_i2c_bus(1, 100, NULL, 0); 76 omap_register_i2c_bus(1, 100, NULL, 0);
83} 77}
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index b3f6e943e661..a5ac352d68d3 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -41,8 +41,7 @@
41#include <asm/mach-types.h> 41#include <asm/mach-types.h>
42#include <asm/mach/arch.h> 42#include <asm/mach/arch.h>
43 43
44#include <plat/omap7xx.h> 44#include <mach/omap7xx.h>
45#include <plat/board.h>
46#include <plat/keypad.h> 45#include <plat/keypad.h>
47#include <plat/mmc.h> 46#include <plat/mmc.h>
48 47
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 2c0ca8fc3380..ec01f03d0446 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -26,7 +26,6 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27 27
28#include <plat/mux.h> 28#include <plat/mux.h>
29#include <plat/board.h>
30#include <plat/keypad.h> 29#include <plat/keypad.h>
31#include <plat/lcd_mipid.h> 30#include <plat/lcd_mipid.h>
32#include <plat/mmc.h> 31#include <plat/mmc.h>
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 8784705edb60..3b2d9071022a 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -39,6 +39,8 @@
39#include <linux/mtd/partitions.h> 39#include <linux/mtd/partitions.h>
40#include <linux/mtd/physmap.h> 40#include <linux/mtd/physmap.h>
41#include <linux/i2c/tps65010.h> 41#include <linux/i2c/tps65010.h>
42#include <linux/platform_data/gpio-omap.h>
43#include <linux/platform_data/omap1_bl.h>
42 44
43#include <asm/mach-types.h> 45#include <asm/mach-types.h>
44#include <asm/mach/arch.h> 46#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 26bcb9defcdc..49f8d745ea1f 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -28,6 +28,7 @@
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/apm-emulation.h> 29#include <linux/apm-emulation.h>
30#include <linux/omapfb.h> 30#include <linux/omapfb.h>
31#include <linux/platform_data/omap1_bl.h>
31 32
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
@@ -37,7 +38,6 @@
37#include <plat/mux.h> 38#include <plat/mux.h>
38#include <plat/tc.h> 39#include <plat/tc.h>
39#include <plat/dma.h> 40#include <plat/dma.h>
40#include <plat/board.h>
41#include <plat/irda.h> 41#include <plat/irda.h>
42#include <plat/keypad.h> 42#include <plat/keypad.h>
43 43
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 4d099446dfa8..01523cd78e58 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -27,6 +27,7 @@
27#include <linux/omapfb.h> 27#include <linux/omapfb.h>
28#include <linux/spi/spi.h> 28#include <linux/spi/spi.h>
29#include <linux/spi/ads7846.h> 29#include <linux/spi/ads7846.h>
30#include <linux/platform_data/omap1_bl.h>
30 31
31#include <asm/mach-types.h> 32#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
@@ -37,7 +38,6 @@
37#include <plat/mux.h> 38#include <plat/mux.h>
38#include <plat/dma.h> 39#include <plat/dma.h>
39#include <plat/tc.h> 40#include <plat/tc.h>
40#include <plat/board.h>
41#include <plat/irda.h> 41#include <plat/irda.h>
42#include <plat/keypad.h> 42#include <plat/keypad.h>
43 43
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 355980321c2d..a7abce69043a 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -30,6 +30,7 @@
30#include <linux/omapfb.h> 30#include <linux/omapfb.h>
31#include <linux/spi/spi.h> 31#include <linux/spi/spi.h>
32#include <linux/spi/ads7846.h> 32#include <linux/spi/ads7846.h>
33#include <linux/platform_data/omap1_bl.h>
33 34
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -39,7 +40,6 @@
39#include <plat/mux.h> 40#include <plat/mux.h>
40#include <plat/dma.h> 41#include <plat/dma.h>
41#include <plat/tc.h> 42#include <plat/tc.h>
42#include <plat/board.h>
43#include <plat/irda.h> 43#include <plat/irda.h>
44#include <plat/keypad.h> 44#include <plat/keypad.h>
45 45
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 703d55ecffe2..277e0bc60a43 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -32,7 +32,6 @@
32#include <plat/fpga.h> 32#include <plat/fpga.h>
33#include <plat/flash.h> 33#include <plat/flash.h>
34#include <plat/keypad.h> 34#include <plat/keypad.h>
35#include <plat/board.h>
36 35
37#include <mach/hardware.h> 36#include <mach/hardware.h>
38 37
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 8c665bd16ac2..2e1fff26a2f3 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -38,7 +38,6 @@
38#include <plat/dma.h> 38#include <plat/dma.h>
39#include <plat/irda.h> 39#include <plat/irda.h>
40#include <plat/tc.h> 40#include <plat/tc.h>
41#include <plat/board.h>
42#include <plat/keypad.h> 41#include <plat/keypad.h>
43#include <plat/board-sx1.h> 42#include <plat/board-sx1.h>
44 43
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 3497769eb353..1668af3017de 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -35,7 +35,6 @@
35#include <plat/flash.h> 35#include <plat/flash.h>
36#include <plat/mux.h> 36#include <plat/mux.h>
37#include <plat/tc.h> 37#include <plat/tc.h>
38#include <plat/board.h>
39 38
40#include <mach/hardware.h> 39#include <mach/hardware.h>
41#include <mach/usb.h> 40#include <mach/usb.h>
@@ -155,9 +154,6 @@ static struct omap_usb_config voiceblue_usb_config __initdata = {
155 .pins[2] = 6, 154 .pins[2] = 6,
156}; 155};
157 156
158static struct omap_board_config_kernel voiceblue_config[] = {
159};
160
161#define MACHINE_PANICED 1 157#define MACHINE_PANICED 1
162#define MACHINE_REBOOTING 2 158#define MACHINE_REBOOTING 2
163#define MACHINE_REBOOT 4 159#define MACHINE_REBOOT 4
@@ -275,8 +271,6 @@ static void __init voiceblue_init(void)
275 voiceblue_smc91x_resources[1].start = gpio_to_irq(8); 271 voiceblue_smc91x_resources[1].start = gpio_to_irq(8);
276 voiceblue_smc91x_resources[1].end = gpio_to_irq(8); 272 voiceblue_smc91x_resources[1].end = gpio_to_irq(8);
277 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices)); 273 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
278 omap_board_config = voiceblue_config;
279 omap_board_config_size = ARRAY_SIZE(voiceblue_config);
280 omap_serial_init(); 274 omap_serial_init();
281 omap1_usb_init(&voiceblue_usb_config); 275 omap1_usb_init(&voiceblue_usb_config);
282 omap_register_i2c_bus(1, 100, NULL, 0); 276 omap_register_i2c_bus(1, 100, NULL, 0);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index c007d80dfb62..6a32b9b0dc30 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -25,7 +25,6 @@
25#include <plat/clock.h> 25#include <plat/clock.h>
26#include <plat/cpu.h> 26#include <plat/cpu.h>
27#include <plat/clkdev_omap.h> 27#include <plat/clkdev_omap.h>
28#include <plat/board.h>
29#include <plat/sram.h> /* for omap_sram_reprogram_clock() */ 28#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
30 29
31#include <mach/hardware.h> 30#include <mach/hardware.h>
@@ -788,7 +787,6 @@ u32 cpu_mask;
788int __init omap1_clk_init(void) 787int __init omap1_clk_init(void)
789{ 788{
790 struct omap_clk *c; 789 struct omap_clk *c;
791 const struct omap_clock_config *info;
792 int crystal_type = 0; /* Default 12 MHz */ 790 int crystal_type = 0; /* Default 12 MHz */
793 u32 reg; 791 u32 reg;
794 792
@@ -837,12 +835,6 @@ int __init omap1_clk_init(void)
837 ck_dpll1_p = clk_get(NULL, "ck_dpll1"); 835 ck_dpll1_p = clk_get(NULL, "ck_dpll1");
838 ck_ref_p = clk_get(NULL, "ck_ref"); 836 ck_ref_p = clk_get(NULL, "ck_ref");
839 837
840 info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
841 if (info != NULL) {
842 if (!cpu_is_omap15xx())
843 crystal_type = info->system_clock_type;
844 }
845
846 if (cpu_is_omap7xx()) 838 if (cpu_is_omap7xx())
847 ck_ref.rate = 13000000; 839 ck_ref.rate = 13000000;
848 if (cpu_is_omap16xx() && crystal_type == 2) 840 if (cpu_is_omap16xx() && crystal_type == 2)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index fa1fa4deb6aa..05fdbd992c77 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -20,12 +20,11 @@
20#include <asm/mach/map.h> 20#include <asm/mach/map.h>
21 21
22#include <plat/tc.h> 22#include <plat/tc.h>
23#include <plat/board.h>
24#include <plat/mux.h> 23#include <plat/mux.h>
25#include <plat/dma.h> 24#include <plat/dma.h>
26#include <plat/mmc.h> 25#include <plat/mmc.h>
27#include <plat/omap7xx.h>
28 26
27#include <mach/omap7xx.h>
29#include <mach/camera.h> 28#include <mach/camera.h>
30#include <mach/hardware.h> 29#include <mach/hardware.h>
31 30
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 3ef7d52316b4..b0b0f0f27450 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -27,7 +27,8 @@
27 27
28#include <plat/dma.h> 28#include <plat/dma.h>
29#include <plat/tc.h> 29#include <plat/tc.h>
30#include <plat/irqs.h> 30
31#include <mach/irqs.h>
31 32
32#define OMAP1_DMA_BASE (0xfffed800) 33#define OMAP1_DMA_BASE (0xfffed800)
33#define OMAP1_LOGICAL_DMA_CH_COUNT 17 34#define OMAP1_LOGICAL_DMA_CH_COUNT 17
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index ebef15e5e7b7..98e6f39224a4 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/platform_data/gpio-omap.h>
20 21
21#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE 22#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
22#define OMAP1510_GPIO_BASE 0xFFFCE000 23#define OMAP1510_GPIO_BASE 0xFFFCE000
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 2a48cd2e1754..33f419236b17 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/platform_data/gpio-omap.h>
20 21
21#define OMAP1610_GPIO1_BASE 0xfffbe400 22#define OMAP1610_GPIO1_BASE 0xfffbe400
22#define OMAP1610_GPIO2_BASE 0xfffbec00 23#define OMAP1610_GPIO2_BASE 0xfffbec00
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index acf12b73eace..958ce9acee95 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/platform_data/gpio-omap.h>
20 21
21#define OMAP7XX_GPIO1_BASE 0xfffbc000 22#define OMAP7XX_GPIO1_BASE 0xfffbc000
22#define OMAP7XX_GPIO2_BASE 0xfffbc800 23#define OMAP7XX_GPIO2_BASE 0xfffbc800
diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
index 23eed0035ed8..adb5e7649659 100644
--- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
+++ b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
@@ -14,8 +14,6 @@
14#ifndef __AMS_DELTA_FIQ_H 14#ifndef __AMS_DELTA_FIQ_H
15#define __AMS_DELTA_FIQ_H 15#define __AMS_DELTA_FIQ_H
16 16
17#include <plat/irqs.h>
18
19/* 17/*
20 * Interrupt number used for passing control from FIQ to IRQ. 18 * Interrupt number used for passing control from FIQ to IRQ.
21 * IRQ12, described as reserved, has been selected. 19 * IRQ12, described as reserved, has been selected.
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
index e737706a8fe1..ebf86c0f4f46 100644
--- a/arch/arm/mach-omap1/include/mach/gpio.h
+++ b/arch/arm/mach-omap1/include/mach/gpio.h
@@ -1,5 +1,3 @@
1/* 1/*
2 * arch/arm/mach-omap1/include/mach/gpio.h 2 * arch/arm/mach-omap1/include/mach/gpio.h
3 */ 3 */
4
5#include <plat/gpio.h>
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
index 01e35fa106b8..84248d250adb 100644
--- a/arch/arm/mach-omap1/include/mach/hardware.h
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -1,11 +1,46 @@
1/* 1/*
2 * arch/arm/mach-omap1/include/mach/hardware.h 2 * arch/arm/mach-omap1/include/mach/hardware.h
3 *
4 * Hardware definitions for TI OMAP processors and boards
5 *
6 * NOTE: Please put device driver specific defines into a separate header
7 * file for each driver.
8 *
9 * Copyright (C) 2001 RidgeRun, Inc.
10 * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
11 *
12 * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
13 * and Dirk Behme <dirk.behme@de.bosch.com>
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
3 */ 34 */
4 35
5#ifndef __MACH_HARDWARE_H 36#ifndef __ASM_ARCH_OMAP_HARDWARE_H
6#define __MACH_HARDWARE_H 37#define __ASM_ARCH_OMAP_HARDWARE_H
7 38
39#include <asm/sizes.h>
8#ifndef __ASSEMBLER__ 40#ifndef __ASSEMBLER__
41#include <asm/types.h>
42#include <plat/cpu.h>
43
9/* 44/*
10 * NOTE: Please use ioremap + __raw_read/write where possible instead of these 45 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
11 */ 46 */
@@ -35,7 +70,249 @@ static inline u32 omap_cs3_phys(void)
35 ? 0 : OMAP_CS3_PHYS; 70 ? 0 : OMAP_CS3_PHYS;
36} 71}
37 72
73#endif /* ifndef __ASSEMBLER__ */
74
75#include <plat/serial.h>
76
77/*
78 * ---------------------------------------------------------------------------
79 * Common definitions for all OMAP processors
80 * NOTE: Put all processor or board specific parts to the special header
81 * files.
82 * ---------------------------------------------------------------------------
83 */
84
85/*
86 * ----------------------------------------------------------------------------
87 * Timers
88 * ----------------------------------------------------------------------------
89 */
90#define OMAP_MPU_TIMER1_BASE (0xfffec500)
91#define OMAP_MPU_TIMER2_BASE (0xfffec600)
92#define OMAP_MPU_TIMER3_BASE (0xfffec700)
93#define MPU_TIMER_FREE (1 << 6)
94#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
95#define MPU_TIMER_AR (1 << 1)
96#define MPU_TIMER_ST (1 << 0)
97
98/*
99 * ----------------------------------------------------------------------------
100 * Clocks
101 * ----------------------------------------------------------------------------
102 */
103#define CLKGEN_REG_BASE (0xfffece00)
104#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
105#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
106#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
107#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
108#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
109#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
110#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
111#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
112
113#define CK_RATEF 1
114#define CK_IDLEF 2
115#define CK_ENABLEF 4
116#define CK_SELECTF 8
117#define SETARM_IDLE_SHIFT
118
119/* DPLL control registers */
120#define DPLL_CTL (0xfffecf00)
121
122/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
123#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
124#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
125#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
126#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
127#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14)
128
129/*
130 * ---------------------------------------------------------------------------
131 * UPLD
132 * ---------------------------------------------------------------------------
133 */
134#define ULPD_REG_BASE (0xfffe0800)
135#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
136#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
137#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
138# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */
139# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */
140#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
141# define SOFT_UDC_REQ (1 << 4)
142# define SOFT_USB_CLK_REQ (1 << 3)
143# define SOFT_DPLL_REQ (1 << 0)
144#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
145#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
146#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
147#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
148#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68)
149# define DIS_MMC2_DPLL_REQ (1 << 11)
150# define DIS_MMC1_DPLL_REQ (1 << 10)
151# define DIS_UART3_DPLL_REQ (1 << 9)
152# define DIS_UART2_DPLL_REQ (1 << 8)
153# define DIS_UART1_DPLL_REQ (1 << 7)
154# define DIS_USB_HOST_DPLL_REQ (1 << 6)
155#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74)
156#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c)
157
158/*
159 * ---------------------------------------------------------------------------
160 * Watchdog timer
161 * ---------------------------------------------------------------------------
162 */
163
164/* Watchdog timer within the OMAP3.2 gigacell */
165#define OMAP_MPU_WATCHDOG_BASE (0xfffec800)
166#define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0)
167#define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
168#define OMAP_WDT_READ_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
169#define OMAP_WDT_TIMER_MODE (OMAP_MPU_WATCHDOG_BASE + 0x8)
170
171/*
172 * ---------------------------------------------------------------------------
173 * Interrupts
174 * ---------------------------------------------------------------------------
175 */
176#ifdef CONFIG_ARCH_OMAP1
177
178/*
179 * XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c
180 * or something similar.. -- PFM.
181 */
182
183#define OMAP_IH1_BASE 0xfffecb00
184#define OMAP_IH2_BASE 0xfffe0000
185
186#define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00)
187#define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04)
188#define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10)
189#define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14)
190#define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18)
191#define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c)
192#define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c)
193
194#define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00)
195#define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04)
196#define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10)
197#define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14)
198#define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18)
199#define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c)
200#define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c)
201
202#define IRQ_ITR_REG_OFFSET 0x00
203#define IRQ_MIR_REG_OFFSET 0x04
204#define IRQ_SIR_IRQ_REG_OFFSET 0x10
205#define IRQ_SIR_FIQ_REG_OFFSET 0x14
206#define IRQ_CONTROL_REG_OFFSET 0x18
207#define IRQ_ISR_REG_OFFSET 0x9c
208#define IRQ_ILR0_REG_OFFSET 0x1c
209#define IRQ_GMR_REG_OFFSET 0xa0
210
38#endif 211#endif
39#endif
40 212
41#include <plat/hardware.h> 213/*
214 * ----------------------------------------------------------------------------
215 * System control registers
216 * ----------------------------------------------------------------------------
217 */
218#define MOD_CONF_CTRL_0 0xfffe1080
219#define MOD_CONF_CTRL_1 0xfffe1110
220
221/*
222 * ----------------------------------------------------------------------------
223 * Pin multiplexing registers
224 * ----------------------------------------------------------------------------
225 */
226#define FUNC_MUX_CTRL_0 0xfffe1000
227#define FUNC_MUX_CTRL_1 0xfffe1004
228#define FUNC_MUX_CTRL_2 0xfffe1008
229#define COMP_MODE_CTRL_0 0xfffe100c
230#define FUNC_MUX_CTRL_3 0xfffe1010
231#define FUNC_MUX_CTRL_4 0xfffe1014
232#define FUNC_MUX_CTRL_5 0xfffe1018
233#define FUNC_MUX_CTRL_6 0xfffe101C
234#define FUNC_MUX_CTRL_7 0xfffe1020
235#define FUNC_MUX_CTRL_8 0xfffe1024
236#define FUNC_MUX_CTRL_9 0xfffe1028
237#define FUNC_MUX_CTRL_A 0xfffe102C
238#define FUNC_MUX_CTRL_B 0xfffe1030
239#define FUNC_MUX_CTRL_C 0xfffe1034
240#define FUNC_MUX_CTRL_D 0xfffe1038
241#define PULL_DWN_CTRL_0 0xfffe1040
242#define PULL_DWN_CTRL_1 0xfffe1044
243#define PULL_DWN_CTRL_2 0xfffe1048
244#define PULL_DWN_CTRL_3 0xfffe104c
245#define PULL_DWN_CTRL_4 0xfffe10ac
246
247/* OMAP-1610 specific multiplexing registers */
248#define FUNC_MUX_CTRL_E 0xfffe1090
249#define FUNC_MUX_CTRL_F 0xfffe1094
250#define FUNC_MUX_CTRL_10 0xfffe1098
251#define FUNC_MUX_CTRL_11 0xfffe109c
252#define FUNC_MUX_CTRL_12 0xfffe10a0
253#define PU_PD_SEL_0 0xfffe10b4
254#define PU_PD_SEL_1 0xfffe10b8
255#define PU_PD_SEL_2 0xfffe10bc
256#define PU_PD_SEL_3 0xfffe10c0
257#define PU_PD_SEL_4 0xfffe10c4
258
259/* Timer32K for 1610 and 1710*/
260#define OMAP_TIMER32K_BASE 0xFFFBC400
261
262/*
263 * ---------------------------------------------------------------------------
264 * TIPB bus interface
265 * ---------------------------------------------------------------------------
266 */
267#define TIPB_PUBLIC_CNTL_BASE 0xfffed300
268#define MPU_PUBLIC_TIPB_CNTL (TIPB_PUBLIC_CNTL_BASE + 0x8)
269#define TIPB_PRIVATE_CNTL_BASE 0xfffeca00
270#define MPU_PRIVATE_TIPB_CNTL (TIPB_PRIVATE_CNTL_BASE + 0x8)
271
272/*
273 * ----------------------------------------------------------------------------
274 * MPUI interface
275 * ----------------------------------------------------------------------------
276 */
277#define MPUI_BASE (0xfffec900)
278#define MPUI_CTRL (MPUI_BASE + 0x0)
279#define MPUI_DEBUG_ADDR (MPUI_BASE + 0x4)
280#define MPUI_DEBUG_DATA (MPUI_BASE + 0x8)
281#define MPUI_DEBUG_FLAG (MPUI_BASE + 0xc)
282#define MPUI_STATUS_REG (MPUI_BASE + 0x10)
283#define MPUI_DSP_STATUS (MPUI_BASE + 0x14)
284#define MPUI_DSP_BOOT_CONFIG (MPUI_BASE + 0x18)
285#define MPUI_DSP_API_CONFIG (MPUI_BASE + 0x1c)
286
287/*
288 * ----------------------------------------------------------------------------
289 * LED Pulse Generator
290 * ----------------------------------------------------------------------------
291 */
292#define OMAP_LPG1_BASE 0xfffbd000
293#define OMAP_LPG2_BASE 0xfffbd800
294#define OMAP_LPG1_LCR (OMAP_LPG1_BASE + 0x00)
295#define OMAP_LPG1_PMR (OMAP_LPG1_BASE + 0x04)
296#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
297#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
298
299/*
300 * ----------------------------------------------------------------------------
301 * Pulse-Width Light
302 * ----------------------------------------------------------------------------
303 */
304#define OMAP_PWL_BASE 0xfffb5800
305#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00)
306#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04)
307
308/*
309 * ---------------------------------------------------------------------------
310 * Processor specific defines
311 * ---------------------------------------------------------------------------
312 */
313
314#include "omap7xx.h"
315#include "omap1510.h"
316#include "omap16xx.h"
317
318#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/mach-omap1/include/mach/irqs.h b/arch/arm/mach-omap1/include/mach/irqs.h
index 9292fdc1cb0b..729992d7d26a 100644
--- a/arch/arm/mach-omap1/include/mach/irqs.h
+++ b/arch/arm/mach-omap1/include/mach/irqs.h
@@ -1,5 +1,268 @@
1/* 1/*
2 * arch/arm/mach-omap1/include/mach/irqs.h 2 * arch/arm/plat-omap/include/mach/irqs.h
3 *
4 * Copyright (C) Greg Lonnon 2001
5 * Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com>
6 *
7 * Copyright (C) 2009 Texas Instruments
8 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * NOTE: The interrupt vectors for the OMAP-1509, OMAP-1510, and OMAP-1610
25 * are different.
3 */ 26 */
4 27
5#include <plat/irqs.h> 28#ifndef __ASM_ARCH_OMAP15XX_IRQS_H
29#define __ASM_ARCH_OMAP15XX_IRQS_H
30
31/*
32 * IRQ numbers for interrupt handler 1
33 *
34 * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
35 *
36 */
37#define INT_CAMERA 1
38#define INT_FIQ 3
39#define INT_RTDX 6
40#define INT_DSP_MMU_ABORT 7
41#define INT_HOST 8
42#define INT_ABORT 9
43#define INT_BRIDGE_PRIV 13
44#define INT_GPIO_BANK1 14
45#define INT_UART3 15
46#define INT_TIMER3 16
47#define INT_DMA_CH0_6 19
48#define INT_DMA_CH1_7 20
49#define INT_DMA_CH2_8 21
50#define INT_DMA_CH3 22
51#define INT_DMA_CH4 23
52#define INT_DMA_CH5 24
53#define INT_TIMER1 26
54#define INT_WD_TIMER 27
55#define INT_BRIDGE_PUB 28
56#define INT_TIMER2 30
57#define INT_LCD_CTRL 31
58
59/*
60 * OMAP-1510 specific IRQ numbers for interrupt handler 1
61 */
62#define INT_1510_IH2_IRQ 0
63#define INT_1510_RES2 2
64#define INT_1510_SPI_TX 4
65#define INT_1510_SPI_RX 5
66#define INT_1510_DSP_MAILBOX1 10
67#define INT_1510_DSP_MAILBOX2 11
68#define INT_1510_RES12 12
69#define INT_1510_LB_MMU 17
70#define INT_1510_RES18 18
71#define INT_1510_LOCAL_BUS 29
72
73/*
74 * OMAP-1610 specific IRQ numbers for interrupt handler 1
75 */
76#define INT_1610_IH2_IRQ INT_1510_IH2_IRQ
77#define INT_1610_IH2_FIQ 2
78#define INT_1610_McBSP2_TX 4
79#define INT_1610_McBSP2_RX 5
80#define INT_1610_DSP_MAILBOX1 10
81#define INT_1610_DSP_MAILBOX2 11
82#define INT_1610_LCD_LINE 12
83#define INT_1610_GPTIMER1 17
84#define INT_1610_GPTIMER2 18
85#define INT_1610_SSR_FIFO_0 29
86
87/*
88 * OMAP-7xx specific IRQ numbers for interrupt handler 1
89 */
90#define INT_7XX_IH2_FIQ 0
91#define INT_7XX_IH2_IRQ 1
92#define INT_7XX_USB_NON_ISO 2
93#define INT_7XX_USB_ISO 3
94#define INT_7XX_ICR 4
95#define INT_7XX_EAC 5
96#define INT_7XX_GPIO_BANK1 6
97#define INT_7XX_GPIO_BANK2 7
98#define INT_7XX_GPIO_BANK3 8
99#define INT_7XX_McBSP2TX 10
100#define INT_7XX_McBSP2RX 11
101#define INT_7XX_McBSP2RX_OVF 12
102#define INT_7XX_LCD_LINE 14
103#define INT_7XX_GSM_PROTECT 15
104#define INT_7XX_TIMER3 16
105#define INT_7XX_GPIO_BANK5 17
106#define INT_7XX_GPIO_BANK6 18
107#define INT_7XX_SPGIO_WR 29
108
109/*
110 * IRQ numbers for interrupt handler 2
111 *
112 * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
113 */
114#define IH2_BASE 32
115
116#define INT_KEYBOARD (1 + IH2_BASE)
117#define INT_uWireTX (2 + IH2_BASE)
118#define INT_uWireRX (3 + IH2_BASE)
119#define INT_I2C (4 + IH2_BASE)
120#define INT_MPUIO (5 + IH2_BASE)
121#define INT_USB_HHC_1 (6 + IH2_BASE)
122#define INT_McBSP3TX (10 + IH2_BASE)
123#define INT_McBSP3RX (11 + IH2_BASE)
124#define INT_McBSP1TX (12 + IH2_BASE)
125#define INT_McBSP1RX (13 + IH2_BASE)
126#define INT_UART1 (14 + IH2_BASE)
127#define INT_UART2 (15 + IH2_BASE)
128#define INT_BT_MCSI1TX (16 + IH2_BASE)
129#define INT_BT_MCSI1RX (17 + IH2_BASE)
130#define INT_SOSSI_MATCH (19 + IH2_BASE)
131#define INT_USB_W2FC (20 + IH2_BASE)
132#define INT_1WIRE (21 + IH2_BASE)
133#define INT_OS_TIMER (22 + IH2_BASE)
134#define INT_MMC (23 + IH2_BASE)
135#define INT_GAUGE_32K (24 + IH2_BASE)
136#define INT_RTC_TIMER (25 + IH2_BASE)
137#define INT_RTC_ALARM (26 + IH2_BASE)
138#define INT_MEM_STICK (27 + IH2_BASE)
139
140/*
141 * OMAP-1510 specific IRQ numbers for interrupt handler 2
142 */
143#define INT_1510_DSP_MMU (28 + IH2_BASE)
144#define INT_1510_COM_SPI_RO (31 + IH2_BASE)
145
146/*
147 * OMAP-1610 specific IRQ numbers for interrupt handler 2
148 */
149#define INT_1610_FAC (0 + IH2_BASE)
150#define INT_1610_USB_HHC_2 (7 + IH2_BASE)
151#define INT_1610_USB_OTG (8 + IH2_BASE)
152#define INT_1610_SoSSI (9 + IH2_BASE)
153#define INT_1610_SoSSI_MATCH (19 + IH2_BASE)
154#define INT_1610_DSP_MMU (28 + IH2_BASE)
155#define INT_1610_McBSP2RX_OF (31 + IH2_BASE)
156#define INT_1610_STI (32 + IH2_BASE)
157#define INT_1610_STI_WAKEUP (33 + IH2_BASE)
158#define INT_1610_GPTIMER3 (34 + IH2_BASE)
159#define INT_1610_GPTIMER4 (35 + IH2_BASE)
160#define INT_1610_GPTIMER5 (36 + IH2_BASE)
161#define INT_1610_GPTIMER6 (37 + IH2_BASE)
162#define INT_1610_GPTIMER7 (38 + IH2_BASE)
163#define INT_1610_GPTIMER8 (39 + IH2_BASE)
164#define INT_1610_GPIO_BANK2 (40 + IH2_BASE)
165#define INT_1610_GPIO_BANK3 (41 + IH2_BASE)
166#define INT_1610_MMC2 (42 + IH2_BASE)
167#define INT_1610_CF (43 + IH2_BASE)
168#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE)
169#define INT_1610_GPIO_BANK4 (48 + IH2_BASE)
170#define INT_1610_SPI (49 + IH2_BASE)
171#define INT_1610_DMA_CH6 (53 + IH2_BASE)
172#define INT_1610_DMA_CH7 (54 + IH2_BASE)
173#define INT_1610_DMA_CH8 (55 + IH2_BASE)
174#define INT_1610_DMA_CH9 (56 + IH2_BASE)
175#define INT_1610_DMA_CH10 (57 + IH2_BASE)
176#define INT_1610_DMA_CH11 (58 + IH2_BASE)
177#define INT_1610_DMA_CH12 (59 + IH2_BASE)
178#define INT_1610_DMA_CH13 (60 + IH2_BASE)
179#define INT_1610_DMA_CH14 (61 + IH2_BASE)
180#define INT_1610_DMA_CH15 (62 + IH2_BASE)
181#define INT_1610_NAND (63 + IH2_BASE)
182#define INT_1610_SHA1MD5 (91 + IH2_BASE)
183
184/*
185 * OMAP-7xx specific IRQ numbers for interrupt handler 2
186 */
187#define INT_7XX_HW_ERRORS (0 + IH2_BASE)
188#define INT_7XX_NFIQ_PWR_FAIL (1 + IH2_BASE)
189#define INT_7XX_CFCD (2 + IH2_BASE)
190#define INT_7XX_CFIREQ (3 + IH2_BASE)
191#define INT_7XX_I2C (4 + IH2_BASE)
192#define INT_7XX_PCC (5 + IH2_BASE)
193#define INT_7XX_MPU_EXT_NIRQ (6 + IH2_BASE)
194#define INT_7XX_SPI_100K_1 (7 + IH2_BASE)
195#define INT_7XX_SYREN_SPI (8 + IH2_BASE)
196#define INT_7XX_VLYNQ (9 + IH2_BASE)
197#define INT_7XX_GPIO_BANK4 (10 + IH2_BASE)
198#define INT_7XX_McBSP1TX (11 + IH2_BASE)
199#define INT_7XX_McBSP1RX (12 + IH2_BASE)
200#define INT_7XX_McBSP1RX_OF (13 + IH2_BASE)
201#define INT_7XX_UART_MODEM_IRDA_2 (14 + IH2_BASE)
202#define INT_7XX_UART_MODEM_1 (15 + IH2_BASE)
203#define INT_7XX_MCSI (16 + IH2_BASE)
204#define INT_7XX_uWireTX (17 + IH2_BASE)
205#define INT_7XX_uWireRX (18 + IH2_BASE)
206#define INT_7XX_SMC_CD (19 + IH2_BASE)
207#define INT_7XX_SMC_IREQ (20 + IH2_BASE)
208#define INT_7XX_HDQ_1WIRE (21 + IH2_BASE)
209#define INT_7XX_TIMER32K (22 + IH2_BASE)
210#define INT_7XX_MMC_SDIO (23 + IH2_BASE)
211#define INT_7XX_UPLD (24 + IH2_BASE)
212#define INT_7XX_USB_HHC_1 (27 + IH2_BASE)
213#define INT_7XX_USB_HHC_2 (28 + IH2_BASE)
214#define INT_7XX_USB_GENI (29 + IH2_BASE)
215#define INT_7XX_USB_OTG (30 + IH2_BASE)
216#define INT_7XX_CAMERA_IF (31 + IH2_BASE)
217#define INT_7XX_RNG (32 + IH2_BASE)
218#define INT_7XX_DUAL_MODE_TIMER (33 + IH2_BASE)
219#define INT_7XX_DBB_RF_EN (34 + IH2_BASE)
220#define INT_7XX_MPUIO_KEYPAD (35 + IH2_BASE)
221#define INT_7XX_SHA1_MD5 (36 + IH2_BASE)
222#define INT_7XX_SPI_100K_2 (37 + IH2_BASE)
223#define INT_7XX_RNG_IDLE (38 + IH2_BASE)
224#define INT_7XX_MPUIO (39 + IH2_BASE)
225#define INT_7XX_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
226#define INT_7XX_LLPC_OE_FALLING (41 + IH2_BASE)
227#define INT_7XX_LLPC_OE_RISING (42 + IH2_BASE)
228#define INT_7XX_LLPC_VSYNC (43 + IH2_BASE)
229#define INT_7XX_WAKE_UP_REQ (46 + IH2_BASE)
230#define INT_7XX_DMA_CH6 (53 + IH2_BASE)
231#define INT_7XX_DMA_CH7 (54 + IH2_BASE)
232#define INT_7XX_DMA_CH8 (55 + IH2_BASE)
233#define INT_7XX_DMA_CH9 (56 + IH2_BASE)
234#define INT_7XX_DMA_CH10 (57 + IH2_BASE)
235#define INT_7XX_DMA_CH11 (58 + IH2_BASE)
236#define INT_7XX_DMA_CH12 (59 + IH2_BASE)
237#define INT_7XX_DMA_CH13 (60 + IH2_BASE)
238#define INT_7XX_DMA_CH14 (61 + IH2_BASE)
239#define INT_7XX_DMA_CH15 (62 + IH2_BASE)
240#define INT_7XX_NAND (63 + IH2_BASE)
241
242/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
243 * 16 MPUIO lines */
244#define OMAP_MAX_GPIO_LINES 192
245#define IH_GPIO_BASE (128 + IH2_BASE)
246#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE)
247#define OMAP_IRQ_END (IH_MPUIO_BASE + 16)
248
249/* External FPGA handles interrupts on Innovator boards */
250#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END)
251#ifdef CONFIG_MACH_OMAP_INNOVATOR
252#define OMAP_FPGA_NR_IRQS 24
253#else
254#define OMAP_FPGA_NR_IRQS 0
255#endif
256#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS)
257
258#define NR_IRQS OMAP_FPGA_IRQ_END
259
260#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
261
262#include <mach/hardware.h>
263
264#ifdef CONFIG_FIQ
265#define FIQ_START 1024
266#endif
267
268#endif
diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h
new file mode 100644
index 000000000000..8fe05d6137c0
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/omap1510.h
@@ -0,0 +1,49 @@
1/*
2 * Hardware definitions for TI OMAP1510 processor.
3 *
4 * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#ifndef __ASM_ARCH_OMAP15XX_H
28#define __ASM_ARCH_OMAP15XX_H
29
30/*
31 * ----------------------------------------------------------------------------
32 * Base addresses
33 * ----------------------------------------------------------------------------
34 */
35
36/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
37
38#define OMAP1510_DSP_BASE 0xE0000000
39#define OMAP1510_DSP_SIZE 0x28000
40#define OMAP1510_DSP_START 0xE0000000
41
42#define OMAP1510_DSPREG_BASE 0xE1000000
43#define OMAP1510_DSPREG_SIZE SZ_128K
44#define OMAP1510_DSPREG_START 0xE1000000
45
46#define OMAP1510_DSP_MMU_BASE (0xfffed200)
47
48#endif /* __ASM_ARCH_OMAP15XX_H */
49
diff --git a/arch/arm/mach-omap1/include/mach/omap16xx.h b/arch/arm/mach-omap1/include/mach/omap16xx.h
new file mode 100644
index 000000000000..cd1c724869c7
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/omap16xx.h
@@ -0,0 +1,201 @@
1/*
2 * Hardware definitions for TI OMAP1610/5912/1710 processors.
3 *
4 * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#ifndef __ASM_ARCH_OMAP16XX_H
28#define __ASM_ARCH_OMAP16XX_H
29
30/*
31 * ----------------------------------------------------------------------------
32 * Base addresses
33 * ----------------------------------------------------------------------------
34 */
35
36/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
37
38#define OMAP16XX_DSP_BASE 0xE0000000
39#define OMAP16XX_DSP_SIZE 0x28000
40#define OMAP16XX_DSP_START 0xE0000000
41
42#define OMAP16XX_DSPREG_BASE 0xE1000000
43#define OMAP16XX_DSPREG_SIZE SZ_128K
44#define OMAP16XX_DSPREG_START 0xE1000000
45
46#define OMAP16XX_SEC_BASE 0xFFFE4000
47#define OMAP16XX_SEC_DES (OMAP16XX_SEC_BASE + 0x0000)
48#define OMAP16XX_SEC_SHA1MD5 (OMAP16XX_SEC_BASE + 0x0800)
49#define OMAP16XX_SEC_RNG (OMAP16XX_SEC_BASE + 0x1000)
50
51/*
52 * ---------------------------------------------------------------------------
53 * Interrupts
54 * ---------------------------------------------------------------------------
55 */
56#define OMAP_IH2_0_BASE (0xfffe0000)
57#define OMAP_IH2_1_BASE (0xfffe0100)
58#define OMAP_IH2_2_BASE (0xfffe0200)
59#define OMAP_IH2_3_BASE (0xfffe0300)
60
61#define OMAP_IH2_0_ITR (OMAP_IH2_0_BASE + 0x00)
62#define OMAP_IH2_0_MIR (OMAP_IH2_0_BASE + 0x04)
63#define OMAP_IH2_0_SIR_IRQ (OMAP_IH2_0_BASE + 0x10)
64#define OMAP_IH2_0_SIR_FIQ (OMAP_IH2_0_BASE + 0x14)
65#define OMAP_IH2_0_CONTROL (OMAP_IH2_0_BASE + 0x18)
66#define OMAP_IH2_0_ILR0 (OMAP_IH2_0_BASE + 0x1c)
67#define OMAP_IH2_0_ISR (OMAP_IH2_0_BASE + 0x9c)
68
69#define OMAP_IH2_1_ITR (OMAP_IH2_1_BASE + 0x00)
70#define OMAP_IH2_1_MIR (OMAP_IH2_1_BASE + 0x04)
71#define OMAP_IH2_1_SIR_IRQ (OMAP_IH2_1_BASE + 0x10)
72#define OMAP_IH2_1_SIR_FIQ (OMAP_IH2_1_BASE + 0x14)
73#define OMAP_IH2_1_CONTROL (OMAP_IH2_1_BASE + 0x18)
74#define OMAP_IH2_1_ILR1 (OMAP_IH2_1_BASE + 0x1c)
75#define OMAP_IH2_1_ISR (OMAP_IH2_1_BASE + 0x9c)
76
77#define OMAP_IH2_2_ITR (OMAP_IH2_2_BASE + 0x00)
78#define OMAP_IH2_2_MIR (OMAP_IH2_2_BASE + 0x04)
79#define OMAP_IH2_2_SIR_IRQ (OMAP_IH2_2_BASE + 0x10)
80#define OMAP_IH2_2_SIR_FIQ (OMAP_IH2_2_BASE + 0x14)
81#define OMAP_IH2_2_CONTROL (OMAP_IH2_2_BASE + 0x18)
82#define OMAP_IH2_2_ILR2 (OMAP_IH2_2_BASE + 0x1c)
83#define OMAP_IH2_2_ISR (OMAP_IH2_2_BASE + 0x9c)
84
85#define OMAP_IH2_3_ITR (OMAP_IH2_3_BASE + 0x00)
86#define OMAP_IH2_3_MIR (OMAP_IH2_3_BASE + 0x04)
87#define OMAP_IH2_3_SIR_IRQ (OMAP_IH2_3_BASE + 0x10)
88#define OMAP_IH2_3_SIR_FIQ (OMAP_IH2_3_BASE + 0x14)
89#define OMAP_IH2_3_CONTROL (OMAP_IH2_3_BASE + 0x18)
90#define OMAP_IH2_3_ILR3 (OMAP_IH2_3_BASE + 0x1c)
91#define OMAP_IH2_3_ISR (OMAP_IH2_3_BASE + 0x9c)
92
93/*
94 * ----------------------------------------------------------------------------
95 * Clocks
96 * ----------------------------------------------------------------------------
97 */
98#define OMAP16XX_ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
99
100/*
101 * ----------------------------------------------------------------------------
102 * Pin configuration registers
103 * ----------------------------------------------------------------------------
104 */
105#define OMAP16XX_CONF_VOLTAGE_VDDSHV6 (1 << 8)
106#define OMAP16XX_CONF_VOLTAGE_VDDSHV7 (1 << 9)
107#define OMAP16XX_CONF_VOLTAGE_VDDSHV8 (1 << 10)
108#define OMAP16XX_CONF_VOLTAGE_VDDSHV9 (1 << 11)
109#define OMAP16XX_SUBLVDS_CONF_VALID (1 << 13)
110
111/*
112 * ----------------------------------------------------------------------------
113 * System control registers
114 * ----------------------------------------------------------------------------
115 */
116#define OMAP1610_RESET_CONTROL 0xfffe1140
117
118/*
119 * ---------------------------------------------------------------------------
120 * TIPB bus interface
121 * ---------------------------------------------------------------------------
122 */
123#define TIPB_SWITCH_BASE (0xfffbc800)
124#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160)
125
126/* UART3 Registers Mapping through MPU bus */
127#define UART3_RHR (OMAP1_UART3_BASE + 0)
128#define UART3_THR (OMAP1_UART3_BASE + 0)
129#define UART3_DLL (OMAP1_UART3_BASE + 0)
130#define UART3_IER (OMAP1_UART3_BASE + 4)
131#define UART3_DLH (OMAP1_UART3_BASE + 4)
132#define UART3_IIR (OMAP1_UART3_BASE + 8)
133#define UART3_FCR (OMAP1_UART3_BASE + 8)
134#define UART3_EFR (OMAP1_UART3_BASE + 8)
135#define UART3_LCR (OMAP1_UART3_BASE + 0x0C)
136#define UART3_MCR (OMAP1_UART3_BASE + 0x10)
137#define UART3_XON1_ADDR1 (OMAP1_UART3_BASE + 0x10)
138#define UART3_XON2_ADDR2 (OMAP1_UART3_BASE + 0x14)
139#define UART3_LSR (OMAP1_UART3_BASE + 0x14)
140#define UART3_TCR (OMAP1_UART3_BASE + 0x18)
141#define UART3_MSR (OMAP1_UART3_BASE + 0x18)
142#define UART3_XOFF1 (OMAP1_UART3_BASE + 0x18)
143#define UART3_XOFF2 (OMAP1_UART3_BASE + 0x1C)
144#define UART3_SPR (OMAP1_UART3_BASE + 0x1C)
145#define UART3_TLR (OMAP1_UART3_BASE + 0x1C)
146#define UART3_MDR1 (OMAP1_UART3_BASE + 0x20)
147#define UART3_MDR2 (OMAP1_UART3_BASE + 0x24)
148#define UART3_SFLSR (OMAP1_UART3_BASE + 0x28)
149#define UART3_TXFLL (OMAP1_UART3_BASE + 0x28)
150#define UART3_RESUME (OMAP1_UART3_BASE + 0x2C)
151#define UART3_TXFLH (OMAP1_UART3_BASE + 0x2C)
152#define UART3_SFREGL (OMAP1_UART3_BASE + 0x30)
153#define UART3_RXFLL (OMAP1_UART3_BASE + 0x30)
154#define UART3_SFREGH (OMAP1_UART3_BASE + 0x34)
155#define UART3_RXFLH (OMAP1_UART3_BASE + 0x34)
156#define UART3_BLR (OMAP1_UART3_BASE + 0x38)
157#define UART3_ACREG (OMAP1_UART3_BASE + 0x3C)
158#define UART3_DIV16 (OMAP1_UART3_BASE + 0x3C)
159#define UART3_SCR (OMAP1_UART3_BASE + 0x40)
160#define UART3_SSR (OMAP1_UART3_BASE + 0x44)
161#define UART3_EBLR (OMAP1_UART3_BASE + 0x48)
162#define UART3_OSC_12M_SEL (OMAP1_UART3_BASE + 0x4C)
163#define UART3_MVR (OMAP1_UART3_BASE + 0x50)
164
165/*
166 * ---------------------------------------------------------------------------
167 * Watchdog timer
168 * ---------------------------------------------------------------------------
169 */
170
171/* 32-bit Watchdog timer in OMAP 16XX */
172#define OMAP_16XX_WATCHDOG_BASE (0xfffeb000)
173#define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00)
174#define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10)
175#define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14)
176#define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24)
177#define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28)
178#define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c)
179#define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30)
180#define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34)
181#define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48)
182
183#define WCLR_PRE_SHIFT 5
184#define WCLR_PTV_SHIFT 2
185
186#define WWPS_W_PEND_WSPR (1 << 4)
187#define WWPS_W_PEND_WTGR (1 << 3)
188#define WWPS_W_PEND_WLDR (1 << 2)
189#define WWPS_W_PEND_WCRR (1 << 1)
190#define WWPS_W_PEND_WCLR (1 << 0)
191
192#define WSPR_ENABLE_0 (0x0000bbbb)
193#define WSPR_ENABLE_1 (0x00004444)
194#define WSPR_DISABLE_0 (0x0000aaaa)
195#define WSPR_DISABLE_1 (0x00005555)
196
197#define OMAP16XX_DSP_MMU_BASE (0xfffed200)
198#define OMAP16XX_MAILBOX_BASE (0xfffcf000)
199
200#endif /* __ASM_ARCH_OMAP16XX_H */
201
diff --git a/arch/arm/mach-omap1/include/mach/omap7xx.h b/arch/arm/mach-omap1/include/mach/omap7xx.h
new file mode 100644
index 000000000000..63da994bc609
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/omap7xx.h
@@ -0,0 +1,106 @@
1/*
2 * Hardware definitions for TI OMAP7XX processor.
3 *
4 * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
5 * Adapted for omap850 by Zebediah C. McClure <zmc@lurian.net>
6 * Adapted for omap7xx by Alistair Buxton <a.j.buxton@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP7XX_H
30#define __ASM_ARCH_OMAP7XX_H
31
32/*
33 * ----------------------------------------------------------------------------
34 * Base addresses
35 * ----------------------------------------------------------------------------
36 */
37
38/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
39
40#define OMAP7XX_DSP_BASE 0xE0000000
41#define OMAP7XX_DSP_SIZE 0x50000
42#define OMAP7XX_DSP_START 0xE0000000
43
44#define OMAP7XX_DSPREG_BASE 0xE1000000
45#define OMAP7XX_DSPREG_SIZE SZ_128K
46#define OMAP7XX_DSPREG_START 0xE1000000
47
48#define OMAP7XX_SPI1_BASE 0xfffc0800
49#define OMAP7XX_SPI2_BASE 0xfffc1000
50
51/*
52 * ----------------------------------------------------------------------------
53 * OMAP7XX specific configuration registers
54 * ----------------------------------------------------------------------------
55 */
56#define OMAP7XX_CONFIG_BASE 0xfffe1000
57#define OMAP7XX_IO_CONF_0 0xfffe1070
58#define OMAP7XX_IO_CONF_1 0xfffe1074
59#define OMAP7XX_IO_CONF_2 0xfffe1078
60#define OMAP7XX_IO_CONF_3 0xfffe107c
61#define OMAP7XX_IO_CONF_4 0xfffe1080
62#define OMAP7XX_IO_CONF_5 0xfffe1084
63#define OMAP7XX_IO_CONF_6 0xfffe1088
64#define OMAP7XX_IO_CONF_7 0xfffe108c
65#define OMAP7XX_IO_CONF_8 0xfffe1090
66#define OMAP7XX_IO_CONF_9 0xfffe1094
67#define OMAP7XX_IO_CONF_10 0xfffe1098
68#define OMAP7XX_IO_CONF_11 0xfffe109c
69#define OMAP7XX_IO_CONF_12 0xfffe10a0
70#define OMAP7XX_IO_CONF_13 0xfffe10a4
71
72#define OMAP7XX_MODE_1 0xfffe1010
73#define OMAP7XX_MODE_2 0xfffe1014
74
75/* CSMI specials: in terms of base + offset */
76#define OMAP7XX_MODE2_OFFSET 0x14
77
78/*
79 * ----------------------------------------------------------------------------
80 * OMAP7XX traffic controller configuration registers
81 * ----------------------------------------------------------------------------
82 */
83#define OMAP7XX_FLASH_CFG_0 0xfffecc10
84#define OMAP7XX_FLASH_ACFG_0 0xfffecc50
85#define OMAP7XX_FLASH_CFG_1 0xfffecc14
86#define OMAP7XX_FLASH_ACFG_1 0xfffecc54
87
88/*
89 * ----------------------------------------------------------------------------
90 * OMAP7XX DSP control registers
91 * ----------------------------------------------------------------------------
92 */
93#define OMAP7XX_ICR_BASE 0xfffbb800
94#define OMAP7XX_DSP_M_CTL 0xfffbb804
95#define OMAP7XX_DSP_MMU_BASE 0xfffed200
96
97/*
98 * ----------------------------------------------------------------------------
99 * OMAP7XX PCC_UPLD configuration registers
100 * ----------------------------------------------------------------------------
101 */
102#define OMAP7XX_PCC_UPLD_CTRL_BASE (0xfffe0900)
103#define OMAP7XX_PCC_UPLD_CTRL (OMAP7XX_PCC_UPLD_CTRL_BASE + 0x00)
104
105#endif /* __ASM_ARCH_OMAP7XX_H */
106
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index f6b14a14a957..7f4bba9fa02e 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -14,6 +14,7 @@
14#include <linux/kernel_stat.h> 14#include <linux/kernel_stat.h>
15#include <linux/sched.h> 15#include <linux/sched.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/platform_data/gpio-omap.h>
17 18
18#include <mach/hardware.h> 19#include <mach/hardware.h>
19#include <asm/leds.h> 20#include <asm/leds.h>
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index ae6dd93b8ddc..7b1a3833165d 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -6,6 +6,7 @@
6#include <linux/gpio.h> 6#include <linux/gpio.h>
7#include <linux/kernel.h> 7#include <linux/kernel.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/platform_data/gpio-omap.h>
9 10
10#include <asm/leds.h> 11#include <asm/leds.h>
11#include <asm/mach-types.h> 12#include <asm/mach-types.h>
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 6809c9e56c93..0d1709b1a6fe 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -22,7 +22,6 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <plat/board.h>
26#include <plat/mux.h> 25#include <plat/mux.h>
27#include <plat/fpga.h> 26#include <plat/fpga.h>
28 27
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 04:55:36 -0500