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authorTony Lindgren <tony@atomide.com>2010-02-15 12:26:07 -0500
committerTony Lindgren <tony@atomide.com>2010-02-15 12:26:07 -0500
commitbe26a3df0b80307bf8f73cea535c112210151bb9 (patch)
tree8e3d90563b6d689ad37500929c05c211153295be /arch/arm/mach-omap1
parent918cae14872c56446415299fc17cf98704c9a537 (diff)
parent61b603b4ee0c70708539e2fa5c3d47f17b7c7849 (diff)
Merge branch 'debug-ll' into omap-for-linus
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r--arch/arm/mach-omap1/include/mach/debug-macro.S90
-rw-r--r--arch/arm/mach-omap1/serial.c6
2 files changed, 79 insertions, 17 deletions
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S
index aedb746fc33c..b6d9584544b4 100644
--- a/arch/arm/mach-omap1/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -11,18 +11,80 @@
11 * 11 *
12*/ 12*/
13 13
14 .macro addruart,rx 14#include <linux/serial_reg.h>
15
16#include <plat/serial.h>
17
18 .pushsection .data
19omap_uart_phys: .word 0x0
20omap_uart_virt: .word 0x0
21 .popsection
22
23 /*
24 * Note that this code won't work if the bootloader passes
25 * a wrong machine ID number in r1. To debug, just hardcode
26 * the desired UART phys and virt addresses temporarily into
27 * the omap_uart_phys and omap_uart_virt above.
28 */
29 .macro addruart, rx, tmp
30
31 /* Use omap_uart_phys/virt if already configured */
329: mrc p15, 0, \rx, c1, c0
33 tst \rx, #1 @ MMU enabled?
34 ldreq \rx, =omap_uart_phys @ physical base address
35 ldrne \rx, =omap_uart_virt @ virtual base
36 ldr \rx, [\rx, #0]
37 cmp \rx, #0 @ is port configured?
38 bne 99f @ already configured
39
40 /* Check 7XX UART1 scratchpad register for uart to use */
41 mrc p15, 0, \rx, c1, c0
42 tst \rx, #1 @ MMU enabled?
43 moveq \rx, #0xff000000 @ physical base address
44 movne \rx, #0xfe000000 @ virtual base
45 orr \rx, \rx, #0x00fb0000 @ OMAP1UART1
46 ldrb \rx, [\rx, #(UART_SCR << OMAP7XX_PORT_SHIFT)]
47 cmp \rx, #0 @ anything in 7XX scratchpad?
48 bne 10f @ found 7XX uart
49
50 /* Check 15xx/16xx UART1 scratchpad register for uart to use */
15 mrc p15, 0, \rx, c1, c0 51 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled? 52 tst \rx, #1 @ MMU enabled?
17 moveq \rx, #0xff000000 @ physical base address 53 moveq \rx, #0xff000000 @ physical base address
18 movne \rx, #0xfe000000 @ virtual base 54 movne \rx, #0xfe000000 @ virtual base
19 orr \rx, \rx, #0x00fb0000 55 orr \rx, \rx, #0x00fb0000 @ OMAP1UART1
20#ifdef CONFIG_OMAP_LL_DEBUG_UART3 56 ldrb \rx, [\rx, #(UART_SCR << OMAP_PORT_SHIFT)]
21 orr \rx, \rx, #0x00009000 @ UART 3 57
22#endif 58 /* Select the UART to use based on the UART1 scratchpad value */
23#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3) 5910: cmp \rx, #0 @ no port configured?
24 orr \rx, \rx, #0x00000800 @ UART 2 & 3 60 beq 11f @ if none, try to use UART1
25#endif 61 cmp \rx, #OMAP1UART1
62 beq 11f @ configure OMAP1UART1
63 cmp \rx, #OMAP1UART2
64 beq 12f @ configure OMAP1UART2
65 cmp \rx, #OMAP1UART3
66 beq 13f @ configure OMAP2UART3
67
68 /* Configure the UART offset from the phys/virt base */
6911: mov \rx, #0x00fb0000 @ OMAP1UART1
70 b 98f
7112: mov \rx, #0x00fb0000 @ OMAP1UART1
72 orr \rx, \rx, #0x00000800 @ OMAP1UART2
73 b 98f
7413: mov \rx, #0x00fb0000 @ OMAP1UART1
75 orr \rx, \rx, #0x00000800 @ OMAP1UART2
76 orr \rx, \rx, #0x00009000 @ OMAP1UART3
77
78 /* Store both phys and virt address for the uart */
7998: add \rx, \rx, #0xff000000 @ phys base
80 ldr \tmp, =omap_uart_phys
81 str \rx, [\tmp, #0]
82 sub \rx, \rx, #0xff000000 @ phys base
83 add \rx, \rx, #0xfe000000 @ virt base
84 ldr \tmp, =omap_uart_virt
85 str \rx, [\tmp, #0]
86 b 9b
8799:
26 .endm 88 .endm
27 89
28 .macro senduart,rd,rx 90 .macro senduart,rd,rx
@@ -30,13 +92,13 @@
30 .endm 92 .endm
31 93
32 .macro busyuart,rd,rx 94 .macro busyuart,rd,rx
331001: ldrb \rd, [\rx, #(0x5 << 2)] @ OMAP-1510 and friends 951001: ldrb \rd, [\rx, #(UART_LSR << OMAP_PORT_SHIFT)]
34 and \rd, \rd, #0x60 96 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
35 teq \rd, #0x60 97 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
36 beq 1002f 98 beq 1002f
37 ldrb \rd, [\rx, #(0x5 << 0)] @ OMAP-730 only 99 ldrb \rd, [\rx, #(UART_LSR << OMAP7XX_PORT_SHIFT)]
38 and \rd, \rd, #0x60 100 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
39 teq \rd, #0x60 101 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
40 bne 1001b 102 bne 1001b
411002: 1031002:
42 .endm 104 .endm
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 6e5207c81cf4..349de90194e3 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -64,7 +64,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
64 64
65static struct plat_serial8250_port serial_platform_data[] = { 65static struct plat_serial8250_port serial_platform_data[] = {
66 { 66 {
67 .mapbase = OMAP_UART1_BASE, 67 .mapbase = OMAP1_UART1_BASE,
68 .irq = INT_UART1, 68 .irq = INT_UART1,
69 .flags = UPF_BOOT_AUTOCONF, 69 .flags = UPF_BOOT_AUTOCONF,
70 .iotype = UPIO_MEM, 70 .iotype = UPIO_MEM,
@@ -72,7 +72,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
72 .uartclk = OMAP16XX_BASE_BAUD * 16, 72 .uartclk = OMAP16XX_BASE_BAUD * 16,
73 }, 73 },
74 { 74 {
75 .mapbase = OMAP_UART2_BASE, 75 .mapbase = OMAP1_UART2_BASE,
76 .irq = INT_UART2, 76 .irq = INT_UART2,
77 .flags = UPF_BOOT_AUTOCONF, 77 .flags = UPF_BOOT_AUTOCONF,
78 .iotype = UPIO_MEM, 78 .iotype = UPIO_MEM,
@@ -80,7 +80,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
80 .uartclk = OMAP16XX_BASE_BAUD * 16, 80 .uartclk = OMAP16XX_BASE_BAUD * 16,
81 }, 81 },
82 { 82 {
83 .mapbase = OMAP_UART3_BASE, 83 .mapbase = OMAP1_UART3_BASE,
84 .irq = INT_UART3, 84 .irq = INT_UART3,
85 .flags = UPF_BOOT_AUTOCONF, 85 .flags = UPF_BOOT_AUTOCONF,
86 .iotype = UPIO_MEM, 86 .iotype = UPIO_MEM,
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 18:59:45 -0400