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authorAlistair Buxton <a.j.buxton@gmail.com>2009-09-22 05:02:58 -0400
committerAlistair Buxton <a.j.buxton@gmail.com>2009-10-07 18:14:06 -0400
commit7c0069264017fdac8ef017b8893f0f0d7a13851a (patch)
tree2ef9a74c5e8a19e2d7437a61f6f546a1c7e782fb /arch/arm/mach-omap1
parent372b1c32e7e7d7aa5f44e0eaed4ad8ae21e4e9da (diff)
OMAP7XX: Rename all the rest of the omap730 references in omap1 core
This patch is part of a series which removes references to omap730 in code which is shared with omap850, replacing them with references to omap7xx. This updates all the remaining omap730 references in miscellaneous local variables, macros and similar. Signed-off-by: Alistair Buxton <a.j.buxton@gmail.com> Reviewed-by: Zebediah C. McClure <zmc@lurian.net>
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r--arch/arm/mach-omap1/clock.c8
-rw-r--r--arch/arm/mach-omap1/io.c4
-rw-r--r--arch/arm/mach-omap1/irq.c6
-rw-r--r--arch/arm/mach-omap1/mcbsp.c18
-rw-r--r--arch/arm/mach-omap1/mux.c42
-rw-r--r--arch/arm/mach-omap1/pm.c70
-rw-r--r--arch/arm/mach-omap1/pm.h52
-rw-r--r--arch/arm/mach-omap1/sleep.S22
8 files changed, 111 insertions, 111 deletions
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index c24cc28238f9..d2b00a56393d 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -69,7 +69,7 @@ struct omap_clk {
69 } 69 }
70 70
71#define CK_310 (1 << 0) 71#define CK_310 (1 << 0)
72#define CK_730 (1 << 1) 72#define CK_7XX (1 << 1)
73#define CK_1510 (1 << 2) 73#define CK_1510 (1 << 2)
74#define CK_16XX (1 << 3) 74#define CK_16XX (1 << 3)
75 75
@@ -97,7 +97,7 @@ static struct omap_clk omap_clks[] = {
97 CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), 97 CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
98 CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), 98 CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310),
99 /* CK_GEN3 clocks */ 99 /* CK_GEN3 clocks */
100 CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730), 100 CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
101 CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), 101 CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310),
102 CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX), 102 CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX),
103 CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), 103 CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX),
@@ -108,7 +108,7 @@ static struct omap_clk omap_clks[] = {
108 CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), 108 CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310),
109 CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), 109 CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
110 CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), 110 CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
111 CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730), 111 CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_7XX),
112 CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), 112 CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310),
113 /* ULPD clocks */ 113 /* ULPD clocks */
114 CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), 114 CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310),
@@ -784,7 +784,7 @@ int __init omap1_clk_init(void)
784 if (cpu_is_omap1510()) 784 if (cpu_is_omap1510())
785 cpu_mask |= CK_1510; 785 cpu_mask |= CK_1510;
786 if (cpu_is_omap7xx()) 786 if (cpu_is_omap7xx())
787 cpu_mask |= CK_730; 787 cpu_mask |= CK_7XX;
788 if (cpu_is_omap310()) 788 if (cpu_is_omap310())
789 cpu_mask |= CK_310; 789 cpu_mask |= CK_310;
790 790
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 157d5082ffea..a27df2c14acb 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -37,7 +37,7 @@ static struct map_desc omap_io_desc[] __initdata = {
37}; 37};
38 38
39#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) 39#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
40static struct map_desc omap730_io_desc[] __initdata = { 40static struct map_desc omap7xx_io_desc[] __initdata = {
41 { 41 {
42 .virtual = OMAP7XX_DSP_BASE, 42 .virtual = OMAP7XX_DSP_BASE,
43 .pfn = __phys_to_pfn(OMAP7XX_DSP_START), 43 .pfn = __phys_to_pfn(OMAP7XX_DSP_START),
@@ -106,7 +106,7 @@ void __init omap1_map_common_io(void)
106 106
107#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) 107#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
108 if (cpu_is_omap7xx()) { 108 if (cpu_is_omap7xx()) {
109 iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); 109 iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
110 } 110 }
111#endif 111#endif
112#ifdef CONFIG_ARCH_OMAP15XX 112#ifdef CONFIG_ARCH_OMAP15XX
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 704a80c29725..8f98b58575da 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -138,7 +138,7 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger)
138} 138}
139 139
140#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) 140#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
141static struct omap_irq_bank omap730_irq_banks[] = { 141static struct omap_irq_bank omap7xx_irq_banks[] = {
142 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, 142 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
143 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, 143 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
144 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, 144 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 },
@@ -180,8 +180,8 @@ void __init omap_init_irq(void)
180 180
181#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 181#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
182 if (cpu_is_omap7xx()) { 182 if (cpu_is_omap7xx()) {
183 irq_banks = omap730_irq_banks; 183 irq_banks = omap7xx_irq_banks;
184 irq_bank_count = ARRAY_SIZE(omap730_irq_banks); 184 irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks);
185 } 185 }
186#endif 186#endif
187#ifdef CONFIG_ARCH_OMAP15XX 187#ifdef CONFIG_ARCH_OMAP15XX
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 7ccca0069dce..3a51cb210de6 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -80,9 +80,9 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
80}; 80};
81 81
82#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 82#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
83static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { 83static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
84 { 84 {
85 .phys_base = OMAP730_MCBSP1_BASE, 85 .phys_base = OMAP7XX_MCBSP1_BASE,
86 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 86 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
87 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 87 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
88 .rx_irq = INT_7XX_McBSP1RX, 88 .rx_irq = INT_7XX_McBSP1RX,
@@ -90,7 +90,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
90 .ops = &omap1_mcbsp_ops, 90 .ops = &omap1_mcbsp_ops,
91 }, 91 },
92 { 92 {
93 .phys_base = OMAP730_MCBSP2_BASE, 93 .phys_base = OMAP7XX_MCBSP2_BASE,
94 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 94 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
95 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 95 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
96 .rx_irq = INT_7XX_McBSP2RX, 96 .rx_irq = INT_7XX_McBSP2RX,
@@ -98,10 +98,10 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
98 .ops = &omap1_mcbsp_ops, 98 .ops = &omap1_mcbsp_ops,
99 }, 99 },
100}; 100};
101#define OMAP730_MCBSP_PDATA_SZ ARRAY_SIZE(omap730_mcbsp_pdata) 101#define OMAP7XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap7xx_mcbsp_pdata)
102#else 102#else
103#define omap730_mcbsp_pdata NULL 103#define omap7xx_mcbsp_pdata NULL
104#define OMAP730_MCBSP_PDATA_SZ 0 104#define OMAP7XX_MCBSP_PDATA_SZ 0
105#endif 105#endif
106 106
107#ifdef CONFIG_ARCH_OMAP15XX 107#ifdef CONFIG_ARCH_OMAP15XX
@@ -173,7 +173,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
173int __init omap1_mcbsp_init(void) 173int __init omap1_mcbsp_init(void)
174{ 174{
175 if (cpu_is_omap7xx()) 175 if (cpu_is_omap7xx())
176 omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; 176 omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ;
177 if (cpu_is_omap15xx()) 177 if (cpu_is_omap15xx())
178 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; 178 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
179 if (cpu_is_omap16xx()) 179 if (cpu_is_omap16xx())
@@ -185,8 +185,8 @@ int __init omap1_mcbsp_init(void)
185 return -ENOMEM; 185 return -ENOMEM;
186 186
187 if (cpu_is_omap7xx()) 187 if (cpu_is_omap7xx())
188 omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, 188 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata,
189 OMAP730_MCBSP_PDATA_SZ); 189 OMAP7XX_MCBSP_PDATA_SZ);
190 190
191 if (cpu_is_omap15xx()) 191 if (cpu_is_omap15xx())
192 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata, 192 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata,
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index f9d45a3bf4f6..d59899d6a7fe 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -36,27 +36,27 @@
36static struct omap_mux_cfg arch_mux_cfg; 36static struct omap_mux_cfg arch_mux_cfg;
37 37
38#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 38#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
39static struct pin_config __initdata_or_module omap730_pins[] = { 39static struct pin_config __initdata_or_module omap7xx_pins[] = {
40MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 20, 1, 0) 40MUX_CFG_7XX("E2_7XX_KBR0", 12, 21, 0, 20, 1, 0)
41MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 24, 1, 0) 41MUX_CFG_7XX("J7_7XX_KBR1", 12, 25, 0, 24, 1, 0)
42MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 28, 1, 0) 42MUX_CFG_7XX("E1_7XX_KBR2", 12, 29, 0, 28, 1, 0)
43MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 1, 0) 43MUX_CFG_7XX("F3_7XX_KBR3", 13, 1, 0, 0, 1, 0)
44MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 4, 1, 0) 44MUX_CFG_7XX("D2_7XX_KBR4", 13, 5, 0, 4, 1, 0)
45MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 8, 1, 0) 45MUX_CFG_7XX("C2_7XX_KBC0", 13, 9, 0, 8, 1, 0)
46MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 12, 1, 0) 46MUX_CFG_7XX("D3_7XX_KBC1", 13, 13, 0, 12, 1, 0)
47MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 16, 1, 0) 47MUX_CFG_7XX("E4_7XX_KBC2", 13, 17, 0, 16, 1, 0)
48MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 20, 1, 0) 48MUX_CFG_7XX("F4_7XX_KBC3", 13, 21, 0, 20, 1, 0)
49MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 24, 1, 0) 49MUX_CFG_7XX("E3_7XX_KBC4", 13, 25, 0, 24, 1, 0)
50 50
51MUX_CFG_730("AA17_730_USB_DM", 2, 21, 0, 20, 0, 0) 51MUX_CFG_7XX("AA17_7XX_USB_DM", 2, 21, 0, 20, 0, 0)
52MUX_CFG_730("W16_730_USB_PU_EN", 2, 25, 0, 24, 0, 0) 52MUX_CFG_7XX("W16_7XX_USB_PU_EN", 2, 25, 0, 24, 0, 0)
53MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0) 53MUX_CFG_7XX("W17_7XX_USB_VBUSI", 2, 29, 0, 28, 0, 0)
54}; 54};
55#define OMAP730_PINS_SZ ARRAY_SIZE(omap730_pins) 55#define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins)
56#else 56#else
57#define omap730_pins NULL 57#define omap7xx_pins NULL
58#define OMAP730_PINS_SZ 0 58#define OMAP7XX_PINS_SZ 0
59#endif /* CONFIG_ARCH_OMAP730 */ 59#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */
60 60
61#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) 61#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
62static struct pin_config __initdata_or_module omap1xxx_pins[] = { 62static struct pin_config __initdata_or_module omap1xxx_pins[] = {
@@ -431,8 +431,8 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
431int __init omap1_mux_init(void) 431int __init omap1_mux_init(void)
432{ 432{
433 if (cpu_is_omap7xx()) { 433 if (cpu_is_omap7xx()) {
434 arch_mux_cfg.pins = omap730_pins; 434 arch_mux_cfg.pins = omap7xx_pins;
435 arch_mux_cfg.size = OMAP730_PINS_SZ; 435 arch_mux_cfg.size = OMAP7XX_PINS_SZ;
436 arch_mux_cfg.cfg_reg = omap1_cfg_reg; 436 arch_mux_cfg.cfg_reg = omap1_cfg_reg;
437 } 437 }
438 438
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 58479c75cac4..10f4e4adca17 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -62,7 +62,7 @@
62static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; 62static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
63static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; 63static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
64static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; 64static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE];
65static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE]; 65static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE];
66static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; 66static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE];
67static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; 67static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE];
68 68
@@ -254,14 +254,14 @@ void omap1_pm_suspend(void)
254 */ 254 */
255 255
256 if (cpu_is_omap7xx()) { 256 if (cpu_is_omap7xx()) {
257 MPUI730_SAVE(OMAP_IH1_MIR); 257 MPUI7XX_SAVE(OMAP_IH1_MIR);
258 MPUI730_SAVE(OMAP_IH2_0_MIR); 258 MPUI7XX_SAVE(OMAP_IH2_0_MIR);
259 MPUI730_SAVE(OMAP_IH2_1_MIR); 259 MPUI7XX_SAVE(OMAP_IH2_1_MIR);
260 MPUI730_SAVE(MPUI_CTRL); 260 MPUI7XX_SAVE(MPUI_CTRL);
261 MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); 261 MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG);
262 MPUI730_SAVE(MPUI_DSP_API_CONFIG); 262 MPUI7XX_SAVE(MPUI_DSP_API_CONFIG);
263 MPUI730_SAVE(EMIFS_CONFIG); 263 MPUI7XX_SAVE(EMIFS_CONFIG);
264 MPUI730_SAVE(EMIFF_SDRAM_CONFIG); 264 MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG);
265 265
266 } else if (cpu_is_omap15xx()) { 266 } else if (cpu_is_omap15xx()) {
267 MPUI1510_SAVE(OMAP_IH1_MIR); 267 MPUI1510_SAVE(OMAP_IH1_MIR);
@@ -384,11 +384,11 @@ void omap1_pm_suspend(void)
384 ULPD_RESTORE(ULPD_STATUS_REQ); 384 ULPD_RESTORE(ULPD_STATUS_REQ);
385 385
386 if (cpu_is_omap7xx()) { 386 if (cpu_is_omap7xx()) {
387 MPUI730_RESTORE(EMIFS_CONFIG); 387 MPUI7XX_RESTORE(EMIFS_CONFIG);
388 MPUI730_RESTORE(EMIFF_SDRAM_CONFIG); 388 MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG);
389 MPUI730_RESTORE(OMAP_IH1_MIR); 389 MPUI7XX_RESTORE(OMAP_IH1_MIR);
390 MPUI730_RESTORE(OMAP_IH2_0_MIR); 390 MPUI7XX_RESTORE(OMAP_IH2_0_MIR);
391 MPUI730_RESTORE(OMAP_IH2_1_MIR); 391 MPUI7XX_RESTORE(OMAP_IH2_1_MIR);
392 } else if (cpu_is_omap15xx()) { 392 } else if (cpu_is_omap15xx()) {
393 MPUI1510_RESTORE(MPUI_CTRL); 393 MPUI1510_RESTORE(MPUI_CTRL);
394 MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); 394 MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG);
@@ -462,12 +462,12 @@ static int omap_pm_read_proc(
462 ULPD_SAVE(ULPD_POWER_CTRL); 462 ULPD_SAVE(ULPD_POWER_CTRL);
463 463
464 if (cpu_is_omap7xx()) { 464 if (cpu_is_omap7xx()) {
465 MPUI730_SAVE(MPUI_CTRL); 465 MPUI7XX_SAVE(MPUI_CTRL);
466 MPUI730_SAVE(MPUI_DSP_STATUS); 466 MPUI7XX_SAVE(MPUI_DSP_STATUS);
467 MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); 467 MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG);
468 MPUI730_SAVE(MPUI_DSP_API_CONFIG); 468 MPUI7XX_SAVE(MPUI_DSP_API_CONFIG);
469 MPUI730_SAVE(EMIFF_SDRAM_CONFIG); 469 MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG);
470 MPUI730_SAVE(EMIFS_CONFIG); 470 MPUI7XX_SAVE(EMIFS_CONFIG);
471 } else if (cpu_is_omap15xx()) { 471 } else if (cpu_is_omap15xx()) {
472 MPUI1510_SAVE(MPUI_CTRL); 472 MPUI1510_SAVE(MPUI_CTRL);
473 MPUI1510_SAVE(MPUI_DSP_STATUS); 473 MPUI1510_SAVE(MPUI_DSP_STATUS);
@@ -519,18 +519,18 @@ static int omap_pm_read_proc(
519 519
520 if (cpu_is_omap7xx()) { 520 if (cpu_is_omap7xx()) {
521 my_buffer_offset += sprintf(my_base + my_buffer_offset, 521 my_buffer_offset += sprintf(my_base + my_buffer_offset,
522 "MPUI730_CTRL_REG 0x%-8x \n" 522 "MPUI7XX_CTRL_REG 0x%-8x \n"
523 "MPUI730_DSP_STATUS_REG: 0x%-8x \n" 523 "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n"
524 "MPUI730_DSP_BOOT_CONFIG_REG: 0x%-8x \n" 524 "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
525 "MPUI730_DSP_API_CONFIG_REG: 0x%-8x \n" 525 "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n"
526 "MPUI730_SDRAM_CONFIG_REG: 0x%-8x \n" 526 "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n"
527 "MPUI730_EMIFS_CONFIG_REG: 0x%-8x \n", 527 "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n",
528 MPUI730_SHOW(MPUI_CTRL), 528 MPUI7XX_SHOW(MPUI_CTRL),
529 MPUI730_SHOW(MPUI_DSP_STATUS), 529 MPUI7XX_SHOW(MPUI_DSP_STATUS),
530 MPUI730_SHOW(MPUI_DSP_BOOT_CONFIG), 530 MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG),
531 MPUI730_SHOW(MPUI_DSP_API_CONFIG), 531 MPUI7XX_SHOW(MPUI_DSP_API_CONFIG),
532 MPUI730_SHOW(EMIFF_SDRAM_CONFIG), 532 MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG),
533 MPUI730_SHOW(EMIFS_CONFIG)); 533 MPUI7XX_SHOW(EMIFS_CONFIG));
534 } else if (cpu_is_omap15xx()) { 534 } else if (cpu_is_omap15xx()) {
535 my_buffer_offset += sprintf(my_base + my_buffer_offset, 535 my_buffer_offset += sprintf(my_base + my_buffer_offset,
536 "MPUI1510_CTRL_REG 0x%-8x \n" 536 "MPUI1510_CTRL_REG 0x%-8x \n"
@@ -669,8 +669,8 @@ static int __init omap_pm_init(void)
669 * memory the MPU can see when it wakes up. 669 * memory the MPU can see when it wakes up.
670 */ 670 */
671 if (cpu_is_omap7xx()) { 671 if (cpu_is_omap7xx()) {
672 omap_sram_suspend = omap_sram_push(omap730_cpu_suspend, 672 omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend,
673 omap730_cpu_suspend_sz); 673 omap7xx_cpu_suspend_sz);
674 } else if (cpu_is_omap15xx()) { 674 } else if (cpu_is_omap15xx()) {
675 omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, 675 omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend,
676 omap1510_cpu_suspend_sz); 676 omap1510_cpu_suspend_sz);
@@ -701,7 +701,7 @@ static int __init omap_pm_init(void)
701 701
702 /* Configure IDLECT3 */ 702 /* Configure IDLECT3 */
703 if (cpu_is_omap7xx()) 703 if (cpu_is_omap7xx())
704 omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3); 704 omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3);
705 else if (cpu_is_omap16xx()) 705 else if (cpu_is_omap16xx())
706 omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); 706 omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3);
707 707
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h
index c4f05bdcf8a6..0f20aedd63f4 100644
--- a/arch/arm/mach-omap1/pm.h
+++ b/arch/arm/mach-omap1/pm.h
@@ -98,11 +98,11 @@
98#define OMAP1610_IDLECT3 0xfffece24 98#define OMAP1610_IDLECT3 0xfffece24
99#define OMAP1610_IDLE_LOOP_REQUEST 0x0400 99#define OMAP1610_IDLE_LOOP_REQUEST 0x0400
100 100
101#define OMAP730_IDLECT1_SLEEP_VAL 0x16c7 101#define OMAP7XX_IDLECT1_SLEEP_VAL 0x16c7
102#define OMAP730_IDLECT2_SLEEP_VAL 0x09c7 102#define OMAP7XX_IDLECT2_SLEEP_VAL 0x09c7
103#define OMAP730_IDLECT3_VAL 0x3f 103#define OMAP7XX_IDLECT3_VAL 0x3f
104#define OMAP730_IDLECT3 0xfffece24 104#define OMAP7XX_IDLECT3 0xfffece24
105#define OMAP730_IDLE_LOOP_REQUEST 0x0C00 105#define OMAP7XX_IDLE_LOOP_REQUEST 0x0C00
106 106
107#if !defined(CONFIG_ARCH_OMAP730) && \ 107#if !defined(CONFIG_ARCH_OMAP730) && \
108 !defined(CONFIG_ARCH_OMAP15XX) && \ 108 !defined(CONFIG_ARCH_OMAP15XX) && \
@@ -122,17 +122,17 @@ extern void allow_idle_sleep(void);
122extern void omap1_pm_idle(void); 122extern void omap1_pm_idle(void);
123extern void omap1_pm_suspend(void); 123extern void omap1_pm_suspend(void);
124 124
125extern void omap730_cpu_suspend(unsigned short, unsigned short); 125extern void omap7xx_cpu_suspend(unsigned short, unsigned short);
126extern void omap1510_cpu_suspend(unsigned short, unsigned short); 126extern void omap1510_cpu_suspend(unsigned short, unsigned short);
127extern void omap1610_cpu_suspend(unsigned short, unsigned short); 127extern void omap1610_cpu_suspend(unsigned short, unsigned short);
128extern void omap730_idle_loop_suspend(void); 128extern void omap7xx_idle_loop_suspend(void);
129extern void omap1510_idle_loop_suspend(void); 129extern void omap1510_idle_loop_suspend(void);
130extern void omap1610_idle_loop_suspend(void); 130extern void omap1610_idle_loop_suspend(void);
131 131
132extern unsigned int omap730_cpu_suspend_sz; 132extern unsigned int omap7xx_cpu_suspend_sz;
133extern unsigned int omap1510_cpu_suspend_sz; 133extern unsigned int omap1510_cpu_suspend_sz;
134extern unsigned int omap1610_cpu_suspend_sz; 134extern unsigned int omap1610_cpu_suspend_sz;
135extern unsigned int omap730_idle_loop_suspend_sz; 135extern unsigned int omap7xx_idle_loop_suspend_sz;
136extern unsigned int omap1510_idle_loop_suspend_sz; 136extern unsigned int omap1510_idle_loop_suspend_sz;
137extern unsigned int omap1610_idle_loop_suspend_sz; 137extern unsigned int omap1610_idle_loop_suspend_sz;
138 138
@@ -155,9 +155,9 @@ extern void omap_serial_wake_trigger(int enable);
155#define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) 155#define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x))
156#define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] 156#define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]
157 157
158#define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x) 158#define MPUI7XX_SAVE(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x] = omap_readl(x)
159#define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x)) 159#define MPUI7XX_RESTORE(x) omap_writel((mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x]), (x))
160#define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] 160#define MPUI7XX_SHOW(x) mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_##x]
161 161
162#define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) 162#define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x)
163#define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) 163#define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x))
@@ -232,24 +232,24 @@ enum mpui1510_save_state {
232#endif 232#endif
233}; 233};
234 234
235enum mpui730_save_state { 235enum mpui7xx_save_state {
236 MPUI730_SLEEP_SAVE_START = 0, 236 MPUI7XX_SLEEP_SAVE_START = 0,
237 /* 237 /*
238 * MPUI registers 32 bits 238 * MPUI registers 32 bits
239 */ 239 */
240 MPUI730_SLEEP_SAVE_MPUI_CTRL, 240 MPUI7XX_SLEEP_SAVE_MPUI_CTRL,
241 MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, 241 MPUI7XX_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG,
242 MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG, 242 MPUI7XX_SLEEP_SAVE_MPUI_DSP_API_CONFIG,
243 MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS, 243 MPUI7XX_SLEEP_SAVE_MPUI_DSP_STATUS,
244 MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, 244 MPUI7XX_SLEEP_SAVE_EMIFF_SDRAM_CONFIG,
245 MPUI730_SLEEP_SAVE_EMIFS_CONFIG, 245 MPUI7XX_SLEEP_SAVE_EMIFS_CONFIG,
246 MPUI730_SLEEP_SAVE_OMAP_IH1_MIR, 246 MPUI7XX_SLEEP_SAVE_OMAP_IH1_MIR,
247 MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR, 247 MPUI7XX_SLEEP_SAVE_OMAP_IH2_0_MIR,
248 MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR, 248 MPUI7XX_SLEEP_SAVE_OMAP_IH2_1_MIR,
249#if defined(CONFIG_ARCH_OMAP730) 249#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
250 MPUI730_SLEEP_SAVE_SIZE 250 MPUI7XX_SLEEP_SAVE_SIZE
251#else 251#else
252 MPUI730_SLEEP_SAVE_SIZE = 0 252 MPUI7XX_SLEEP_SAVE_SIZE = 0
253#endif 253#endif
254}; 254};
255 255
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 22e8568339b0..ef771ce8b030 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mach-omap1/sleep.S 2 * linux/arch/arm/mach-omap1/sleep.S
3 * 3 *
4 * Low-level OMAP730/1510/1610 sleep/wakeUp support 4 * Low-level OMAP7XX/1510/1610 sleep/wakeUp support
5 * 5 *
6 * Initial SA1110 code: 6 * Initial SA1110 code:
7 * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com> 7 * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
@@ -57,8 +57,8 @@
57 * 57 *
58 */ 58 */
59 59
60#if defined(CONFIG_ARCH_OMAP730) 60#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
61ENTRY(omap730_cpu_suspend) 61ENTRY(omap7xx_cpu_suspend)
62 62
63 @ save registers on stack 63 @ save registers on stack
64 stmfd sp!, {r0 - r12, lr} 64 stmfd sp!, {r0 - r12, lr}
@@ -91,13 +91,13 @@ ENTRY(omap730_cpu_suspend)
91 91
92 @ turn off clock domains 92 @ turn off clock domains
93 @ do not disable PERCK (0x04) 93 @ do not disable PERCK (0x04)
94 mov r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff 94 mov r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff
95 orr r5, r5, #OMAP730_IDLECT2_SLEEP_VAL & 0xff00 95 orr r5, r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff00
96 strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff] 96 strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
97 97
98 @ request ARM idle 98 @ request ARM idle
99 mov r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff 99 mov r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff
100 orr r3, r3, #OMAP730_IDLECT1_SLEEP_VAL & 0xff00 100 orr r3, r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff00
101 strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff] 101 strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
102 102
103 @ disable instruction cache 103 @ disable instruction cache
@@ -113,7 +113,7 @@ ENTRY(omap730_cpu_suspend)
113 mov r2, #0 113 mov r2, #0
114 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt 114 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt
115/* 115/*
116 * omap730_cpu_suspend()'s resume point. 116 * omap7xx_cpu_suspend()'s resume point.
117 * 117 *
118 * It will just start executing here, so we'll restore stuff from the 118 * It will just start executing here, so we'll restore stuff from the
119 * stack. 119 * stack.
@@ -132,9 +132,9 @@ ENTRY(omap730_cpu_suspend)
132 @ restore regs and return 132 @ restore regs and return
133 ldmfd sp!, {r0 - r12, pc} 133 ldmfd sp!, {r0 - r12, pc}
134 134
135ENTRY(omap730_cpu_suspend_sz) 135ENTRY(omap7xx_cpu_suspend_sz)
136 .word . - omap730_cpu_suspend 136 .word . - omap7xx_cpu_suspend
137#endif /* CONFIG_ARCH_OMAP730 */ 137#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */
138 138
139#ifdef CONFIG_ARCH_OMAP15XX 139#ifdef CONFIG_ARCH_OMAP15XX
140ENTRY(omap1510_cpu_suspend) 140ENTRY(omap1510_cpu_suspend)