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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/arm/mach-omap1
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r--arch/arm/mach-omap1/Kconfig15
-rw-r--r--arch/arm/mach-omap1/Makefile15
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq-handler.S2
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq.c8
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c231
-rw-r--r--arch/arm/mach-omap1/board-fsample.c95
-rw-r--r--arch/arm/mach-omap1/board-generic.c2
-rw-r--r--arch/arm/mach-omap1/board-h2-mmc.c3
-rw-r--r--arch/arm/mach-omap1/board-h2.c83
-rw-r--r--arch/arm/mach-omap1/board-h3-mmc.c3
-rw-r--r--arch/arm/mach-omap1/board-h3.c101
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c421
-rw-r--r--arch/arm/mach-omap1/board-innovator.c36
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c38
-rw-r--r--arch/arm/mach-omap1/board-osk.c35
-rw-r--r--arch/arm/mach-omap1/board-palmte.c44
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c30
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c41
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c93
-rw-r--r--arch/arm/mach-omap1/board-sx1-mmc.c3
-rw-r--r--arch/arm/mach-omap1/board-sx1.c62
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c116
-rw-r--r--arch/arm/mach-omap1/clock.c2
-rw-r--r--arch/arm/mach-omap1/clock_data.c27
-rw-r--r--arch/arm/mach-omap1/devices.c101
-rw-r--r--arch/arm/mach-omap1/dma.c391
-rw-r--r--arch/arm/mach-omap1/flash.c3
-rw-r--r--arch/arm/mach-omap1/fpga.c48
-rw-r--r--arch/arm/mach-omap1/gpio15xx.c99
-rw-r--r--arch/arm/mach-omap1/gpio16xx.c200
-rw-r--r--arch/arm/mach-omap1/gpio7xx.c262
-rw-r--r--arch/arm/mach-omap1/include/mach/ams-delta-fiq.h2
-rw-r--r--arch/arm/mach-omap1/include/mach/camera.h13
-rw-r--r--arch/arm/mach-omap1/include/mach/debug-macro.S71
-rw-r--r--arch/arm/mach-omap1/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-omap1/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-omap1/io.c39
-rw-r--r--arch/arm/mach-omap1/irq.c53
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c27
-rw-r--r--arch/arm/mach-omap1/leds.c3
-rw-r--r--arch/arm/mach-omap1/mailbox.c5
-rw-r--r--arch/arm/mach-omap1/mcbsp.c338
-rw-r--r--arch/arm/mach-omap1/mux.c2
-rw-r--r--arch/arm/mach-omap1/pm.c5
-rw-r--r--arch/arm/mach-omap1/pm.h6
-rw-r--r--arch/arm/mach-omap1/pm_bus.c79
-rw-r--r--arch/arm/mach-omap1/reset.c25
-rw-r--r--arch/arm/mach-omap1/serial.c11
-rw-r--r--arch/arm/mach-omap1/sleep.S3
-rw-r--r--arch/arm/mach-omap1/sram.S1
-rw-r--r--arch/arm/mach-omap1/time.c154
-rw-r--r--arch/arm/mach-omap1/timer32k.c13
52 files changed, 2682 insertions, 798 deletions
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 3b02d3b944af..e0a028161dde 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -9,6 +9,7 @@ config ARCH_OMAP730
9 depends on ARCH_OMAP1 9 depends on ARCH_OMAP1
10 bool "OMAP730 Based System" 10 bool "OMAP730 Based System"
11 select CPU_ARM926T 11 select CPU_ARM926T
12 select OMAP_MPU_TIMER
12 select ARCH_OMAP_OTG 13 select ARCH_OMAP_OTG
13 14
14config ARCH_OMAP850 15config ARCH_OMAP850
@@ -22,6 +23,7 @@ config ARCH_OMAP15XX
22 default y 23 default y
23 bool "OMAP15xx Based System" 24 bool "OMAP15xx Based System"
24 select CPU_ARM925T 25 select CPU_ARM925T
26 select OMAP_MPU_TIMER
25 27
26config ARCH_OMAP16XX 28config ARCH_OMAP16XX
27 depends on ARCH_OMAP1 29 depends on ARCH_OMAP1
@@ -128,7 +130,7 @@ config MACH_OMAP_PALMTT
128 help 130 help
129 Support for the Palm Tungsten|T PDA. To boot the kernel, you'll 131 Support for the Palm Tungsten|T PDA. To boot the kernel, you'll
130 need a PalmOS compatible bootloader (Garux); check out 132 need a PalmOS compatible bootloader (Garux); check out
131 http://www.hackndev.com/palm/tt/ for more information. 133 http://garux.sourceforge.net/ for more information.
132 Say Y here if you have this PDA model, say N otherwise. 134 Say Y here if you have this PDA model, say N otherwise.
133 135
134config MACH_SX1 136config MACH_SX1
@@ -152,20 +154,11 @@ config MACH_NOKIA770
152config MACH_AMS_DELTA 154config MACH_AMS_DELTA
153 bool "Amstrad E3 (Delta)" 155 bool "Amstrad E3 (Delta)"
154 depends on ARCH_OMAP1 && ARCH_OMAP15XX 156 depends on ARCH_OMAP1 && ARCH_OMAP15XX
157 select FIQ
155 help 158 help
156 Support for the Amstrad E3 (codename Delta) videophone. Say Y here 159 Support for the Amstrad E3 (codename Delta) videophone. Say Y here
157 if you have such a device. 160 if you have such a device.
158 161
159config AMS_DELTA_FIQ
160 bool "Fast Interrupt Request (FIQ) support for the E3"
161 depends on MACH_AMS_DELTA
162 select FIQ
163 help
164 Provide a FIQ handler for the E3.
165 This allows for fast handling of interrupts generated
166 by the clock line of the E3 mailboard (or a PS/2 keyboard)
167 connected to the GPIO based external keyboard port.
168
169config MACH_OMAP_GENERIC 162config MACH_OMAP_GENERIC
170 bool "Generic OMAP board" 163 bool "Generic OMAP board"
171 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX) 164 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX)
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index facfaeb1ae5c..5b114d1558c8 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,12 +3,11 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o 6obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
7obj-y += clock.o clock_data.o opp_data.o 7obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o
8 8
9obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 9obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
10 10
11obj-$(CONFIG_OMAP_MPU_TIMER) += time.o
12obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o 11obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o
13 12
14# Power Management 13# Power Management
@@ -39,8 +38,8 @@ obj-$(CONFIG_MACH_OMAP_PALMTE) += board-palmte.o
39obj-$(CONFIG_MACH_OMAP_PALMZ71) += board-palmz71.o 38obj-$(CONFIG_MACH_OMAP_PALMZ71) += board-palmz71.o
40obj-$(CONFIG_MACH_OMAP_PALMTT) += board-palmtt.o 39obj-$(CONFIG_MACH_OMAP_PALMTT) += board-palmtt.o
41obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o 40obj-$(CONFIG_MACH_NOKIA770) += board-nokia770.o
42obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o 41obj-$(CONFIG_MACH_AMS_DELTA) += board-ams-delta.o ams-delta-fiq.o \
43obj-$(CONFIG_AMS_DELTA_FIQ) += ams-delta-fiq.o ams-delta-fiq-handler.o 42 ams-delta-fiq-handler.o
44obj-$(CONFIG_MACH_SX1) += board-sx1.o board-sx1-mmc.o 43obj-$(CONFIG_MACH_SX1) += board-sx1.o board-sx1-mmc.o
45obj-$(CONFIG_MACH_HERALD) += board-htcherald.o 44obj-$(CONFIG_MACH_HERALD) += board-htcherald.o
46 45
@@ -49,6 +48,12 @@ ifeq ($(CONFIG_ARCH_OMAP15XX),y)
49obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o 48obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o
50endif 49endif
51 50
51# GPIO
52obj-$(CONFIG_ARCH_OMAP730) += gpio7xx.o
53obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o
54obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o
55obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o
56
52# LEDs support 57# LEDs support
53led-$(CONFIG_MACH_OMAP_H2) += leds-h2p2-debug.o 58led-$(CONFIG_MACH_OMAP_H2) += leds-h2p2-debug.o
54led-$(CONFIG_MACH_OMAP_H3) += leds-h2p2-debug.o 59led-$(CONFIG_MACH_OMAP_H3) += leds-h2p2-debug.o
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index 927d5a181760..c1c5fb6a5b4c 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -79,7 +79,7 @@
79 79
80 80
81/* 81/*
82 * Register useage 82 * Register usage
83 * r8 - temporary 83 * r8 - temporary
84 * r9 - the driver buffer 84 * r9 - the driver buffer
85 * r10 - temporary 85 * r10 - temporary
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index 6c994e2d8879..152b32c15e28 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -49,7 +49,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
49 49
50 irq_desc = irq_to_desc(IH_GPIO_BASE); 50 irq_desc = irq_to_desc(IH_GPIO_BASE);
51 if (irq_desc) 51 if (irq_desc)
52 irq_chip = irq_desc->chip; 52 irq_chip = irq_desc->irq_data.chip;
53 53
54 /* 54 /*
55 * For each handled GPIO interrupt, keep calling its interrupt handler 55 * For each handled GPIO interrupt, keep calling its interrupt handler
@@ -62,13 +62,15 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
62 62
63 while (irq_counter[gpio] < fiq_count) { 63 while (irq_counter[gpio] < fiq_count) {
64 if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) { 64 if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) {
65 struct irq_data *d = irq_get_irq_data(irq_num);
66
65 /* 67 /*
66 * It looks like handle_edge_irq() that 68 * It looks like handle_edge_irq() that
67 * OMAP GPIO edge interrupts default to, 69 * OMAP GPIO edge interrupts default to,
68 * expects interrupt already unmasked. 70 * expects interrupt already unmasked.
69 */ 71 */
70 if (irq_chip && irq_chip->unmask) 72 if (irq_chip && irq_chip->irq_unmask)
71 irq_chip->unmask(irq_num); 73 irq_chip->irq_unmask(d);
72 } 74 }
73 generic_handle_irq(irq_num); 75 generic_handle_irq(irq_num);
74 76
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 41992ab71961..f49ce85d2448 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -16,15 +16,19 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/input.h> 17#include <linux/input.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/leds.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/serial_8250.h> 21#include <linux/serial_8250.h>
21 22
23#include <media/soc_camera.h>
24
22#include <asm/serial.h> 25#include <asm/serial.h>
23#include <mach/hardware.h> 26#include <mach/hardware.h>
24#include <asm/mach-types.h> 27#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 29#include <asm/mach/map.h>
27 30
31#include <plat/io.h>
28#include <plat/board-ams-delta.h> 32#include <plat/board-ams-delta.h>
29#include <mach/gpio.h> 33#include <mach/gpio.h>
30#include <plat/keypad.h> 34#include <plat/keypad.h>
@@ -32,90 +36,89 @@
32#include <plat/usb.h> 36#include <plat/usb.h>
33#include <plat/board.h> 37#include <plat/board.h>
34#include <plat/common.h> 38#include <plat/common.h>
39#include <mach/camera.h>
35 40
36#include <mach/ams-delta-fiq.h> 41#include <mach/ams-delta-fiq.h>
37 42
38static u8 ams_delta_latch1_reg; 43static u8 ams_delta_latch1_reg;
39static u16 ams_delta_latch2_reg; 44static u16 ams_delta_latch2_reg;
40 45
41static int ams_delta_keymap[] = { 46static const unsigned int ams_delta_keymap[] = {
42 KEY(0, 0, KEY_F1), /* Advert */ 47 KEY(0, 0, KEY_F1), /* Advert */
43 48
44 KEY(3, 0, KEY_COFFEE), /* Games */ 49 KEY(0, 3, KEY_COFFEE), /* Games */
45 KEY(2, 0, KEY_QUESTION), /* Directory */ 50 KEY(0, 2, KEY_QUESTION), /* Directory */
46 KEY(3, 2, KEY_CONNECT), /* Internet */ 51 KEY(2, 3, KEY_CONNECT), /* Internet */
47 KEY(2, 1, KEY_SHOP), /* Services */ 52 KEY(1, 2, KEY_SHOP), /* Services */
48 KEY(1, 1, KEY_PHONE), /* VoiceMail */ 53 KEY(1, 1, KEY_PHONE), /* VoiceMail */
49 54
50 KEY(1, 0, KEY_DELETE), /* Delete */ 55 KEY(0, 1, KEY_DELETE), /* Delete */
51 KEY(2, 2, KEY_PLAY), /* Play */ 56 KEY(2, 2, KEY_PLAY), /* Play */
52 KEY(0, 1, KEY_PAGEUP), /* Up */ 57 KEY(1, 0, KEY_PAGEUP), /* Up */
53 KEY(3, 1, KEY_PAGEDOWN), /* Down */ 58 KEY(1, 3, KEY_PAGEDOWN), /* Down */
54 KEY(0, 2, KEY_EMAIL), /* ReadEmail */ 59 KEY(2, 0, KEY_EMAIL), /* ReadEmail */
55 KEY(1, 2, KEY_STOP), /* Stop */ 60 KEY(2, 1, KEY_STOP), /* Stop */
56 61
57 /* Numeric keypad portion */ 62 /* Numeric keypad portion */
58 KEY(7, 0, KEY_KP1), 63 KEY(0, 7, KEY_KP1),
59 KEY(6, 0, KEY_KP2), 64 KEY(0, 6, KEY_KP2),
60 KEY(5, 0, KEY_KP3), 65 KEY(0, 5, KEY_KP3),
61 KEY(7, 1, KEY_KP4), 66 KEY(1, 7, KEY_KP4),
62 KEY(6, 1, KEY_KP5), 67 KEY(1, 6, KEY_KP5),
63 KEY(5, 1, KEY_KP6), 68 KEY(1, 5, KEY_KP6),
64 KEY(7, 2, KEY_KP7), 69 KEY(2, 7, KEY_KP7),
65 KEY(6, 2, KEY_KP8), 70 KEY(2, 6, KEY_KP8),
66 KEY(5, 2, KEY_KP9), 71 KEY(2, 5, KEY_KP9),
67 KEY(6, 3, KEY_KP0), 72 KEY(3, 6, KEY_KP0),
68 KEY(7, 3, KEY_KPASTERISK), 73 KEY(3, 7, KEY_KPASTERISK),
69 KEY(5, 3, KEY_KPDOT), /* # key */ 74 KEY(3, 5, KEY_KPDOT), /* # key */
70 KEY(2, 7, KEY_NUMLOCK), /* Mute */ 75 KEY(7, 2, KEY_NUMLOCK), /* Mute */
71 KEY(1, 7, KEY_KPMINUS), /* Recall */ 76 KEY(7, 1, KEY_KPMINUS), /* Recall */
72 KEY(1, 6, KEY_KPPLUS), /* Redial */ 77 KEY(6, 1, KEY_KPPLUS), /* Redial */
73 KEY(6, 7, KEY_KPSLASH), /* Handsfree */ 78 KEY(7, 6, KEY_KPSLASH), /* Handsfree */
74 KEY(0, 6, KEY_ENTER), /* Video */ 79 KEY(6, 0, KEY_ENTER), /* Video */
75 80
76 KEY(4, 7, KEY_CAMERA), /* Photo */ 81 KEY(7, 4, KEY_CAMERA), /* Photo */
77 82
78 KEY(4, 0, KEY_F2), /* Home */ 83 KEY(0, 4, KEY_F2), /* Home */
79 KEY(4, 1, KEY_F3), /* Office */ 84 KEY(1, 4, KEY_F3), /* Office */
80 KEY(4, 2, KEY_F4), /* Mobile */ 85 KEY(2, 4, KEY_F4), /* Mobile */
81 KEY(7, 7, KEY_F5), /* SMS */ 86 KEY(7, 7, KEY_F5), /* SMS */
82 KEY(5, 7, KEY_F6), /* Email */ 87 KEY(7, 5, KEY_F6), /* Email */
83 88
84 /* QWERTY portion of keypad */ 89 /* QWERTY portion of keypad */
85 KEY(4, 3, KEY_Q), 90 KEY(3, 4, KEY_Q),
86 KEY(3, 3, KEY_W), 91 KEY(3, 3, KEY_W),
87 KEY(2, 3, KEY_E), 92 KEY(3, 2, KEY_E),
88 KEY(1, 3, KEY_R), 93 KEY(3, 1, KEY_R),
89 KEY(0, 3, KEY_T), 94 KEY(3, 0, KEY_T),
90 KEY(7, 4, KEY_Y), 95 KEY(4, 7, KEY_Y),
91 KEY(6, 4, KEY_U), 96 KEY(4, 6, KEY_U),
92 KEY(5, 4, KEY_I), 97 KEY(4, 5, KEY_I),
93 KEY(4, 4, KEY_O), 98 KEY(4, 4, KEY_O),
94 KEY(3, 4, KEY_P), 99 KEY(4, 3, KEY_P),
95 100
96 KEY(2, 4, KEY_A), 101 KEY(4, 2, KEY_A),
97 KEY(1, 4, KEY_S), 102 KEY(4, 1, KEY_S),
98 KEY(0, 4, KEY_D), 103 KEY(4, 0, KEY_D),
99 KEY(7, 5, KEY_F), 104 KEY(5, 7, KEY_F),
100 KEY(6, 5, KEY_G), 105 KEY(5, 6, KEY_G),
101 KEY(5, 5, KEY_H), 106 KEY(5, 5, KEY_H),
102 KEY(4, 5, KEY_J), 107 KEY(5, 4, KEY_J),
103 KEY(3, 5, KEY_K), 108 KEY(5, 3, KEY_K),
104 KEY(2, 5, KEY_L), 109 KEY(5, 2, KEY_L),
105 110
106 KEY(1, 5, KEY_Z), 111 KEY(5, 1, KEY_Z),
107 KEY(0, 5, KEY_X), 112 KEY(5, 0, KEY_X),
108 KEY(7, 6, KEY_C), 113 KEY(6, 7, KEY_C),
109 KEY(6, 6, KEY_V), 114 KEY(6, 6, KEY_V),
110 KEY(5, 6, KEY_B), 115 KEY(6, 5, KEY_B),
111 KEY(4, 6, KEY_N), 116 KEY(6, 4, KEY_N),
112 KEY(3, 6, KEY_M), 117 KEY(6, 3, KEY_M),
113 KEY(2, 6, KEY_SPACE), 118 KEY(6, 2, KEY_SPACE),
114
115 KEY(0, 7, KEY_LEFTSHIFT), /* Vol up */
116 KEY(3, 7, KEY_LEFTCTRL), /* Vol down */
117 119
118 0 120 KEY(7, 0, KEY_LEFTSHIFT), /* Vol up */
121 KEY(7, 3, KEY_LEFTCTRL), /* Vol down */
119}; 122};
120 123
121void ams_delta_latch1_write(u8 mask, u8 value) 124void ams_delta_latch1_write(u8 mask, u8 value)
@@ -136,7 +139,6 @@ static void __init ams_delta_init_irq(void)
136{ 139{
137 omap1_init_common_hw(); 140 omap1_init_common_hw();
138 omap_init_irq(); 141 omap_init_irq();
139 omap_gpio_init();
140} 142}
141 143
142static struct map_desc ams_delta_io_desc[] __initdata = { 144static struct map_desc ams_delta_io_desc[] __initdata = {
@@ -163,7 +165,7 @@ static struct map_desc ams_delta_io_desc[] __initdata = {
163 } 165 }
164}; 166};
165 167
166static struct omap_lcd_config ams_delta_lcd_config __initdata = { 168static struct omap_lcd_config ams_delta_lcd_config = {
167 .ctrl_name = "internal", 169 .ctrl_name = "internal",
168}; 170};
169 171
@@ -173,10 +175,26 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
173 .pins[0] = 2, 175 .pins[0] = 2,
174}; 176};
175 177
176static struct omap_board_config_kernel ams_delta_config[] = { 178static struct omap_board_config_kernel ams_delta_config[] __initdata = {
177 { OMAP_TAG_LCD, &ams_delta_lcd_config }, 179 { OMAP_TAG_LCD, &ams_delta_lcd_config },
178}; 180};
179 181
182static struct resource ams_delta_nand_resources[] = {
183 [0] = {
184 .start = OMAP1_MPUIO_BASE,
185 .end = OMAP1_MPUIO_BASE +
186 OMAP_MPUIO_IO_CNTL + sizeof(u32) - 1,
187 .flags = IORESOURCE_MEM,
188 },
189};
190
191static struct platform_device ams_delta_nand_device = {
192 .name = "ams-delta-nand",
193 .id = -1,
194 .num_resources = ARRAY_SIZE(ams_delta_nand_resources),
195 .resource = ams_delta_nand_resources,
196};
197
180static struct resource ams_delta_kp_resources[] = { 198static struct resource ams_delta_kp_resources[] = {
181 [0] = { 199 [0] = {
182 .start = INT_KEYBOARD, 200 .start = INT_KEYBOARD,
@@ -185,11 +203,15 @@ static struct resource ams_delta_kp_resources[] = {
185 }, 203 },
186}; 204};
187 205
188static struct omap_kp_platform_data ams_delta_kp_data = { 206static const struct matrix_keymap_data ams_delta_keymap_data = {
207 .keymap = ams_delta_keymap,
208 .keymap_size = ARRAY_SIZE(ams_delta_keymap),
209};
210
211static struct omap_kp_platform_data ams_delta_kp_data __initdata = {
189 .rows = 8, 212 .rows = 8,
190 .cols = 8, 213 .cols = 8,
191 .keymap = ams_delta_keymap, 214 .keymap_data = &ams_delta_keymap_data,
192 .keymapsize = ARRAY_SIZE(ams_delta_keymap),
193 .delay = 9, 215 .delay = 9,
194}; 216};
195 217
@@ -213,10 +235,57 @@ static struct platform_device ams_delta_led_device = {
213 .id = -1 235 .id = -1
214}; 236};
215 237
238static struct i2c_board_info ams_delta_camera_board_info[] = {
239 {
240 I2C_BOARD_INFO("ov6650", 0x60),
241 },
242};
243
244#ifdef CONFIG_LEDS_TRIGGERS
245DEFINE_LED_TRIGGER(ams_delta_camera_led_trigger);
246
247static int ams_delta_camera_power(struct device *dev, int power)
248{
249 /*
250 * turn on camera LED
251 */
252 if (power)
253 led_trigger_event(ams_delta_camera_led_trigger, LED_FULL);
254 else
255 led_trigger_event(ams_delta_camera_led_trigger, LED_OFF);
256 return 0;
257}
258#else
259#define ams_delta_camera_power NULL
260#endif
261
262static struct soc_camera_link ams_delta_iclink = {
263 .bus_id = 0, /* OMAP1 SoC camera bus */
264 .i2c_adapter_id = 1,
265 .board_info = &ams_delta_camera_board_info[0],
266 .module_name = "ov6650",
267 .power = ams_delta_camera_power,
268};
269
270static struct platform_device ams_delta_camera_device = {
271 .name = "soc-camera-pdrv",
272 .id = 0,
273 .dev = {
274 .platform_data = &ams_delta_iclink,
275 },
276};
277
278static struct omap1_cam_platform_data ams_delta_camera_platform_data = {
279 .camexclk_khz = 12000, /* default 12MHz clock, no extra DPLL */
280 .lclk_khz_max = 1334, /* results in 5fps CIF, 10fps QCIF */
281};
282
216static struct platform_device *ams_delta_devices[] __initdata = { 283static struct platform_device *ams_delta_devices[] __initdata = {
284 &ams_delta_nand_device,
217 &ams_delta_kp_device, 285 &ams_delta_kp_device,
218 &ams_delta_lcd_device, 286 &ams_delta_lcd_device,
219 &ams_delta_led_device, 287 &ams_delta_led_device,
288 &ams_delta_camera_device,
220}; 289};
221 290
222static void __init ams_delta_init(void) 291static void __init ams_delta_init(void)
@@ -225,6 +294,20 @@ static void __init ams_delta_init(void)
225 omap_cfg_reg(UART1_TX); 294 omap_cfg_reg(UART1_TX);
226 omap_cfg_reg(UART1_RTS); 295 omap_cfg_reg(UART1_RTS);
227 296
297 /* parallel camera interface */
298 omap_cfg_reg(H19_1610_CAM_EXCLK);
299 omap_cfg_reg(J15_1610_CAM_LCLK);
300 omap_cfg_reg(L18_1610_CAM_VS);
301 omap_cfg_reg(L15_1610_CAM_HS);
302 omap_cfg_reg(L19_1610_CAM_D0);
303 omap_cfg_reg(K14_1610_CAM_D1);
304 omap_cfg_reg(K15_1610_CAM_D2);
305 omap_cfg_reg(K19_1610_CAM_D3);
306 omap_cfg_reg(K18_1610_CAM_D4);
307 omap_cfg_reg(J14_1610_CAM_D5);
308 omap_cfg_reg(J19_1610_CAM_D6);
309 omap_cfg_reg(J18_1610_CAM_D7);
310
228 iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc)); 311 iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
229 312
230 omap_board_config = ams_delta_config; 313 omap_board_config = ams_delta_config;
@@ -236,18 +319,21 @@ static void __init ams_delta_init(void)
236 ams_delta_latch2_write(~0, 0); 319 ams_delta_latch2_write(~0, 0);
237 320
238 omap1_usb_init(&ams_delta_usb_config); 321 omap1_usb_init(&ams_delta_usb_config);
322 omap1_set_camera_info(&ams_delta_camera_platform_data);
323#ifdef CONFIG_LEDS_TRIGGERS
324 led_trigger_register_simple("ams_delta_camera",
325 &ams_delta_camera_led_trigger);
326#endif
239 platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); 327 platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
240 328
241#ifdef CONFIG_AMS_DELTA_FIQ
242 ams_delta_init_fiq(); 329 ams_delta_init_fiq();
243#endif
244 330
245 omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1); 331 omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
246} 332}
247 333
248static struct plat_serial8250_port ams_delta_modem_ports[] = { 334static struct plat_serial8250_port ams_delta_modem_ports[] = {
249 { 335 {
250 .membase = (void *) AMS_DELTA_MODEM_VIRT, 336 .membase = IOMEM(AMS_DELTA_MODEM_VIRT),
251 .mapbase = AMS_DELTA_MODEM_PHYS, 337 .mapbase = AMS_DELTA_MODEM_PHYS,
252 .irq = -EINVAL, /* changed later */ 338 .irq = -EINVAL, /* changed later */
253 .flags = UPF_BOOT_AUTOCONF, 339 .flags = UPF_BOOT_AUTOCONF,
@@ -271,6 +357,9 @@ static int __init ams_delta_modem_init(void)
271{ 357{
272 int err; 358 int err;
273 359
360 if (!machine_is_ams_delta())
361 return -ENODEV;
362
274 omap_cfg_reg(M14_1510_GPIO2); 363 omap_cfg_reg(M14_1510_GPIO2);
275 ams_delta_modem_ports[0].irq = 364 ams_delta_modem_ports[0].irq =
276 gpio_to_irq(AMS_DELTA_GPIO_PIN_MODEM_IRQ); 365 gpio_to_irq(AMS_DELTA_GPIO_PIN_MODEM_IRQ);
@@ -297,8 +386,6 @@ static void __init ams_delta_map_io(void)
297 386
298MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") 387MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
299 /* Maintainer: Jonathan McDowell <noodles@earth.li> */ 388 /* Maintainer: Jonathan McDowell <noodles@earth.li> */
300 .phys_io = 0xfff00000,
301 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
302 .boot_params = 0x10000100, 389 .boot_params = 0x10000100,
303 .map_io = ams_delta_map_io, 390 .map_io = ams_delta_map_io,
304 .reserve = omap_reserve, 391 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 180ce79e5eac..87f173d93557 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -69,36 +69,35 @@
69#define fsample_cpld_clear(bit) \ 69#define fsample_cpld_clear(bit) \
70 fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) 70 fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
71 71
72static int fsample_keymap[] = { 72static const unsigned int fsample_keymap[] = {
73 KEY(0,0,KEY_UP), 73 KEY(0, 0, KEY_UP),
74 KEY(0,1,KEY_RIGHT), 74 KEY(1, 0, KEY_RIGHT),
75 KEY(0,2,KEY_LEFT), 75 KEY(2, 0, KEY_LEFT),
76 KEY(0,3,KEY_DOWN), 76 KEY(3, 0, KEY_DOWN),
77 KEY(0,4,KEY_ENTER), 77 KEY(4, 0, KEY_ENTER),
78 KEY(1,0,KEY_F10), 78 KEY(0, 1, KEY_F10),
79 KEY(1,1,KEY_SEND), 79 KEY(1, 1, KEY_SEND),
80 KEY(1,2,KEY_END), 80 KEY(2, 1, KEY_END),
81 KEY(1,3,KEY_VOLUMEDOWN), 81 KEY(3, 1, KEY_VOLUMEDOWN),
82 KEY(1,4,KEY_VOLUMEUP), 82 KEY(4, 1, KEY_VOLUMEUP),
83 KEY(1,5,KEY_RECORD), 83 KEY(5, 1, KEY_RECORD),
84 KEY(2,0,KEY_F9), 84 KEY(0, 2, KEY_F9),
85 KEY(2,1,KEY_3), 85 KEY(1, 2, KEY_3),
86 KEY(2,2,KEY_6), 86 KEY(2, 2, KEY_6),
87 KEY(2,3,KEY_9), 87 KEY(3, 2, KEY_9),
88 KEY(2,4,KEY_KPDOT), 88 KEY(4, 2, KEY_KPDOT),
89 KEY(3,0,KEY_BACK), 89 KEY(0, 3, KEY_BACK),
90 KEY(3,1,KEY_2), 90 KEY(1, 3, KEY_2),
91 KEY(3,2,KEY_5), 91 KEY(2, 3, KEY_5),
92 KEY(3,3,KEY_8), 92 KEY(3, 3, KEY_8),
93 KEY(3,4,KEY_0), 93 KEY(4, 3, KEY_0),
94 KEY(3,5,KEY_KPSLASH), 94 KEY(5, 3, KEY_KPSLASH),
95 KEY(4,0,KEY_HOME), 95 KEY(0, 4, KEY_HOME),
96 KEY(4,1,KEY_1), 96 KEY(1, 4, KEY_1),
97 KEY(4,2,KEY_4), 97 KEY(2, 4, KEY_4),
98 KEY(4,3,KEY_7), 98 KEY(3, 4, KEY_7),
99 KEY(4,4,KEY_KPASTERISK), 99 KEY(4, 4, KEY_KPASTERISK),
100 KEY(4,5,KEY_POWER), 100 KEY(5, 4, KEY_POWER),
101 0
102}; 101};
103 102
104static struct smc91x_platdata smc91x_info = { 103static struct smc91x_platdata smc91x_info = {
@@ -120,6 +119,15 @@ static struct resource smc91x_resources[] = {
120 }, 119 },
121}; 120};
122 121
122static void __init fsample_init_smc91x(void)
123{
124 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
125 mdelay(50);
126 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
127 H2P2_DBG_FPGA_LAN_RESET);
128 mdelay(50);
129}
130
123static struct mtd_partition nor_partitions[] = { 131static struct mtd_partition nor_partitions[] = {
124 /* bootloader (U-Boot, etc) in first sector */ 132 /* bootloader (U-Boot, etc) in first sector */
125 { 133 {
@@ -244,11 +252,15 @@ static struct resource kp_resources[] = {
244 }, 252 },
245}; 253};
246 254
255static const struct matrix_keymap_data fsample_keymap_data = {
256 .keymap = fsample_keymap,
257 .keymap_size = ARRAY_SIZE(fsample_keymap),
258};
259
247static struct omap_kp_platform_data kp_data = { 260static struct omap_kp_platform_data kp_data = {
248 .rows = 8, 261 .rows = 8,
249 .cols = 8, 262 .cols = 8,
250 .keymap = fsample_keymap, 263 .keymap_data = &fsample_keymap_data,
251 .keymapsize = ARRAY_SIZE(fsample_keymap),
252 .delay = 4, 264 .delay = 4,
253}; 265};
254 266
@@ -275,16 +287,18 @@ static struct platform_device *devices[] __initdata = {
275 &lcd_device, 287 &lcd_device,
276}; 288};
277 289
278static struct omap_lcd_config fsample_lcd_config __initdata = { 290static struct omap_lcd_config fsample_lcd_config = {
279 .ctrl_name = "internal", 291 .ctrl_name = "internal",
280}; 292};
281 293
282static struct omap_board_config_kernel fsample_config[] = { 294static struct omap_board_config_kernel fsample_config[] __initdata = {
283 { OMAP_TAG_LCD, &fsample_lcd_config }, 295 { OMAP_TAG_LCD, &fsample_lcd_config },
284}; 296};
285 297
286static void __init omap_fsample_init(void) 298static void __init omap_fsample_init(void)
287{ 299{
300 fsample_init_smc91x();
301
288 if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0) 302 if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
289 BUG(); 303 BUG();
290 gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN); 304 gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
@@ -312,21 +326,10 @@ static void __init omap_fsample_init(void)
312 omap_register_i2c_bus(1, 100, NULL, 0); 326 omap_register_i2c_bus(1, 100, NULL, 0);
313} 327}
314 328
315static void __init fsample_init_smc91x(void)
316{
317 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
318 mdelay(50);
319 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
320 H2P2_DBG_FPGA_LAN_RESET);
321 mdelay(50);
322}
323
324static void __init omap_fsample_init_irq(void) 329static void __init omap_fsample_init_irq(void)
325{ 330{
326 omap1_init_common_hw(); 331 omap1_init_common_hw();
327 omap_init_irq(); 332 omap_init_irq();
328 omap_gpio_init();
329 fsample_init_smc91x();
330} 333}
331 334
332/* Only FPGA needs to be mapped here. All others are done with ioremap */ 335/* Only FPGA needs to be mapped here. All others are done with ioremap */
@@ -386,8 +389,6 @@ static void __init omap_fsample_map_io(void)
386 389
387MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") 390MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
388/* Maintainer: Brian Swetland <swetland@google.com> */ 391/* Maintainer: Brian Swetland <swetland@google.com> */
389 .phys_io = 0xfff00000,
390 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
391 .boot_params = 0x10000100, 392 .boot_params = 0x10000100,
392 .map_io = omap_fsample_map_io, 393 .map_io = omap_fsample_map_io,
393 .reserve = omap_reserve, 394 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 93b9ab8fc3be..23f4ab9e2651 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -94,8 +94,6 @@ static void __init omap_generic_map_io(void)
94 94
95MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") 95MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
96 /* Maintainer: Tony Lindgren <tony@atomide.com> */ 96 /* Maintainer: Tony Lindgren <tony@atomide.com> */
97 .phys_io = 0xfff00000,
98 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
99 .boot_params = 0x10000100, 97 .boot_params = 0x10000100,
100 .map_io = omap_generic_map_io, 98 .map_io = omap_generic_map_io,
101 .reserve = omap_reserve, 99 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index b30c4990744d..f2fc43d8382b 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -58,8 +58,7 @@ static struct omap_mmc_platform_data mmc1_data = {
58 .dma_mask = 0xffffffff, 58 .dma_mask = 0xffffffff,
59 .slots[0] = { 59 .slots[0] = {
60 .set_power = mmc_set_power, 60 .set_power = mmc_set_power,
61 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | 61 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
62 MMC_VDD_32_33 | MMC_VDD_33_34,
63 .name = "mmcblk", 62 .name = "mmcblk",
64 }, 63 },
65}; 64};
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index d2cda58bcc48..ba3bd09c4754 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -52,43 +52,42 @@
52/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 52/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
53#define OMAP1610_ETHR_START 0x04000300 53#define OMAP1610_ETHR_START 0x04000300
54 54
55static int h2_keymap[] = { 55static const unsigned int h2_keymap[] = {
56 KEY(0, 0, KEY_LEFT), 56 KEY(0, 0, KEY_LEFT),
57 KEY(0, 1, KEY_RIGHT), 57 KEY(1, 0, KEY_RIGHT),
58 KEY(0, 2, KEY_3), 58 KEY(2, 0, KEY_3),
59 KEY(0, 3, KEY_F10), 59 KEY(3, 0, KEY_F10),
60 KEY(0, 4, KEY_F5), 60 KEY(4, 0, KEY_F5),
61 KEY(0, 5, KEY_9), 61 KEY(5, 0, KEY_9),
62 KEY(1, 0, KEY_DOWN), 62 KEY(0, 1, KEY_DOWN),
63 KEY(1, 1, KEY_UP), 63 KEY(1, 1, KEY_UP),
64 KEY(1, 2, KEY_2), 64 KEY(2, 1, KEY_2),
65 KEY(1, 3, KEY_F9), 65 KEY(3, 1, KEY_F9),
66 KEY(1, 4, KEY_F7), 66 KEY(4, 1, KEY_F7),
67 KEY(1, 5, KEY_0), 67 KEY(5, 1, KEY_0),
68 KEY(2, 0, KEY_ENTER), 68 KEY(0, 2, KEY_ENTER),
69 KEY(2, 1, KEY_6), 69 KEY(1, 2, KEY_6),
70 KEY(2, 2, KEY_1), 70 KEY(2, 2, KEY_1),
71 KEY(2, 3, KEY_F2), 71 KEY(3, 2, KEY_F2),
72 KEY(2, 4, KEY_F6), 72 KEY(4, 2, KEY_F6),
73 KEY(2, 5, KEY_HOME), 73 KEY(5, 2, KEY_HOME),
74 KEY(3, 0, KEY_8), 74 KEY(0, 3, KEY_8),
75 KEY(3, 1, KEY_5), 75 KEY(1, 3, KEY_5),
76 KEY(3, 2, KEY_F12), 76 KEY(2, 3, KEY_F12),
77 KEY(3, 3, KEY_F3), 77 KEY(3, 3, KEY_F3),
78 KEY(3, 4, KEY_F8), 78 KEY(4, 3, KEY_F8),
79 KEY(3, 5, KEY_END), 79 KEY(5, 3, KEY_END),
80 KEY(4, 0, KEY_7), 80 KEY(0, 4, KEY_7),
81 KEY(4, 1, KEY_4), 81 KEY(1, 4, KEY_4),
82 KEY(4, 2, KEY_F11), 82 KEY(2, 4, KEY_F11),
83 KEY(4, 3, KEY_F1), 83 KEY(3, 4, KEY_F1),
84 KEY(4, 4, KEY_F4), 84 KEY(4, 4, KEY_F4),
85 KEY(4, 5, KEY_ESC), 85 KEY(5, 4, KEY_ESC),
86 KEY(5, 0, KEY_F13), 86 KEY(0, 5, KEY_F13),
87 KEY(5, 1, KEY_F14), 87 KEY(1, 5, KEY_F14),
88 KEY(5, 2, KEY_F15), 88 KEY(2, 5, KEY_F15),
89 KEY(5, 3, KEY_F16), 89 KEY(3, 5, KEY_F16),
90 KEY(5, 4, KEY_SLEEP), 90 KEY(4, 5, KEY_SLEEP),
91 0
92}; 91};
93 92
94static struct mtd_partition h2_nor_partitions[] = { 93static struct mtd_partition h2_nor_partitions[] = {
@@ -203,7 +202,7 @@ static int h2_nand_dev_ready(struct mtd_info *mtd)
203 202
204static const char *h2_part_probes[] = { "cmdlinepart", NULL }; 203static const char *h2_part_probes[] = { "cmdlinepart", NULL };
205 204
206struct platform_nand_data h2_nand_platdata = { 205static struct platform_nand_data h2_nand_platdata = {
207 .chip = { 206 .chip = {
208 .nr_chips = 1, 207 .nr_chips = 1,
209 .chip_offset = 0, 208 .chip_offset = 0,
@@ -270,14 +269,18 @@ static struct resource h2_kp_resources[] = {
270 }, 269 },
271}; 270};
272 271
272static const struct matrix_keymap_data h2_keymap_data = {
273 .keymap = h2_keymap,
274 .keymap_size = ARRAY_SIZE(h2_keymap),
275};
276
273static struct omap_kp_platform_data h2_kp_data = { 277static struct omap_kp_platform_data h2_kp_data = {
274 .rows = 8, 278 .rows = 8,
275 .cols = 8, 279 .cols = 8,
276 .keymap = h2_keymap, 280 .keymap_data = &h2_keymap_data,
277 .keymapsize = ARRAY_SIZE(h2_keymap), 281 .rep = true,
278 .rep = 1,
279 .delay = 9, 282 .delay = 9,
280 .dbounce = 1, 283 .dbounce = true,
281}; 284};
282 285
283static struct platform_device h2_kp_device = { 286static struct platform_device h2_kp_device = {
@@ -374,8 +377,6 @@ static void __init h2_init_irq(void)
374{ 377{
375 omap1_init_common_hw(); 378 omap1_init_common_hw();
376 omap_init_irq(); 379 omap_init_irq();
377 omap_gpio_init();
378 h2_init_smc91x();
379} 380}
380 381
381static struct omap_usb_config h2_usb_config __initdata = { 382static struct omap_usb_config h2_usb_config __initdata = {
@@ -403,6 +404,8 @@ static struct omap_board_config_kernel h2_config[] __initdata = {
403 404
404static void __init h2_init(void) 405static void __init h2_init(void)
405{ 406{
407 h2_init_smc91x();
408
406 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped 409 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
407 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will 410 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
408 * notice whether a NAND chip is enabled at probe time. 411 * notice whether a NAND chip is enabled at probe time.
@@ -458,8 +461,6 @@ static void __init h2_map_io(void)
458 461
459MACHINE_START(OMAP_H2, "TI-H2") 462MACHINE_START(OMAP_H2, "TI-H2")
460 /* Maintainer: Imre Deak <imre.deak@nokia.com> */ 463 /* Maintainer: Imre Deak <imre.deak@nokia.com> */
461 .phys_io = 0xfff00000,
462 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
463 .boot_params = 0x10000100, 464 .boot_params = 0x10000100,
464 .map_io = h2_map_io, 465 .map_io = h2_map_io,
465 .reserve = omap_reserve, 466 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index 54b0f063e263..2098525e7cc5 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -40,8 +40,7 @@ static struct omap_mmc_platform_data mmc1_data = {
40 .dma_mask = 0xffffffff, 40 .dma_mask = 0xffffffff,
41 .slots[0] = { 41 .slots[0] = {
42 .set_power = mmc_set_power, 42 .set_power = mmc_set_power,
43 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | 43 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
44 MMC_VDD_32_33 | MMC_VDD_33_34,
45 .name = "mmcblk", 44 .name = "mmcblk",
46 }, 45 },
47}; 46};
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index c2ef4ff846c7..ac48677672ee 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -56,43 +56,42 @@
56 56
57#define H3_TS_GPIO 48 57#define H3_TS_GPIO 48
58 58
59static int h3_keymap[] = { 59static const unsigned int h3_keymap[] = {
60 KEY(0, 0, KEY_LEFT), 60 KEY(0, 0, KEY_LEFT),
61 KEY(0, 1, KEY_RIGHT), 61 KEY(1, 0, KEY_RIGHT),
62 KEY(0, 2, KEY_3), 62 KEY(2, 0, KEY_3),
63 KEY(0, 3, KEY_F10), 63 KEY(3, 0, KEY_F10),
64 KEY(0, 4, KEY_F5), 64 KEY(4, 0, KEY_F5),
65 KEY(0, 5, KEY_9), 65 KEY(5, 0, KEY_9),
66 KEY(1, 0, KEY_DOWN), 66 KEY(0, 1, KEY_DOWN),
67 KEY(1, 1, KEY_UP), 67 KEY(1, 1, KEY_UP),
68 KEY(1, 2, KEY_2), 68 KEY(2, 1, KEY_2),
69 KEY(1, 3, KEY_F9), 69 KEY(3, 1, KEY_F9),
70 KEY(1, 4, KEY_F7), 70 KEY(4, 1, KEY_F7),
71 KEY(1, 5, KEY_0), 71 KEY(5, 1, KEY_0),
72 KEY(2, 0, KEY_ENTER), 72 KEY(0, 2, KEY_ENTER),
73 KEY(2, 1, KEY_6), 73 KEY(1, 2, KEY_6),
74 KEY(2, 2, KEY_1), 74 KEY(2, 2, KEY_1),
75 KEY(2, 3, KEY_F2), 75 KEY(3, 2, KEY_F2),
76 KEY(2, 4, KEY_F6), 76 KEY(4, 2, KEY_F6),
77 KEY(2, 5, KEY_HOME), 77 KEY(5, 2, KEY_HOME),
78 KEY(3, 0, KEY_8), 78 KEY(0, 3, KEY_8),
79 KEY(3, 1, KEY_5), 79 KEY(1, 3, KEY_5),
80 KEY(3, 2, KEY_F12), 80 KEY(2, 3, KEY_F12),
81 KEY(3, 3, KEY_F3), 81 KEY(3, 3, KEY_F3),
82 KEY(3, 4, KEY_F8), 82 KEY(4, 3, KEY_F8),
83 KEY(3, 5, KEY_END), 83 KEY(5, 3, KEY_END),
84 KEY(4, 0, KEY_7), 84 KEY(0, 4, KEY_7),
85 KEY(4, 1, KEY_4), 85 KEY(1, 4, KEY_4),
86 KEY(4, 2, KEY_F11), 86 KEY(2, 4, KEY_F11),
87 KEY(4, 3, KEY_F1), 87 KEY(3, 4, KEY_F1),
88 KEY(4, 4, KEY_F4), 88 KEY(4, 4, KEY_F4),
89 KEY(4, 5, KEY_ESC), 89 KEY(5, 4, KEY_ESC),
90 KEY(5, 0, KEY_F13), 90 KEY(0, 5, KEY_F13),
91 KEY(5, 1, KEY_F14), 91 KEY(1, 5, KEY_F14),
92 KEY(5, 2, KEY_F15), 92 KEY(2, 5, KEY_F15),
93 KEY(5, 3, KEY_F16), 93 KEY(3, 5, KEY_F16),
94 KEY(5, 4, KEY_SLEEP), 94 KEY(4, 5, KEY_SLEEP),
95 0
96}; 95};
97 96
98 97
@@ -205,7 +204,7 @@ static int nand_dev_ready(struct mtd_info *mtd)
205 204
206static const char *part_probes[] = { "cmdlinepart", NULL }; 205static const char *part_probes[] = { "cmdlinepart", NULL };
207 206
208struct platform_nand_data nand_platdata = { 207static struct platform_nand_data nand_platdata = {
209 .chip = { 208 .chip = {
210 .nr_chips = 1, 209 .nr_chips = 1,
211 .chip_offset = 0, 210 .chip_offset = 0,
@@ -264,6 +263,15 @@ static struct platform_device smc91x_device = {
264 .resource = smc91x_resources, 263 .resource = smc91x_resources,
265}; 264};
266 265
266static void __init h3_init_smc91x(void)
267{
268 omap_cfg_reg(W15_1710_GPIO40);
269 if (gpio_request(40, "SMC91x irq") < 0) {
270 printk("Error requesting gpio 40 for smc91x irq\n");
271 return;
272 }
273}
274
267#define GPTIMER_BASE 0xFFFB1400 275#define GPTIMER_BASE 0xFFFB1400
268#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800)) 276#define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
269#define GPTIMER_REGS_SIZE 0x46 277#define GPTIMER_REGS_SIZE 0x46
@@ -296,14 +304,18 @@ static struct resource h3_kp_resources[] = {
296 }, 304 },
297}; 305};
298 306
307static const struct matrix_keymap_data h3_keymap_data = {
308 .keymap = h3_keymap,
309 .keymap_size = ARRAY_SIZE(h3_keymap),
310};
311
299static struct omap_kp_platform_data h3_kp_data = { 312static struct omap_kp_platform_data h3_kp_data = {
300 .rows = 8, 313 .rows = 8,
301 .cols = 8, 314 .cols = 8,
302 .keymap = h3_keymap, 315 .keymap_data = &h3_keymap_data,
303 .keymapsize = ARRAY_SIZE(h3_keymap), 316 .rep = true,
304 .rep = 1,
305 .delay = 9, 317 .delay = 9,
306 .dbounce = 1, 318 .dbounce = true,
307}; 319};
308 320
309static struct platform_device h3_kp_device = { 321static struct platform_device h3_kp_device = {
@@ -376,6 +388,8 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = {
376 388
377static void __init h3_init(void) 389static void __init h3_init(void)
378{ 390{
391 h3_init_smc91x();
392
379 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped 393 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
380 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will 394 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
381 * notice whether a NAND chip is enabled at probe time. 395 * notice whether a NAND chip is enabled at probe time.
@@ -422,21 +436,10 @@ static void __init h3_init(void)
422 h3_mmc_init(); 436 h3_mmc_init();
423} 437}
424 438
425static void __init h3_init_smc91x(void)
426{
427 omap_cfg_reg(W15_1710_GPIO40);
428 if (gpio_request(40, "SMC91x irq") < 0) {
429 printk("Error requesting gpio 40 for smc91x irq\n");
430 return;
431 }
432}
433
434static void __init h3_init_irq(void) 439static void __init h3_init_irq(void)
435{ 440{
436 omap1_init_common_hw(); 441 omap1_init_common_hw();
437 omap_init_irq(); 442 omap_init_irq();
438 omap_gpio_init();
439 h3_init_smc91x();
440} 443}
441 444
442static void __init h3_map_io(void) 445static void __init h3_map_io(void)
@@ -446,8 +449,6 @@ static void __init h3_map_io(void)
446 449
447MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") 450MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
448 /* Maintainer: Texas Instruments, Inc. */ 451 /* Maintainer: Texas Instruments, Inc. */
449 .phys_io = 0xfff00000,
450 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
451 .boot_params = 0x10000100, 452 .boot_params = 0x10000100,
452 .map_io = h3_map_io, 453 .map_io = h3_map_io,
453 .reserve = omap_reserve, 454 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 311899ff5ffc..ba05a51f9408 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -30,6 +30,13 @@
30#include <linux/input.h> 30#include <linux/input.h>
31#include <linux/io.h> 31#include <linux/io.h>
32#include <linux/gpio.h> 32#include <linux/gpio.h>
33#include <linux/gpio_keys.h>
34#include <linux/i2c.h>
35#include <linux/i2c-gpio.h>
36#include <linux/htcpld.h>
37#include <linux/leds.h>
38#include <linux/spi/spi.h>
39#include <linux/spi/ads7846.h>
33 40
34#include <asm/mach-types.h> 41#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 42#include <asm/mach/arch.h>
@@ -39,6 +46,7 @@
39#include <plat/board.h> 46#include <plat/board.h>
40#include <plat/keypad.h> 47#include <plat/keypad.h>
41#include <plat/usb.h> 48#include <plat/usb.h>
49#include <plat/mmc.h>
42 50
43#include <mach/irqs.h> 51#include <mach/irqs.h>
44 52
@@ -52,74 +60,188 @@
52#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) 60#define OMAP_LCDC_CTRL_LCD_EN (1 << 0)
53#define OMAP_LCDC_STAT_DONE (1 << 0) 61#define OMAP_LCDC_STAT_DONE (1 << 0)
54 62
55static struct omap_lcd_config htcherald_lcd_config __initdata = { 63/* GPIO definitions for the power button and keyboard slide switch */
56 .ctrl_name = "internal", 64#define HTCHERALD_GPIO_POWER 139
57}; 65#define HTCHERALD_GPIO_SLIDE 174
66#define HTCHERALD_GIRQ_BTNS 141
58 67
59static struct omap_board_config_kernel htcherald_config[] __initdata = { 68/* GPIO definitions for the touchscreen */
60 { OMAP_TAG_LCD, &htcherald_lcd_config }, 69#define HTCHERALD_GPIO_TS 76
61}; 70
71/* HTCPLD definitions */
72
73/*
74 * CPLD Logic
75 *
76 * Chip 3 - 0x03
77 *
78 * Function 7 6 5 4 3 2 1 0
79 * ------------------------------------
80 * DPAD light x x x x x x x 1
81 * SoundDev x x x x 1 x x x
82 * Screen white 1 x x x x x x x
83 * MMC power on x x x x x 1 x x
84 * Happy times (n) 0 x x x x 1 x x
85 *
86 * Chip 4 - 0x04
87 *
88 * Function 7 6 5 4 3 2 1 0
89 * ------------------------------------
90 * Keyboard light x x x x x x x 1
91 * LCD Bright (4) x x x x x 1 1 x
92 * LCD Bright (3) x x x x x 0 1 x
93 * LCD Bright (2) x x x x x 1 0 x
94 * LCD Bright (1) x x x x x 0 0 x
95 * LCD Off x x x x 0 x x x
96 * LCD image (fb) 1 x x x x x x x
97 * LCD image (white) 0 x x x x x x x
98 * Caps lock LED x x 1 x x x x x
99 *
100 * Chip 5 - 0x05
101 *
102 * Function 7 6 5 4 3 2 1 0
103 * ------------------------------------
104 * Red (solid) x x x x x 1 x x
105 * Red (flash) x x x x x x 1 x
106 * Green (GSM flash) x x x x 1 x x x
107 * Green (GSM solid) x x x 1 x x x x
108 * Green (wifi flash) x x 1 x x x x x
109 * Blue (bt flash) x 1 x x x x x x
110 * DPAD Int Enable 1 x x x x x x 0
111 *
112 * (Combinations of the above can be made for different colors.)
113 * The direction pad interrupt enable must be set each time the
114 * interrupt is handled.
115 *
116 * Chip 6 - 0x06
117 *
118 * Function 7 6 5 4 3 2 1 0
119 * ------------------------------------
120 * Vibrator x x x x 1 x x x
121 * Alt LED x x x 1 x x x x
122 * Screen white 1 x x x x x x x
123 * Screen white x x 1 x x x x x
124 * Screen white x 0 x x x x x x
125 * Enable kbd dpad x x x x x x 0 x
126 * Happy Times 0 1 0 x x x 0 x
127 */
128
129/*
130 * HTCPLD GPIO lines start 16 after OMAP_MAX_GPIO_LINES to account
131 * for the 16 MPUIO lines.
132 */
133#define HTCPLD_GPIO_START_OFFSET (OMAP_MAX_GPIO_LINES + 16)
134#define HTCPLD_IRQ(chip, offset) (OMAP_IRQ_END + 8 * (chip) + (offset))
135#define HTCPLD_BASE(chip, offset) \
136 (HTCPLD_GPIO_START_OFFSET + 8 * (chip) + (offset))
137
138#define HTCPLD_GPIO_LED_DPAD HTCPLD_BASE(0, 0)
139#define HTCPLD_GPIO_LED_KBD HTCPLD_BASE(1, 0)
140#define HTCPLD_GPIO_LED_CAPS HTCPLD_BASE(1, 5)
141#define HTCPLD_GPIO_LED_RED_FLASH HTCPLD_BASE(2, 1)
142#define HTCPLD_GPIO_LED_RED_SOLID HTCPLD_BASE(2, 2)
143#define HTCPLD_GPIO_LED_GREEN_FLASH HTCPLD_BASE(2, 3)
144#define HTCPLD_GPIO_LED_GREEN_SOLID HTCPLD_BASE(2, 4)
145#define HTCPLD_GPIO_LED_WIFI HTCPLD_BASE(2, 5)
146#define HTCPLD_GPIO_LED_BT HTCPLD_BASE(2, 6)
147#define HTCPLD_GPIO_LED_VIBRATE HTCPLD_BASE(3, 3)
148#define HTCPLD_GPIO_LED_ALT HTCPLD_BASE(3, 4)
149
150#define HTCPLD_GPIO_RIGHT_KBD HTCPLD_BASE(6, 7)
151#define HTCPLD_GPIO_UP_KBD HTCPLD_BASE(6, 6)
152#define HTCPLD_GPIO_LEFT_KBD HTCPLD_BASE(6, 5)
153#define HTCPLD_GPIO_DOWN_KBD HTCPLD_BASE(6, 4)
154
155#define HTCPLD_GPIO_RIGHT_DPAD HTCPLD_BASE(7, 7)
156#define HTCPLD_GPIO_UP_DPAD HTCPLD_BASE(7, 6)
157#define HTCPLD_GPIO_LEFT_DPAD HTCPLD_BASE(7, 5)
158#define HTCPLD_GPIO_DOWN_DPAD HTCPLD_BASE(7, 4)
159#define HTCPLD_GPIO_ENTER_DPAD HTCPLD_BASE(7, 3)
160
161/*
162 * The htcpld chip requires a gpio write to a specific line
163 * to re-enable interrupts after one has occurred.
164 */
165#define HTCPLD_GPIO_INT_RESET_HI HTCPLD_BASE(2, 7)
166#define HTCPLD_GPIO_INT_RESET_LO HTCPLD_BASE(2, 0)
167
168/* Chip 5 */
169#define HTCPLD_IRQ_RIGHT_KBD HTCPLD_IRQ(0, 7)
170#define HTCPLD_IRQ_UP_KBD HTCPLD_IRQ(0, 6)
171#define HTCPLD_IRQ_LEFT_KBD HTCPLD_IRQ(0, 5)
172#define HTCPLD_IRQ_DOWN_KBD HTCPLD_IRQ(0, 4)
173
174/* Chip 6 */
175#define HTCPLD_IRQ_RIGHT_DPAD HTCPLD_IRQ(1, 7)
176#define HTCPLD_IRQ_UP_DPAD HTCPLD_IRQ(1, 6)
177#define HTCPLD_IRQ_LEFT_DPAD HTCPLD_IRQ(1, 5)
178#define HTCPLD_IRQ_DOWN_DPAD HTCPLD_IRQ(1, 4)
179#define HTCPLD_IRQ_ENTER_DPAD HTCPLD_IRQ(1, 3)
62 180
63/* Keyboard definition */ 181/* Keyboard definition */
64 182
65static int htc_herald_keymap[] = { 183static const unsigned int htc_herald_keymap[] = {
66 KEY(0, 0, KEY_RECORD), /* Mail button */ 184 KEY(0, 0, KEY_RECORD), /* Mail button */
67 KEY(0, 1, KEY_CAMERA), /* Camera */ 185 KEY(1, 0, KEY_CAMERA), /* Camera */
68 KEY(0, 2, KEY_PHONE), /* Send key */ 186 KEY(2, 0, KEY_PHONE), /* Send key */
69 KEY(0, 3, KEY_VOLUMEUP), /* Volume up */ 187 KEY(3, 0, KEY_VOLUMEUP), /* Volume up */
70 KEY(0, 4, KEY_F2), /* Right bar (landscape) */ 188 KEY(4, 0, KEY_F2), /* Right bar (landscape) */
71 KEY(0, 5, KEY_MAIL), /* Win key (portrait) */ 189 KEY(5, 0, KEY_MAIL), /* Win key (portrait) */
72 KEY(0, 6, KEY_DIRECTORY), /* Right bar (protrait) */ 190 KEY(6, 0, KEY_DIRECTORY), /* Right bar (protrait) */
73 KEY(1, 0, KEY_LEFTCTRL), /* Windows key */ 191 KEY(0, 1, KEY_LEFTCTRL), /* Windows key */
74 KEY(1, 1, KEY_COMMA), 192 KEY(1, 1, KEY_COMMA),
75 KEY(1, 2, KEY_M), 193 KEY(2, 1, KEY_M),
76 KEY(1, 3, KEY_K), 194 KEY(3, 1, KEY_K),
77 KEY(1, 4, KEY_SLASH), /* OK key */ 195 KEY(4, 1, KEY_SLASH), /* OK key */
78 KEY(1, 5, KEY_I), 196 KEY(5, 1, KEY_I),
79 KEY(1, 6, KEY_U), 197 KEY(6, 1, KEY_U),
80 KEY(2, 0, KEY_LEFTALT), 198 KEY(0, 2, KEY_LEFTALT),
81 KEY(2, 1, KEY_TAB), 199 KEY(1, 2, KEY_TAB),
82 KEY(2, 2, KEY_N), 200 KEY(2, 2, KEY_N),
83 KEY(2, 3, KEY_J), 201 KEY(3, 2, KEY_J),
84 KEY(2, 4, KEY_ENTER), 202 KEY(4, 2, KEY_ENTER),
85 KEY(2, 5, KEY_H), 203 KEY(5, 2, KEY_H),
86 KEY(2, 6, KEY_Y), 204 KEY(6, 2, KEY_Y),
87 KEY(3, 0, KEY_SPACE), 205 KEY(0, 3, KEY_SPACE),
88 KEY(3, 1, KEY_L), 206 KEY(1, 3, KEY_L),
89 KEY(3, 2, KEY_B), 207 KEY(2, 3, KEY_B),
90 KEY(3, 3, KEY_V), 208 KEY(3, 3, KEY_V),
91 KEY(3, 4, KEY_BACKSPACE), 209 KEY(4, 3, KEY_BACKSPACE),
92 KEY(3, 5, KEY_G), 210 KEY(5, 3, KEY_G),
93 KEY(3, 6, KEY_T), 211 KEY(6, 3, KEY_T),
94 KEY(4, 0, KEY_CAPSLOCK), /* Shift */ 212 KEY(0, 4, KEY_CAPSLOCK), /* Shift */
95 KEY(4, 1, KEY_C), 213 KEY(1, 4, KEY_C),
96 KEY(4, 2, KEY_F), 214 KEY(2, 4, KEY_F),
97 KEY(4, 3, KEY_R), 215 KEY(3, 4, KEY_R),
98 KEY(4, 4, KEY_O), 216 KEY(4, 4, KEY_O),
99 KEY(4, 5, KEY_E), 217 KEY(5, 4, KEY_E),
100 KEY(4, 6, KEY_D), 218 KEY(6, 4, KEY_D),
101 KEY(5, 0, KEY_X), 219 KEY(0, 5, KEY_X),
102 KEY(5, 1, KEY_Z), 220 KEY(1, 5, KEY_Z),
103 KEY(5, 2, KEY_S), 221 KEY(2, 5, KEY_S),
104 KEY(5, 3, KEY_W), 222 KEY(3, 5, KEY_W),
105 KEY(5, 4, KEY_P), 223 KEY(4, 5, KEY_P),
106 KEY(5, 5, KEY_Q), 224 KEY(5, 5, KEY_Q),
107 KEY(5, 6, KEY_A), 225 KEY(6, 5, KEY_A),
108 KEY(6, 0, KEY_CONNECT), /* Voice button */ 226 KEY(0, 6, KEY_CONNECT), /* Voice button */
109 KEY(6, 2, KEY_CANCEL), /* End key */ 227 KEY(2, 6, KEY_CANCEL), /* End key */
110 KEY(6, 3, KEY_VOLUMEDOWN), /* Volume down */ 228 KEY(3, 6, KEY_VOLUMEDOWN), /* Volume down */
111 KEY(6, 4, KEY_F1), /* Left bar (landscape) */ 229 KEY(4, 6, KEY_F1), /* Left bar (landscape) */
112 KEY(6, 5, KEY_WWW), /* OK button (portrait) */ 230 KEY(5, 6, KEY_WWW), /* OK button (portrait) */
113 KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */ 231 KEY(6, 6, KEY_CALENDAR), /* Left bar (portrait) */
114 0
115}; 232};
116 233
117struct omap_kp_platform_data htcherald_kp_data = { 234static const struct matrix_keymap_data htc_herald_keymap_data = {
235 .keymap = htc_herald_keymap,
236 .keymap_size = ARRAY_SIZE(htc_herald_keymap),
237};
238
239static struct omap_kp_platform_data htcherald_kp_data = {
118 .rows = 7, 240 .rows = 7,
119 .cols = 7, 241 .cols = 7,
120 .delay = 20, 242 .delay = 20,
121 .rep = 1, 243 .rep = true,
122 .keymap = htc_herald_keymap, 244 .keymap_data = &htc_herald_keymap_data,
123}; 245};
124 246
125static struct resource kp_resources[] = { 247static struct resource kp_resources[] = {
@@ -140,6 +262,129 @@ static struct platform_device kp_device = {
140 .resource = kp_resources, 262 .resource = kp_resources,
141}; 263};
142 264
265/* GPIO buttons for keyboard slide and power button */
266static struct gpio_keys_button herald_gpio_keys_table[] = {
267 {BTN_0, HTCHERALD_GPIO_POWER, 1, "POWER", EV_KEY, 1, 20},
268 {SW_LID, HTCHERALD_GPIO_SLIDE, 0, "SLIDE", EV_SW, 1, 20},
269
270 {KEY_LEFT, HTCPLD_GPIO_LEFT_KBD, 1, "LEFT", EV_KEY, 1, 20},
271 {KEY_RIGHT, HTCPLD_GPIO_RIGHT_KBD, 1, "RIGHT", EV_KEY, 1, 20},
272 {KEY_UP, HTCPLD_GPIO_UP_KBD, 1, "UP", EV_KEY, 1, 20},
273 {KEY_DOWN, HTCPLD_GPIO_DOWN_KBD, 1, "DOWN", EV_KEY, 1, 20},
274
275 {KEY_LEFT, HTCPLD_GPIO_LEFT_DPAD, 1, "DLEFT", EV_KEY, 1, 20},
276 {KEY_RIGHT, HTCPLD_GPIO_RIGHT_DPAD, 1, "DRIGHT", EV_KEY, 1, 20},
277 {KEY_UP, HTCPLD_GPIO_UP_DPAD, 1, "DUP", EV_KEY, 1, 20},
278 {KEY_DOWN, HTCPLD_GPIO_DOWN_DPAD, 1, "DDOWN", EV_KEY, 1, 20},
279 {KEY_ENTER, HTCPLD_GPIO_ENTER_DPAD, 1, "DENTER", EV_KEY, 1, 20},
280};
281
282static struct gpio_keys_platform_data herald_gpio_keys_data = {
283 .buttons = herald_gpio_keys_table,
284 .nbuttons = ARRAY_SIZE(herald_gpio_keys_table),
285 .rep = true,
286};
287
288static struct platform_device herald_gpiokeys_device = {
289 .name = "gpio-keys",
290 .id = -1,
291 .dev = {
292 .platform_data = &herald_gpio_keys_data,
293 },
294};
295
296/* LEDs for the Herald. These connect to the HTCPLD GPIO device. */
297static struct gpio_led gpio_leds[] = {
298 {"dpad", NULL, HTCPLD_GPIO_LED_DPAD, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
299 {"kbd", NULL, HTCPLD_GPIO_LED_KBD, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
300 {"vibrate", NULL, HTCPLD_GPIO_LED_VIBRATE, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
301 {"green_solid", NULL, HTCPLD_GPIO_LED_GREEN_SOLID, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
302 {"green_flash", NULL, HTCPLD_GPIO_LED_GREEN_FLASH, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
303 {"red_solid", "mmc0", HTCPLD_GPIO_LED_RED_SOLID, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
304 {"red_flash", NULL, HTCPLD_GPIO_LED_RED_FLASH, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
305 {"wifi", NULL, HTCPLD_GPIO_LED_WIFI, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
306 {"bt", NULL, HTCPLD_GPIO_LED_BT, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
307 {"caps", NULL, HTCPLD_GPIO_LED_CAPS, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
308 {"alt", NULL, HTCPLD_GPIO_LED_ALT, 0, 0, LEDS_GPIO_DEFSTATE_OFF},
309};
310
311static struct gpio_led_platform_data gpio_leds_data = {
312 .leds = gpio_leds,
313 .num_leds = ARRAY_SIZE(gpio_leds),
314};
315
316static struct platform_device gpio_leds_device = {
317 .name = "leds-gpio",
318 .id = 0,
319 .dev = {
320 .platform_data = &gpio_leds_data,
321 },
322};
323
324/* HTC PLD chips */
325
326static struct resource htcpld_resources[] = {
327 [0] = {
328 .start = OMAP_GPIO_IRQ(HTCHERALD_GIRQ_BTNS),
329 .end = OMAP_GPIO_IRQ(HTCHERALD_GIRQ_BTNS),
330 .flags = IORESOURCE_IRQ,
331 },
332};
333
334static struct htcpld_chip_platform_data htcpld_chips[] = {
335 [0] = {
336 .addr = 0x03,
337 .reset = 0x04,
338 .num_gpios = 8,
339 .gpio_out_base = HTCPLD_BASE(0, 0),
340 .gpio_in_base = HTCPLD_BASE(4, 0),
341 },
342 [1] = {
343 .addr = 0x04,
344 .reset = 0x8e,
345 .num_gpios = 8,
346 .gpio_out_base = HTCPLD_BASE(1, 0),
347 .gpio_in_base = HTCPLD_BASE(5, 0),
348 },
349 [2] = {
350 .addr = 0x05,
351 .reset = 0x80,
352 .num_gpios = 8,
353 .gpio_out_base = HTCPLD_BASE(2, 0),
354 .gpio_in_base = HTCPLD_BASE(6, 0),
355 .irq_base = HTCPLD_IRQ(0, 0),
356 .num_irqs = 8,
357 },
358 [3] = {
359 .addr = 0x06,
360 .reset = 0x40,
361 .num_gpios = 8,
362 .gpio_out_base = HTCPLD_BASE(3, 0),
363 .gpio_in_base = HTCPLD_BASE(7, 0),
364 .irq_base = HTCPLD_IRQ(1, 0),
365 .num_irqs = 8,
366 },
367};
368
369static struct htcpld_core_platform_data htcpld_pfdata = {
370 .int_reset_gpio_hi = HTCPLD_GPIO_INT_RESET_HI,
371 .int_reset_gpio_lo = HTCPLD_GPIO_INT_RESET_LO,
372 .i2c_adapter_id = 1,
373
374 .chip = htcpld_chips,
375 .num_chip = ARRAY_SIZE(htcpld_chips),
376};
377
378static struct platform_device htcpld_device = {
379 .name = "i2c-htcpld",
380 .id = -1,
381 .resource = htcpld_resources,
382 .num_resources = ARRAY_SIZE(htcpld_resources),
383 .dev = {
384 .platform_data = &htcpld_pfdata,
385 },
386};
387
143/* USB Device */ 388/* USB Device */
144static struct omap_usb_config htcherald_usb_config __initdata = { 389static struct omap_usb_config htcherald_usb_config __initdata = {
145 .otg = 0, 390 .otg = 0,
@@ -150,14 +395,71 @@ static struct omap_usb_config htcherald_usb_config __initdata = {
150}; 395};
151 396
152/* LCD Device resources */ 397/* LCD Device resources */
398static struct omap_lcd_config htcherald_lcd_config __initdata = {
399 .ctrl_name = "internal",
400};
401
402static struct omap_board_config_kernel htcherald_config[] __initdata = {
403 { OMAP_TAG_LCD, &htcherald_lcd_config },
404};
405
153static struct platform_device lcd_device = { 406static struct platform_device lcd_device = {
154 .name = "lcd_htcherald", 407 .name = "lcd_htcherald",
155 .id = -1, 408 .id = -1,
156}; 409};
157 410
411/* MMC Card */
412#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
413static struct omap_mmc_platform_data htc_mmc1_data = {
414 .nr_slots = 1,
415 .switch_slot = NULL,
416 .slots[0] = {
417 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
418 .name = "mmcblk",
419 .nomux = 1,
420 .wires = 4,
421 .switch_pin = -1,
422 },
423};
424
425static struct omap_mmc_platform_data *htc_mmc_data[1];
426#endif
427
428
429/* Platform devices for the Herald */
158static struct platform_device *devices[] __initdata = { 430static struct platform_device *devices[] __initdata = {
159 &kp_device, 431 &kp_device,
160 &lcd_device, 432 &lcd_device,
433 &htcpld_device,
434 &gpio_leds_device,
435 &herald_gpiokeys_device,
436};
437
438/*
439 * Touchscreen
440 */
441static const struct ads7846_platform_data htcherald_ts_platform_data = {
442 .model = 7846,
443 .keep_vref_on = 1,
444 .x_plate_ohms = 496,
445 .gpio_pendown = HTCHERALD_GPIO_TS,
446 .pressure_max = 10000,
447 .pressure_min = 5000,
448 .x_min = 528,
449 .x_max = 3760,
450 .y_min = 624,
451 .y_max = 3760,
452};
453
454static struct spi_board_info __initdata htcherald_spi_board_info[] = {
455 {
456 .modalias = "ads7846",
457 .platform_data = &htcherald_ts_platform_data,
458 .irq = OMAP_GPIO_IRQ(HTCHERALD_GPIO_TS),
459 .max_speed_hz = 2500000,
460 .bus_num = 2,
461 .chip_select = 1,
462 }
161}; 463};
162 464
163/* 465/*
@@ -278,8 +580,7 @@ static void __init htcherald_init(void)
278{ 580{
279 printk(KERN_INFO "HTC Herald init.\n"); 581 printk(KERN_INFO "HTC Herald init.\n");
280 582
281 omap_gpio_init(); 583 /* Do board initialization before we register all the devices */
282
283 omap_board_config = htcherald_config; 584 omap_board_config = htcherald_config;
284 omap_board_config_size = ARRAY_SIZE(htcherald_config); 585 omap_board_config_size = ARRAY_SIZE(htcherald_config);
285 platform_add_devices(devices, ARRAY_SIZE(devices)); 586 platform_add_devices(devices, ARRAY_SIZE(devices));
@@ -288,6 +589,16 @@ static void __init htcherald_init(void)
288 589
289 htcherald_usb_enable(); 590 htcherald_usb_enable();
290 omap1_usb_init(&htcherald_usb_config); 591 omap1_usb_init(&htcherald_usb_config);
592
593 spi_register_board_info(htcherald_spi_board_info,
594 ARRAY_SIZE(htcherald_spi_board_info));
595
596 omap_register_i2c_bus(1, 100, NULL, 0);
597
598#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
599 htc_mmc_data[0] = &htc_mmc1_data;
600 omap1_init_mmc(htc_mmc_data, 1);
601#endif
291} 602}
292 603
293static void __init htcherald_init_irq(void) 604static void __init htcherald_init_irq(void)
@@ -300,8 +611,6 @@ static void __init htcherald_init_irq(void)
300MACHINE_START(HERALD, "HTC Herald") 611MACHINE_START(HERALD, "HTC Herald")
301 /* Maintainer: Cory Maccarrone <darkstar6262@gmail.com> */ 612 /* Maintainer: Cory Maccarrone <darkstar6262@gmail.com> */
302 /* Maintainer: wing-linux.sourceforge.net */ 613 /* Maintainer: wing-linux.sourceforge.net */
303 .phys_io = 0xfff00000,
304 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
305 .boot_params = 0x10000100, 614 .boot_params = 0x10000100,
306 .map_io = htcherald_map_io, 615 .map_io = htcherald_map_io,
307 .reserve = omap_reserve, 616 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 3daf87ad2576..2d9b8cbd7a14 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -44,17 +44,16 @@
44/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ 44/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
45#define INNOVATOR1610_ETHR_START 0x04000300 45#define INNOVATOR1610_ETHR_START 0x04000300
46 46
47static int innovator_keymap[] = { 47static const unsigned int innovator_keymap[] = {
48 KEY(0, 0, KEY_F1), 48 KEY(0, 0, KEY_F1),
49 KEY(0, 3, KEY_DOWN), 49 KEY(3, 0, KEY_DOWN),
50 KEY(1, 1, KEY_F2), 50 KEY(1, 1, KEY_F2),
51 KEY(1, 2, KEY_RIGHT), 51 KEY(2, 1, KEY_RIGHT),
52 KEY(2, 0, KEY_F3), 52 KEY(0, 2, KEY_F3),
53 KEY(2, 1, KEY_F4), 53 KEY(1, 2, KEY_F4),
54 KEY(2, 2, KEY_UP), 54 KEY(2, 2, KEY_UP),
55 KEY(3, 2, KEY_ENTER), 55 KEY(2, 3, KEY_ENTER),
56 KEY(3, 3, KEY_LEFT), 56 KEY(3, 3, KEY_LEFT),
57 0
58}; 57};
59 58
60static struct mtd_partition innovator_partitions[] = { 59static struct mtd_partition innovator_partitions[] = {
@@ -126,11 +125,15 @@ static struct resource innovator_kp_resources[] = {
126 }, 125 },
127}; 126};
128 127
128static const struct matrix_keymap_data innovator_keymap_data = {
129 .keymap = innovator_keymap,
130 .keymap_size = ARRAY_SIZE(innovator_keymap),
131};
132
129static struct omap_kp_platform_data innovator_kp_data = { 133static struct omap_kp_platform_data innovator_kp_data = {
130 .rows = 8, 134 .rows = 8,
131 .cols = 8, 135 .cols = 8,
132 .keymap = innovator_keymap, 136 .keymap_data = &innovator_keymap_data,
133 .keymapsize = ARRAY_SIZE(innovator_keymap),
134 .delay = 4, 137 .delay = 4,
135}; 138};
136 139
@@ -290,13 +293,6 @@ static void __init innovator_init_irq(void)
290{ 293{
291 omap1_init_common_hw(); 294 omap1_init_common_hw();
292 omap_init_irq(); 295 omap_init_irq();
293 omap_gpio_init();
294#ifdef CONFIG_ARCH_OMAP15XX
295 if (cpu_is_omap1510()) {
296 omap1510_fpga_init_irq();
297 }
298#endif
299 innovator_init_smc91x();
300} 296}
301 297
302#ifdef CONFIG_ARCH_OMAP15XX 298#ifdef CONFIG_ARCH_OMAP15XX
@@ -369,7 +365,7 @@ static struct omap_mmc_platform_data mmc1_data = {
369 365
370static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC]; 366static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC];
371 367
372void __init innovator_mmc_init(void) 368static void __init innovator_mmc_init(void)
373{ 369{
374 mmc_data[0] = &mmc1_data; 370 mmc_data[0] = &mmc1_data;
375 omap1_init_mmc(mmc_data, OMAP15XX_NR_MMC); 371 omap1_init_mmc(mmc_data, OMAP15XX_NR_MMC);
@@ -387,6 +383,10 @@ static struct omap_board_config_kernel innovator_config[] = {
387 383
388static void __init innovator_init(void) 384static void __init innovator_init(void)
389{ 385{
386 if (cpu_is_omap1510())
387 omap1510_fpga_init_irq();
388 innovator_init_smc91x();
389
390#ifdef CONFIG_ARCH_OMAP15XX 390#ifdef CONFIG_ARCH_OMAP15XX
391 if (cpu_is_omap1510()) { 391 if (cpu_is_omap1510()) {
392 unsigned char reg; 392 unsigned char reg;
@@ -459,8 +459,6 @@ static void __init innovator_map_io(void)
459 459
460MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") 460MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
461 /* Maintainer: MontaVista Software, Inc. */ 461 /* Maintainer: MontaVista Software, Inc. */
462 .phys_io = 0xfff00000,
463 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
464 .boot_params = 0x10000100, 462 .boot_params = 0x10000100,
465 .map_io = innovator_map_io, 463 .map_io = innovator_map_io,
466 .reserve = omap_reserve, 464 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 51a4539aecf5..cfd084926146 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -54,19 +54,18 @@ static void __init omap_nokia770_init_irq(void)
54 omap_init_irq(); 54 omap_init_irq();
55} 55}
56 56
57static int nokia770_keymap[] = { 57static const unsigned int nokia770_keymap[] = {
58 KEY(0, 1, GROUP_0 | KEY_UP), 58 KEY(1, 0, GROUP_0 | KEY_UP),
59 KEY(0, 2, GROUP_1 | KEY_F5), 59 KEY(2, 0, GROUP_1 | KEY_F5),
60 KEY(1, 0, GROUP_0 | KEY_LEFT), 60 KEY(0, 1, GROUP_0 | KEY_LEFT),
61 KEY(1, 1, GROUP_0 | KEY_ENTER), 61 KEY(1, 1, GROUP_0 | KEY_ENTER),
62 KEY(1, 2, GROUP_0 | KEY_RIGHT), 62 KEY(2, 1, GROUP_0 | KEY_RIGHT),
63 KEY(2, 0, GROUP_1 | KEY_ESC), 63 KEY(0, 2, GROUP_1 | KEY_ESC),
64 KEY(2, 1, GROUP_0 | KEY_DOWN), 64 KEY(1, 2, GROUP_0 | KEY_DOWN),
65 KEY(2, 2, GROUP_1 | KEY_F4), 65 KEY(2, 2, GROUP_1 | KEY_F4),
66 KEY(3, 0, GROUP_2 | KEY_F7), 66 KEY(0, 3, GROUP_2 | KEY_F7),
67 KEY(3, 1, GROUP_2 | KEY_F8), 67 KEY(1, 3, GROUP_2 | KEY_F8),
68 KEY(3, 2, GROUP_2 | KEY_F6), 68 KEY(2, 3, GROUP_2 | KEY_F6),
69 0
70}; 69};
71 70
72static struct resource nokia770_kp_resources[] = { 71static struct resource nokia770_kp_resources[] = {
@@ -77,11 +76,15 @@ static struct resource nokia770_kp_resources[] = {
77 }, 76 },
78}; 77};
79 78
79static const struct matrix_keymap_data nokia770_keymap_data = {
80 .keymap = nokia770_keymap,
81 .keymap_size = ARRAY_SIZE(nokia770_keymap),
82};
83
80static struct omap_kp_platform_data nokia770_kp_data = { 84static struct omap_kp_platform_data nokia770_kp_data = {
81 .rows = 8, 85 .rows = 8,
82 .cols = 8, 86 .cols = 8,
83 .keymap = nokia770_keymap, 87 .keymap_data = &nokia770_keymap_data,
84 .keymapsize = ARRAY_SIZE(nokia770_keymap),
85 .delay = 4, 88 .delay = 4,
86}; 89};
87 90
@@ -112,7 +115,7 @@ static struct mipid_platform_data nokia770_mipid_platform_data = {
112 .shutdown = mipid_shutdown, 115 .shutdown = mipid_shutdown,
113}; 116};
114 117
115static void mipid_dev_init(void) 118static void __init mipid_dev_init(void)
116{ 119{
117 const struct omap_lcd_config *conf; 120 const struct omap_lcd_config *conf;
118 121
@@ -123,7 +126,7 @@ static void mipid_dev_init(void)
123 } 126 }
124} 127}
125 128
126static void ads7846_dev_init(void) 129static void __init ads7846_dev_init(void)
127{ 130{
128 if (gpio_request(ADS7846_PENDOWN_GPIO, "ADS7846 pendown") < 0) 131 if (gpio_request(ADS7846_PENDOWN_GPIO, "ADS7846 pendown") < 0)
129 printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); 132 printk(KERN_ERR "can't get ads7846 pen down GPIO\n");
@@ -167,7 +170,7 @@ static struct hwa742_platform_data nokia770_hwa742_platform_data = {
167 .te_connected = 1, 170 .te_connected = 1,
168}; 171};
169 172
170static void hwa742_dev_init(void) 173static void __init hwa742_dev_init(void)
171{ 174{
172 clk_add_alias("hwa_sys_ck", NULL, "bclk", NULL); 175 clk_add_alias("hwa_sys_ck", NULL, "bclk", NULL);
173 omapfb_set_ctrl_platform_data(&nokia770_hwa742_platform_data); 176 omapfb_set_ctrl_platform_data(&nokia770_hwa742_platform_data);
@@ -246,7 +249,6 @@ static void __init omap_nokia770_init(void)
246 platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); 249 platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices));
247 spi_register_board_info(nokia770_spi_board_info, 250 spi_register_board_info(nokia770_spi_board_info,
248 ARRAY_SIZE(nokia770_spi_board_info)); 251 ARRAY_SIZE(nokia770_spi_board_info));
249 omap_gpio_init();
250 omap_serial_init(); 252 omap_serial_init();
251 omap_register_i2c_bus(1, 100, NULL, 0); 253 omap_register_i2c_bus(1, 100, NULL, 0);
252 hwa742_dev_init(); 254 hwa742_dev_init();
@@ -262,8 +264,6 @@ static void __init omap_nokia770_map_io(void)
262} 264}
263 265
264MACHINE_START(NOKIA770, "Nokia 770") 266MACHINE_START(NOKIA770, "Nokia 770")
265 .phys_io = 0xfff00000,
266 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
267 .boot_params = 0x10000100, 267 .boot_params = 0x10000100,
268 .map_io = omap_nokia770_map_io, 268 .map_io = omap_nokia770_map_io,
269 .reserve = omap_reserve, 269 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 679740cc1e90..e68dfde1918e 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -276,16 +276,13 @@ static void __init osk_init_cf(void)
276 return; 276 return;
277 } 277 }
278 /* the CF I/O IRQ is really active-low */ 278 /* the CF I/O IRQ is really active-low */
279 set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); 279 irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
280} 280}
281 281
282static void __init osk_init_irq(void) 282static void __init osk_init_irq(void)
283{ 283{
284 omap1_init_common_hw(); 284 omap1_init_common_hw();
285 omap_init_irq(); 285 omap_init_irq();
286 omap_gpio_init();
287 osk_init_smc91x();
288 osk_init_cf();
289} 286}
290 287
291static struct omap_usb_config osk_usb_config __initdata = { 288static struct omap_usb_config osk_usb_config __initdata = {
@@ -341,25 +338,28 @@ static struct i2c_board_info __initdata mistral_i2c_board_info[] = {
341 */ 338 */
342}; 339};
343 340
344static const int osk_keymap[] = { 341static const unsigned int osk_keymap[] = {
345 /* KEY(col, row, code) */ 342 /* KEY(col, row, code) */
346 KEY(0, 0, KEY_F1), /* SW4 */ 343 KEY(0, 0, KEY_F1), /* SW4 */
347 KEY(0, 3, KEY_UP), /* (sw2/up) */ 344 KEY(3, 0, KEY_UP), /* (sw2/up) */
348 KEY(1, 1, KEY_LEFTCTRL), /* SW5 */ 345 KEY(1, 1, KEY_LEFTCTRL), /* SW5 */
349 KEY(1, 2, KEY_LEFT), /* (sw2/left) */ 346 KEY(2, 1, KEY_LEFT), /* (sw2/left) */
350 KEY(2, 0, KEY_SPACE), /* SW3 */ 347 KEY(0, 2, KEY_SPACE), /* SW3 */
351 KEY(2, 1, KEY_ESC), /* SW6 */ 348 KEY(1, 2, KEY_ESC), /* SW6 */
352 KEY(2, 2, KEY_DOWN), /* (sw2/down) */ 349 KEY(2, 2, KEY_DOWN), /* (sw2/down) */
353 KEY(3, 2, KEY_ENTER), /* (sw2/select) */ 350 KEY(2, 3, KEY_ENTER), /* (sw2/select) */
354 KEY(3, 3, KEY_RIGHT), /* (sw2/right) */ 351 KEY(3, 3, KEY_RIGHT), /* (sw2/right) */
355 0 352};
353
354static const struct matrix_keymap_data osk_keymap_data = {
355 .keymap = osk_keymap,
356 .keymap_size = ARRAY_SIZE(osk_keymap),
356}; 357};
357 358
358static struct omap_kp_platform_data osk_kp_data = { 359static struct omap_kp_platform_data osk_kp_data = {
359 .rows = 8, 360 .rows = 8,
360 .cols = 8, 361 .cols = 8,
361 .keymap = (int *) osk_keymap, 362 .keymap_data = &osk_keymap_data,
362 .keymapsize = ARRAY_SIZE(osk_keymap),
363 .delay = 9, 363 .delay = 9,
364}; 364};
365 365
@@ -482,7 +482,7 @@ static void __init osk_mistral_init(void)
482 omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ 482 omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */
483 gpio_request(4, "ts_int"); 483 gpio_request(4, "ts_int");
484 gpio_direction_input(4); 484 gpio_direction_input(4);
485 set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING); 485 irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
486 486
487 spi_register_board_info(mistral_boardinfo, 487 spi_register_board_info(mistral_boardinfo,
488 ARRAY_SIZE(mistral_boardinfo)); 488 ARRAY_SIZE(mistral_boardinfo));
@@ -500,7 +500,7 @@ static void __init osk_mistral_init(void)
500 int irq = gpio_to_irq(OMAP_MPUIO(2)); 500 int irq = gpio_to_irq(OMAP_MPUIO(2));
501 501
502 gpio_direction_input(OMAP_MPUIO(2)); 502 gpio_direction_input(OMAP_MPUIO(2));
503 set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 503 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
504#ifdef CONFIG_PM 504#ifdef CONFIG_PM
505 /* share the IRQ in case someone wants to use the 505 /* share the IRQ in case someone wants to use the
506 * button for more than wakeup from system sleep. 506 * button for more than wakeup from system sleep.
@@ -541,6 +541,9 @@ static void __init osk_init(void)
541{ 541{
542 u32 l; 542 u32 l;
543 543
544 osk_init_smc91x();
545 osk_init_cf();
546
544 /* Workaround for wrong CS3 (NOR flash) timing 547 /* Workaround for wrong CS3 (NOR flash) timing
545 * There are some U-Boot versions out there which configure 548 * There are some U-Boot versions out there which configure
546 * wrong CS3 memory timings. This mainly leads to CRC 549 * wrong CS3 memory timings. This mainly leads to CRC
@@ -580,8 +583,6 @@ static void __init osk_map_io(void)
580 583
581MACHINE_START(OMAP_OSK, "TI-OSK") 584MACHINE_START(OMAP_OSK, "TI-OSK")
582 /* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */ 585 /* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */
583 .phys_io = 0xfff00000,
584 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
585 .boot_params = 0x10000100, 586 .boot_params = 0x10000100,
586 .map_io = osk_map_io, 587 .map_io = osk_map_io,
587 .reserve = omap_reserve, 588 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 782bb257a85d..c9d38f47845f 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -63,28 +63,31 @@ static void __init omap_palmte_init_irq(void)
63{ 63{
64 omap1_init_common_hw(); 64 omap1_init_common_hw();
65 omap_init_irq(); 65 omap_init_irq();
66 omap_gpio_init();
67} 66}
68 67
69static const int palmte_keymap[] = { 68static const unsigned int palmte_keymap[] = {
70 KEY(0, 0, KEY_F1), /* Calendar */ 69 KEY(0, 0, KEY_F1), /* Calendar */
71 KEY(0, 1, KEY_F2), /* Contacts */ 70 KEY(1, 0, KEY_F2), /* Contacts */
72 KEY(0, 2, KEY_F3), /* Tasks List */ 71 KEY(2, 0, KEY_F3), /* Tasks List */
73 KEY(0, 3, KEY_F4), /* Note Pad */ 72 KEY(3, 0, KEY_F4), /* Note Pad */
74 KEY(0, 4, KEY_POWER), 73 KEY(4, 0, KEY_POWER),
75 KEY(1, 0, KEY_LEFT), 74 KEY(0, 1, KEY_LEFT),
76 KEY(1, 1, KEY_DOWN), 75 KEY(1, 1, KEY_DOWN),
77 KEY(1, 2, KEY_UP), 76 KEY(2, 1, KEY_UP),
78 KEY(1, 3, KEY_RIGHT), 77 KEY(3, 1, KEY_RIGHT),
79 KEY(1, 4, KEY_ENTER), 78 KEY(4, 1, KEY_ENTER),
80 0, 79};
80
81static const struct matrix_keymap_data palmte_keymap_data = {
82 .keymap = palmte_keymap,
83 .keymap_size = ARRAY_SIZE(palmte_keymap),
81}; 84};
82 85
83static struct omap_kp_platform_data palmte_kp_data = { 86static struct omap_kp_platform_data palmte_kp_data = {
84 .rows = 8, 87 .rows = 8,
85 .cols = 8, 88 .cols = 8,
86 .keymap = (int *) palmte_keymap, 89 .keymap_data = &palmte_keymap_data,
87 .rep = 1, 90 .rep = true,
88 .delay = 12, 91 .delay = 12,
89}; 92};
90 93
@@ -227,19 +230,6 @@ static struct spi_board_info palmte_spi_info[] __initdata = {
227 }, 230 },
228}; 231};
229 232
230static void palmte_headphones_detect(void *data, int state)
231{
232 if (state) {
233 /* Headphones connected, disable speaker */
234 gpio_set_value(PALMTE_SPEAKER_GPIO, 0);
235 printk(KERN_INFO "PM: speaker off\n");
236 } else {
237 /* Headphones unplugged, re-enable speaker */
238 gpio_set_value(PALMTE_SPEAKER_GPIO, 1);
239 printk(KERN_INFO "PM: speaker on\n");
240 }
241}
242
243static void __init palmte_misc_gpio_setup(void) 233static void __init palmte_misc_gpio_setup(void)
244{ 234{
245 /* Set TSC2102 PINTDAV pin as input (used by TSC2102 driver) */ 235 /* Set TSC2102 PINTDAV pin as input (used by TSC2102 driver) */
@@ -285,8 +275,6 @@ static void __init omap_palmte_map_io(void)
285} 275}
286 276
287MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") 277MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
288 .phys_io = 0xfff00000,
289 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
290 .boot_params = 0x10000100, 278 .boot_params = 0x10000100,
291 .map_io = omap_palmte_map_io, 279 .map_io = omap_palmte_map_io,
292 .reserve = omap_reserve, 280 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 0b35ef54a64f..f04f2d36e7d3 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -51,19 +51,18 @@
51#define PALMTT_MMC_WP_GPIO 8 51#define PALMTT_MMC_WP_GPIO 8
52#define PALMTT_HDQ_GPIO 11 52#define PALMTT_HDQ_GPIO 11
53 53
54static int palmtt_keymap[] = { 54static const unsigned int palmtt_keymap[] = {
55 KEY(0, 0, KEY_ESC), 55 KEY(0, 0, KEY_ESC),
56 KEY(0, 1, KEY_SPACE), 56 KEY(1, 0, KEY_SPACE),
57 KEY(0, 2, KEY_LEFTCTRL), 57 KEY(2, 0, KEY_LEFTCTRL),
58 KEY(0, 3, KEY_TAB), 58 KEY(3, 0, KEY_TAB),
59 KEY(0, 4, KEY_ENTER), 59 KEY(4, 0, KEY_ENTER),
60 KEY(1, 0, KEY_LEFT), 60 KEY(0, 1, KEY_LEFT),
61 KEY(1, 1, KEY_DOWN), 61 KEY(1, 1, KEY_DOWN),
62 KEY(1, 2, KEY_UP), 62 KEY(2, 1, KEY_UP),
63 KEY(1, 3, KEY_RIGHT), 63 KEY(3, 1, KEY_RIGHT),
64 KEY(2, 0, KEY_SLEEP), 64 KEY(0, 2, KEY_SLEEP),
65 KEY(2, 4, KEY_Y), 65 KEY(4, 2, KEY_Y),
66 0
67}; 66};
68 67
69static struct mtd_partition palmtt_partitions[] = { 68static struct mtd_partition palmtt_partitions[] = {
@@ -136,10 +135,15 @@ static struct resource palmtt_kp_resources[] = {
136 }, 135 },
137}; 136};
138 137
138static const struct matrix_keymap_data palmtt_keymap_data = {
139 .keymap = palmtt_keymap,
140 .keymap_size = ARRAY_SIZE(palmtt_keymap),
141};
142
139static struct omap_kp_platform_data palmtt_kp_data = { 143static struct omap_kp_platform_data palmtt_kp_data = {
140 .rows = 6, 144 .rows = 6,
141 .cols = 3, 145 .cols = 3,
142 .keymap = palmtt_keymap, 146 .keymap_data = &palmtt_keymap_data,
143}; 147};
144 148
145static struct platform_device palmtt_kp_device = { 149static struct platform_device palmtt_kp_device = {
@@ -317,8 +321,6 @@ static void __init omap_palmtt_map_io(void)
317} 321}
318 322
319MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") 323MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
320 .phys_io = 0xfff00000,
321 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
322 .boot_params = 0x10000100, 324 .boot_params = 0x10000100,
323 .map_io = omap_palmtt_map_io, 325 .map_io = omap_palmtt_map_io,
324 .reserve = omap_reserve, 326 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 66362903b6e2..45f01d2c3a7a 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -62,29 +62,32 @@ omap_palmz71_init_irq(void)
62{ 62{
63 omap1_init_common_hw(); 63 omap1_init_common_hw();
64 omap_init_irq(); 64 omap_init_irq();
65 omap_gpio_init();
66} 65}
67 66
68static int palmz71_keymap[] = { 67static const unsigned int palmz71_keymap[] = {
69 KEY(0, 0, KEY_F1), 68 KEY(0, 0, KEY_F1),
70 KEY(0, 1, KEY_F2), 69 KEY(1, 0, KEY_F2),
71 KEY(0, 2, KEY_F3), 70 KEY(2, 0, KEY_F3),
72 KEY(0, 3, KEY_F4), 71 KEY(3, 0, KEY_F4),
73 KEY(0, 4, KEY_POWER), 72 KEY(4, 0, KEY_POWER),
74 KEY(1, 0, KEY_LEFT), 73 KEY(0, 1, KEY_LEFT),
75 KEY(1, 1, KEY_DOWN), 74 KEY(1, 1, KEY_DOWN),
76 KEY(1, 2, KEY_UP), 75 KEY(2, 1, KEY_UP),
77 KEY(1, 3, KEY_RIGHT), 76 KEY(3, 1, KEY_RIGHT),
78 KEY(1, 4, KEY_ENTER), 77 KEY(4, 1, KEY_ENTER),
79 KEY(2, 0, KEY_CAMERA), 78 KEY(0, 2, KEY_CAMERA),
80 0, 79};
80
81static const struct matrix_keymap_data palmz71_keymap_data = {
82 .keymap = palmz71_keymap,
83 .keymap_size = ARRAY_SIZE(palmz71_keymap),
81}; 84};
82 85
83static struct omap_kp_platform_data palmz71_kp_data = { 86static struct omap_kp_platform_data palmz71_kp_data = {
84 .rows = 8, 87 .rows = 8,
85 .cols = 8, 88 .cols = 8,
86 .keymap = palmz71_keymap, 89 .keymap_data = &palmz71_keymap_data,
87 .rep = 1, 90 .rep = true,
88 .delay = 80, 91 .delay = 80,
89}; 92};
90 93
@@ -253,12 +256,12 @@ palmz71_powercable(int irq, void *dev_id)
253{ 256{
254 if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) { 257 if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) {
255 printk(KERN_INFO "PM: Power cable connected\n"); 258 printk(KERN_INFO "PM: Power cable connected\n");
256 set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), 259 irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
257 IRQ_TYPE_EDGE_FALLING); 260 IRQ_TYPE_EDGE_FALLING);
258 } else { 261 } else {
259 printk(KERN_INFO "PM: Power cable disconnected\n"); 262 printk(KERN_INFO "PM: Power cable disconnected\n");
260 set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), 263 irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
261 IRQ_TYPE_EDGE_RISING); 264 IRQ_TYPE_EDGE_RISING);
262 } 265 }
263 return IRQ_HANDLED; 266 return IRQ_HANDLED;
264} 267}
@@ -338,8 +341,6 @@ omap_palmz71_map_io(void)
338} 341}
339 342
340MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") 343MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
341 .phys_io = 0xfff00000,
342 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
343 .boot_params = 0x10000100, 344 .boot_params = 0x10000100,
344 .map_io = omap_palmz71_map_io, 345 .map_io = omap_palmz71_map_io,
345 .reserve = omap_reserve, 346 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 34ab354758b0..3c8ee8489458 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -36,36 +36,35 @@
36#include <plat/common.h> 36#include <plat/common.h>
37#include <plat/board.h> 37#include <plat/board.h>
38 38
39static int p2_keymap[] = { 39static const unsigned int p2_keymap[] = {
40 KEY(0,0,KEY_UP), 40 KEY(0, 0, KEY_UP),
41 KEY(0,1,KEY_RIGHT), 41 KEY(1, 0, KEY_RIGHT),
42 KEY(0,2,KEY_LEFT), 42 KEY(2, 0, KEY_LEFT),
43 KEY(0,3,KEY_DOWN), 43 KEY(3, 0, KEY_DOWN),
44 KEY(0,4,KEY_ENTER), 44 KEY(4, 0, KEY_ENTER),
45 KEY(1,0,KEY_F10), 45 KEY(0, 1, KEY_F10),
46 KEY(1,1,KEY_SEND), 46 KEY(1, 1, KEY_SEND),
47 KEY(1,2,KEY_END), 47 KEY(2, 1, KEY_END),
48 KEY(1,3,KEY_VOLUMEDOWN), 48 KEY(3, 1, KEY_VOLUMEDOWN),
49 KEY(1,4,KEY_VOLUMEUP), 49 KEY(4, 1, KEY_VOLUMEUP),
50 KEY(1,5,KEY_RECORD), 50 KEY(5, 1, KEY_RECORD),
51 KEY(2,0,KEY_F9), 51 KEY(0, 2, KEY_F9),
52 KEY(2,1,KEY_3), 52 KEY(1, 2, KEY_3),
53 KEY(2,2,KEY_6), 53 KEY(2, 2, KEY_6),
54 KEY(2,3,KEY_9), 54 KEY(3, 2, KEY_9),
55 KEY(2,4,KEY_KPDOT), 55 KEY(4, 2, KEY_KPDOT),
56 KEY(3,0,KEY_BACK), 56 KEY(0, 3, KEY_BACK),
57 KEY(3,1,KEY_2), 57 KEY(1, 3, KEY_2),
58 KEY(3,2,KEY_5), 58 KEY(2, 3, KEY_5),
59 KEY(3,3,KEY_8), 59 KEY(3, 3, KEY_8),
60 KEY(3,4,KEY_0), 60 KEY(4, 3, KEY_0),
61 KEY(3,5,KEY_KPSLASH), 61 KEY(5, 3, KEY_KPSLASH),
62 KEY(4,0,KEY_HOME), 62 KEY(0, 4, KEY_HOME),
63 KEY(4,1,KEY_1), 63 KEY(1, 4, KEY_1),
64 KEY(4,2,KEY_4), 64 KEY(2, 4, KEY_4),
65 KEY(4,3,KEY_7), 65 KEY(3, 4, KEY_7),
66 KEY(4,4,KEY_KPASTERISK), 66 KEY(4, 4, KEY_KPASTERISK),
67 KEY(4,5,KEY_POWER), 67 KEY(5, 4, KEY_POWER),
68 0
69}; 68};
70 69
71static struct smc91x_platdata smc91x_info = { 70static struct smc91x_platdata smc91x_info = {
@@ -211,13 +210,17 @@ static struct resource kp_resources[] = {
211 }, 210 },
212}; 211};
213 212
213static const struct matrix_keymap_data p2_keymap_data = {
214 .keymap = p2_keymap,
215 .keymap_size = ARRAY_SIZE(p2_keymap),
216};
217
214static struct omap_kp_platform_data kp_data = { 218static struct omap_kp_platform_data kp_data = {
215 .rows = 8, 219 .rows = 8,
216 .cols = 8, 220 .cols = 8,
217 .keymap = p2_keymap, 221 .keymap_data = &p2_keymap_data,
218 .keymapsize = ARRAY_SIZE(p2_keymap),
219 .delay = 4, 222 .delay = 4,
220 .dbounce = 1, 223 .dbounce = true,
221}; 224};
222 225
223static struct platform_device kp_device = { 226static struct platform_device kp_device = {
@@ -251,8 +254,19 @@ static struct omap_board_config_kernel perseus2_config[] __initdata = {
251 { OMAP_TAG_LCD, &perseus2_lcd_config }, 254 { OMAP_TAG_LCD, &perseus2_lcd_config },
252}; 255};
253 256
257static void __init perseus2_init_smc91x(void)
258{
259 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
260 mdelay(50);
261 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
262 H2P2_DBG_FPGA_LAN_RESET);
263 mdelay(50);
264}
265
254static void __init omap_perseus2_init(void) 266static void __init omap_perseus2_init(void)
255{ 267{
268 perseus2_init_smc91x();
269
256 if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0) 270 if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
257 BUG(); 271 BUG();
258 gpio_direction_input(P2_NAND_RB_GPIO_PIN); 272 gpio_direction_input(P2_NAND_RB_GPIO_PIN);
@@ -280,21 +294,10 @@ static void __init omap_perseus2_init(void)
280 omap_register_i2c_bus(1, 100, NULL, 0); 294 omap_register_i2c_bus(1, 100, NULL, 0);
281} 295}
282 296
283static void __init perseus2_init_smc91x(void)
284{
285 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
286 mdelay(50);
287 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
288 H2P2_DBG_FPGA_LAN_RESET);
289 mdelay(50);
290}
291
292static void __init omap_perseus2_init_irq(void) 297static void __init omap_perseus2_init_irq(void)
293{ 298{
294 omap1_init_common_hw(); 299 omap1_init_common_hw();
295 omap_init_irq(); 300 omap_init_irq();
296 omap_gpio_init();
297 perseus2_init_smc91x();
298} 301}
299/* Only FPGA needs to be mapped here. All others are done with ioremap */ 302/* Only FPGA needs to be mapped here. All others are done with ioremap */
300static struct map_desc omap_perseus2_io_desc[] __initdata = { 303static struct map_desc omap_perseus2_io_desc[] __initdata = {
@@ -347,8 +350,6 @@ static void __init omap_perseus2_map_io(void)
347 350
348MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") 351MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
349 /* Maintainer: Kevin Hilman <kjh@hilman.org> */ 352 /* Maintainer: Kevin Hilman <kjh@hilman.org> */
350 .phys_io = 0xfff00000,
351 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
352 .boot_params = 0x10000100, 353 .boot_params = 0x10000100,
353 .map_io = omap_perseus2_map_io, 354 .map_io = omap_perseus2_map_io,
354 .reserve = omap_reserve, 355 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c
index 5b33ae8141bc..e8ddd86e3fda 100644
--- a/arch/arm/mach-omap1/board-sx1-mmc.c
+++ b/arch/arm/mach-omap1/board-sx1-mmc.c
@@ -44,8 +44,7 @@ static struct omap_mmc_platform_data mmc1_data = {
44 .nr_slots = 1, 44 .nr_slots = 1,
45 .slots[0] = { 45 .slots[0] = {
46 .set_power = mmc_set_power, 46 .set_power = mmc_set_power,
47 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_30_31 | 47 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
48 MMC_VDD_32_33 | MMC_VDD_33_34,
49 .name = "mmcblk", 48 .name = "mmcblk",
50 }, 49 },
51}; 50};
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 2eb148b8de93..0ad781db4e66 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -164,36 +164,35 @@ EXPORT_SYMBOL(sx1_setusbpower);
164 164
165/*----------- Keypad -------------------------*/ 165/*----------- Keypad -------------------------*/
166 166
167static int sx1_keymap[] = { 167static const unsigned int sx1_keymap[] = {
168 KEY(5, 3, GROUP_0 | 117), /* camera Qt::Key_F17 */ 168 KEY(3, 5, GROUP_0 | 117), /* camera Qt::Key_F17 */
169 KEY(0, 4, GROUP_0 | 114), /* voice memo Qt::Key_F14 */ 169 KEY(4, 0, GROUP_0 | 114), /* voice memo Qt::Key_F14 */
170 KEY(1, 4, GROUP_2 | 114), /* voice memo */ 170 KEY(4, 1, GROUP_2 | 114), /* voice memo */
171 KEY(2, 4, GROUP_3 | 114), /* voice memo */ 171 KEY(4, 2, GROUP_3 | 114), /* voice memo */
172 KEY(0, 0, GROUP_1 | KEY_F12), /* red button Qt::Key_Hangup */ 172 KEY(0, 0, GROUP_1 | KEY_F12), /* red button Qt::Key_Hangup */
173 KEY(4, 3, GROUP_1 | KEY_LEFT), 173 KEY(3, 4, GROUP_1 | KEY_LEFT),
174 KEY(2, 3, GROUP_1 | KEY_DOWN), 174 KEY(3, 2, GROUP_1 | KEY_DOWN),
175 KEY(1, 3, GROUP_1 | KEY_RIGHT), 175 KEY(3, 1, GROUP_1 | KEY_RIGHT),
176 KEY(0, 3, GROUP_1 | KEY_UP), 176 KEY(3, 0, GROUP_1 | KEY_UP),
177 KEY(3, 3, GROUP_1 | KEY_POWER), /* joystick press or Qt::Key_Select */ 177 KEY(3, 3, GROUP_1 | KEY_POWER), /* joystick press or Qt::Key_Select */
178 KEY(5, 0, GROUP_1 | KEY_1), 178 KEY(0, 5, GROUP_1 | KEY_1),
179 KEY(4, 0, GROUP_1 | KEY_2), 179 KEY(0, 4, GROUP_1 | KEY_2),
180 KEY(3, 0, GROUP_1 | KEY_3), 180 KEY(0, 3, GROUP_1 | KEY_3),
181 KEY(3, 4, GROUP_1 | KEY_4), 181 KEY(4, 3, GROUP_1 | KEY_4),
182 KEY(4, 4, GROUP_1 | KEY_5), 182 KEY(4, 4, GROUP_1 | KEY_5),
183 KEY(5, 4, GROUP_1 | KEY_KPASTERISK),/* "*" */ 183 KEY(4, 5, GROUP_1 | KEY_KPASTERISK),/* "*" */
184 KEY(4, 1, GROUP_1 | KEY_6), 184 KEY(1, 4, GROUP_1 | KEY_6),
185 KEY(5, 1, GROUP_1 | KEY_7), 185 KEY(1, 5, GROUP_1 | KEY_7),
186 KEY(3, 1, GROUP_1 | KEY_8), 186 KEY(1, 3, GROUP_1 | KEY_8),
187 KEY(3, 2, GROUP_1 | KEY_9), 187 KEY(2, 3, GROUP_1 | KEY_9),
188 KEY(5, 2, GROUP_1 | KEY_0), 188 KEY(2, 5, GROUP_1 | KEY_0),
189 KEY(4, 2, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */ 189 KEY(2, 4, GROUP_1 | 113), /* # F13 Toggle input method Qt::Key_F13 */
190 KEY(0, 1, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */ 190 KEY(1, 0, GROUP_1 | KEY_F11), /* green button Qt::Key_Call */
191 KEY(1, 2, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */ 191 KEY(2, 1, GROUP_1 | KEY_YEN), /* left soft Qt::Key_Context1 */
192 KEY(2, 2, GROUP_1 | KEY_F8), /* right soft Qt::Key_Back */ 192 KEY(2, 2, GROUP_1 | KEY_F8), /* right soft Qt::Key_Back */
193 KEY(2, 1, GROUP_1 | KEY_LEFTSHIFT), /* shift */ 193 KEY(1, 2, GROUP_1 | KEY_LEFTSHIFT), /* shift */
194 KEY(1, 1, GROUP_1 | KEY_BACKSPACE), /* C (clear) */ 194 KEY(1, 1, GROUP_1 | KEY_BACKSPACE), /* C (clear) */
195 KEY(0, 2, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */ 195 KEY(2, 0, GROUP_1 | KEY_F7), /* menu Qt::Key_Menu */
196 0
197}; 196};
198 197
199static struct resource sx1_kp_resources[] = { 198static struct resource sx1_kp_resources[] = {
@@ -204,11 +203,15 @@ static struct resource sx1_kp_resources[] = {
204 }, 203 },
205}; 204};
206 205
206static const struct matrix_keymap_data sx1_keymap_data = {
207 .keymap = sx1_keymap,
208 .keymap_size = ARRAY_SIZE(sx1_keymap),
209};
210
207static struct omap_kp_platform_data sx1_kp_data = { 211static struct omap_kp_platform_data sx1_kp_data = {
208 .rows = 6, 212 .rows = 6,
209 .cols = 6, 213 .cols = 6,
210 .keymap = sx1_keymap, 214 .keymap_data = &sx1_keymap_data,
211 .keymapsize = ARRAY_SIZE(sx1_keymap),
212 .delay = 80, 215 .delay = 80,
213}; 216};
214 217
@@ -396,7 +399,7 @@ static void __init omap_sx1_init(void)
396 sx1_mmc_init(); 399 sx1_mmc_init();
397 400
398 /* turn on USB power */ 401 /* turn on USB power */
399 /* sx1_setusbpower(1); cant do it here because i2c is not ready */ 402 /* sx1_setusbpower(1); can't do it here because i2c is not ready */
400 gpio_request(1, "A_IRDA_OFF"); 403 gpio_request(1, "A_IRDA_OFF");
401 gpio_request(11, "A_SWITCH"); 404 gpio_request(11, "A_SWITCH");
402 gpio_request(15, "A_USB_ON"); 405 gpio_request(15, "A_USB_ON");
@@ -409,7 +412,6 @@ static void __init omap_sx1_init_irq(void)
409{ 412{
410 omap1_init_common_hw(); 413 omap1_init_common_hw();
411 omap_init_irq(); 414 omap_init_irq();
412 omap_gpio_init();
413} 415}
414/*----------------------------------------*/ 416/*----------------------------------------*/
415 417
@@ -419,8 +421,6 @@ static void __init omap_sx1_map_io(void)
419} 421}
420 422
421MACHINE_START(SX1, "OMAP310 based Siemens SX1") 423MACHINE_START(SX1, "OMAP310 based Siemens SX1")
422 .phys_io = 0xfff00000,
423 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
424 .boot_params = 0x10000100, 424 .boot_params = 0x10000100,
425 .map_io = omap_sx1_map_io, 425 .map_io = omap_sx1_map_io,
426 .reserve = omap_reserve, 426 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 6b3cf14bc757..65d24204937a 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -26,10 +26,12 @@
26#include <linux/smc91x.h> 26#include <linux/smc91x.h>
27 27
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <mach/system.h>
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32 33
34#include <plat/board-voiceblue.h>
33#include <plat/common.h> 35#include <plat/common.h>
34#include <mach/gpio.h> 36#include <mach/gpio.h>
35#include <plat/flash.h> 37#include <plat/flash.h>
@@ -83,6 +85,9 @@ static struct platform_device serial_device = {
83 85
84static int __init ext_uart_init(void) 86static int __init ext_uart_init(void)
85{ 87{
88 if (!machine_is_voiceblue())
89 return -ENODEV;
90
86 return platform_device_register(&serial_device); 91 return platform_device_register(&serial_device);
87} 92}
88arch_initcall(ext_uart_init); 93arch_initcall(ext_uart_init);
@@ -158,53 +163,6 @@ static void __init voiceblue_init_irq(void)
158{ 163{
159 omap1_init_common_hw(); 164 omap1_init_common_hw();
160 omap_init_irq(); 165 omap_init_irq();
161 omap_gpio_init();
162}
163
164static void __init voiceblue_init(void)
165{
166 /* mux pins for uarts */
167 omap_cfg_reg(UART1_TX);
168 omap_cfg_reg(UART1_RTS);
169 omap_cfg_reg(UART2_TX);
170 omap_cfg_reg(UART2_RTS);
171 omap_cfg_reg(UART3_TX);
172 omap_cfg_reg(UART3_RX);
173
174 /* Watchdog */
175 gpio_request(0, "Watchdog");
176 /* smc91x reset */
177 gpio_request(7, "SMC91x reset");
178 gpio_direction_output(7, 1);
179 udelay(2); /* wait at least 100ns */
180 gpio_set_value(7, 0);
181 mdelay(50); /* 50ms until PHY ready */
182 /* smc91x interrupt pin */
183 gpio_request(8, "SMC91x irq");
184 /* 16C554 reset*/
185 gpio_request(6, "16C554 reset");
186 gpio_direction_output(6, 0);
187 /* 16C554 interrupt pins */
188 gpio_request(12, "16C554 irq");
189 gpio_request(13, "16C554 irq");
190 gpio_request(14, "16C554 irq");
191 gpio_request(15, "16C554 irq");
192 set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
193 set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
194 set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
195 set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
196
197 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
198 omap_board_config = voiceblue_config;
199 omap_board_config_size = ARRAY_SIZE(voiceblue_config);
200 omap_serial_init();
201 omap1_usb_init(&voiceblue_usb_config);
202 omap_register_i2c_bus(1, 100, NULL, 0);
203
204 /* There is a good chance board is going up, so enable power LED
205 * (it is connected through invertor) */
206 omap_writeb(0x00, OMAP_LPG1_LCR);
207 omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */
208} 166}
209 167
210static void __init voiceblue_map_io(void) 168static void __init voiceblue_map_io(void)
@@ -236,6 +194,9 @@ static struct notifier_block panic_block = {
236 194
237static int __init voiceblue_setup(void) 195static int __init voiceblue_setup(void)
238{ 196{
197 if (!machine_is_voiceblue())
198 return -ENODEV;
199
239 /* Setup panic notifier */ 200 /* Setup panic notifier */
240 atomic_notifier_chain_register(&panic_notifier_list, &panic_block); 201 atomic_notifier_chain_register(&panic_notifier_list, &panic_block);
241 202
@@ -270,8 +231,17 @@ void voiceblue_wdt_ping(void)
270 gpio_set_value(0, wdt_gpio_state); 231 gpio_set_value(0, wdt_gpio_state);
271} 232}
272 233
273void voiceblue_reset(void) 234static void voiceblue_reset(char mode, const char *cmd)
274{ 235{
236 /*
237 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
238 * "Global Software Reset Affects Traffic Controller Frequency".
239 */
240 if (cpu_is_omap5912()) {
241 omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL);
242 omap_writew(0x8, ARM_RSTCT1);
243 }
244
275 set_bit(MACHINE_REBOOT, &machine_state); 245 set_bit(MACHINE_REBOOT, &machine_state);
276 voiceblue_wdt_enable(); 246 voiceblue_wdt_enable();
277 while (1) ; 247 while (1) ;
@@ -281,10 +251,56 @@ EXPORT_SYMBOL(voiceblue_wdt_enable);
281EXPORT_SYMBOL(voiceblue_wdt_disable); 251EXPORT_SYMBOL(voiceblue_wdt_disable);
282EXPORT_SYMBOL(voiceblue_wdt_ping); 252EXPORT_SYMBOL(voiceblue_wdt_ping);
283 253
254static void __init voiceblue_init(void)
255{
256 /* mux pins for uarts */
257 omap_cfg_reg(UART1_TX);
258 omap_cfg_reg(UART1_RTS);
259 omap_cfg_reg(UART2_TX);
260 omap_cfg_reg(UART2_RTS);
261 omap_cfg_reg(UART3_TX);
262 omap_cfg_reg(UART3_RX);
263
264 /* Watchdog */
265 gpio_request(0, "Watchdog");
266 /* smc91x reset */
267 gpio_request(7, "SMC91x reset");
268 gpio_direction_output(7, 1);
269 udelay(2); /* wait at least 100ns */
270 gpio_set_value(7, 0);
271 mdelay(50); /* 50ms until PHY ready */
272 /* smc91x interrupt pin */
273 gpio_request(8, "SMC91x irq");
274 /* 16C554 reset*/
275 gpio_request(6, "16C554 reset");
276 gpio_direction_output(6, 0);
277 /* 16C554 interrupt pins */
278 gpio_request(12, "16C554 irq");
279 gpio_request(13, "16C554 irq");
280 gpio_request(14, "16C554 irq");
281 gpio_request(15, "16C554 irq");
282 irq_set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
283 irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
284 irq_set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
285 irq_set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
286
287 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
288 omap_board_config = voiceblue_config;
289 omap_board_config_size = ARRAY_SIZE(voiceblue_config);
290 omap_serial_init();
291 omap1_usb_init(&voiceblue_usb_config);
292 omap_register_i2c_bus(1, 100, NULL, 0);
293
294 /* There is a good chance board is going up, so enable power LED
295 * (it is connected through invertor) */
296 omap_writeb(0x00, OMAP_LPG1_LCR);
297 omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */
298
299 arch_reset = voiceblue_reset;
300}
301
284MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") 302MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
285 /* Maintainer: Ladislav Michl <michl@2n.cz> */ 303 /* Maintainer: Ladislav Michl <michl@2n.cz> */
286 .phys_io = 0xfff00000,
287 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
288 .boot_params = 0x10000100, 304 .boot_params = 0x10000100,
289 .map_io = voiceblue_map_io, 305 .map_io = voiceblue_map_io,
290 .reserve = omap_reserve, 306 .reserve = omap_reserve,
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index b8c7fb9d7921..84ef70476b51 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -17,9 +17,9 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/clk.h> 18#include <linux/clk.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/clkdev.h>
20 21
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/clkdev.h>
23 23
24#include <plat/cpu.h> 24#include <plat/cpu.h>
25#include <plat/usb.h> 25#include <plat/usb.h>
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index af54114b8f08..92400b9eb69f 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -143,7 +143,7 @@ static struct arm_idlect1_clk armper_ck = {
143 * activation. [ GPIO code for 1510 ] 143 * activation. [ GPIO code for 1510 ]
144 */ 144 */
145static struct clk arm_gpio_ck = { 145static struct clk arm_gpio_ck = {
146 .name = "arm_gpio_ck", 146 .name = "ick",
147 .ops = &clkops_generic, 147 .ops = &clkops_generic,
148 .parent = &ck_dpll1, 148 .parent = &ck_dpll1,
149 .flags = ENABLE_ON_INIT, 149 .flags = ENABLE_ON_INIT,
@@ -684,7 +684,7 @@ static struct omap_clk omap_clks[] = {
684 CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), 684 CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
685 CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), 685 CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310),
686 CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), 686 CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
687 CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310), 687 CLK("omap_gpio.0", "ick", &arm_gpio_ck, CK_1510 | CK_310),
688 CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), 688 CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
689 CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), 689 CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
690 CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), 690 CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
@@ -736,9 +736,9 @@ static struct omap_clk omap_clks[] = {
736 CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), 736 CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX),
737 /* Virtual clocks */ 737 /* Virtual clocks */
738 CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), 738 CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
739 CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), 739 CLK("omap_i2c.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX),
740 CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), 740 CLK("omap_i2c.1", "ick", &i2c_ick, CK_16XX),
741 CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), 741 CLK("omap_i2c.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX),
742 CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX), 742 CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX),
743 CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX), 743 CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX),
744 CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX), 744 CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX),
@@ -823,12 +823,10 @@ int __init omap1_clk_init(void)
823 crystal_type = info->system_clock_type; 823 crystal_type = info->system_clock_type;
824 } 824 }
825 825
826#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 826 if (cpu_is_omap7xx())
827 ck_ref.rate = 13000000; 827 ck_ref.rate = 13000000;
828#elif defined(CONFIG_ARCH_OMAP16XX) 828 if (cpu_is_omap16xx() && crystal_type == 2)
829 if (crystal_type == 2)
830 ck_ref.rate = 19200000; 829 ck_ref.rate = 19200000;
831#endif
832 830
833 pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: " 831 pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: "
834 "0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), 832 "0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
@@ -883,10 +881,11 @@ int __init omap1_clk_init(void)
883 ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, 881 ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
884 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); 882 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
885 883
886#if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) 884 if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
887 /* Select slicer output as OMAP input clock */ 885 /* Select slicer output as OMAP input clock */
888 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, OMAP7XX_PCC_UPLD_CTRL); 886 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
889#endif 887 OMAP7XX_PCC_UPLD_CTRL);
888 }
890 889
891 /* Amstrad Delta wants BCLK high when inactive */ 890 /* Amstrad Delta wants BCLK high when inactive */
892 if (machine_is_ams_delta()) 891 if (machine_is_ams_delta())
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index aa0725608fb1..36f26c3fa25e 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -9,6 +9,7 @@
9 * (at your option) any later version. 9 * (at your option) any later version.
10 */ 10 */
11 11
12#include <linux/dma-mapping.h>
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/kernel.h> 14#include <linux/kernel.h>
14#include <linux/init.h> 15#include <linux/init.h>
@@ -16,6 +17,7 @@
16#include <linux/io.h> 17#include <linux/io.h>
17#include <linux/spi/spi.h> 18#include <linux/spi/spi.h>
18 19
20#include <mach/camera.h>
19#include <mach/hardware.h> 21#include <mach/hardware.h>
20#include <asm/mach/map.h> 22#include <asm/mach/map.h>
21 23
@@ -25,6 +27,7 @@
25#include <mach/gpio.h> 27#include <mach/gpio.h>
26#include <plat/mmc.h> 28#include <plat/mmc.h>
27#include <plat/omap7xx.h> 29#include <plat/omap7xx.h>
30#include <plat/mcbsp.h>
28 31
29/*-------------------------------------------------------------------------*/ 32/*-------------------------------------------------------------------------*/
30 33
@@ -191,10 +194,76 @@ static inline void omap_init_spi100k(void)
191} 194}
192#endif 195#endif
193 196
197
198#define OMAP1_CAMERA_BASE 0xfffb6800
199#define OMAP1_CAMERA_IOSIZE 0x1c
200
201static struct resource omap1_camera_resources[] = {
202 [0] = {
203 .start = OMAP1_CAMERA_BASE,
204 .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
205 .flags = IORESOURCE_MEM,
206 },
207 [1] = {
208 .start = INT_CAMERA,
209 .flags = IORESOURCE_IRQ,
210 },
211};
212
213static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);
214
215static struct platform_device omap1_camera_device = {
216 .name = "omap1-camera",
217 .id = 0, /* This is used to put cameras on this interface */
218 .dev = {
219 .dma_mask = &omap1_camera_dma_mask,
220 .coherent_dma_mask = DMA_BIT_MASK(32),
221 },
222 .num_resources = ARRAY_SIZE(omap1_camera_resources),
223 .resource = omap1_camera_resources,
224};
225
226void __init omap1_camera_init(void *info)
227{
228 struct platform_device *dev = &omap1_camera_device;
229 int ret;
230
231 dev->dev.platform_data = info;
232
233 ret = platform_device_register(dev);
234 if (ret)
235 dev_err(&dev->dev, "unable to register device: %d\n", ret);
236}
237
238
194/*-------------------------------------------------------------------------*/ 239/*-------------------------------------------------------------------------*/
195 240
196static inline void omap_init_sti(void) {} 241static inline void omap_init_sti(void) {}
197 242
243#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
244
245static struct platform_device omap_pcm = {
246 .name = "omap-pcm-audio",
247 .id = -1,
248};
249
250OMAP_MCBSP_PLATFORM_DEVICE(1);
251OMAP_MCBSP_PLATFORM_DEVICE(2);
252OMAP_MCBSP_PLATFORM_DEVICE(3);
253
254static void omap_init_audio(void)
255{
256 platform_device_register(&omap_mcbsp1);
257 platform_device_register(&omap_mcbsp2);
258 if (!cpu_is_omap7xx())
259 platform_device_register(&omap_mcbsp3);
260 platform_device_register(&omap_pcm);
261}
262
263#else
264static inline void omap_init_audio(void) {}
265#endif
266
198/*-------------------------------------------------------------------------*/ 267/*-------------------------------------------------------------------------*/
199 268
200/* 269/*
@@ -212,13 +281,16 @@ static inline void omap_init_sti(void) {}
212 * Claiming GPIOs, and setting their direction and initial values, is the 281 * Claiming GPIOs, and setting their direction and initial values, is the
213 * responsibility of the device drivers. So is responding to probe(). 282 * responsibility of the device drivers. So is responding to probe().
214 * 283 *
215 * Board-specific knowlege like creating devices or pin setup is to be 284 * Board-specific knowledge like creating devices or pin setup is to be
216 * kept out of drivers as much as possible. In particular, pin setup 285 * kept out of drivers as much as possible. In particular, pin setup
217 * may be handled by the boot loader, and drivers should expect it will 286 * may be handled by the boot loader, and drivers should expect it will
218 * normally have been done by the time they're probed. 287 * normally have been done by the time they're probed.
219 */ 288 */
220static int __init omap1_init_devices(void) 289static int __init omap1_init_devices(void)
221{ 290{
291 if (!cpu_class_is_omap1())
292 return -ENODEV;
293
222 /* please keep these calls, and their implementations above, 294 /* please keep these calls, and their implementations above,
223 * in alphabetical order so they're easier to sort through. 295 * in alphabetical order so they're easier to sort through.
224 */ 296 */
@@ -227,8 +299,35 @@ static int __init omap1_init_devices(void)
227 omap_init_rtc(); 299 omap_init_rtc();
228 omap_init_spi100k(); 300 omap_init_spi100k();
229 omap_init_sti(); 301 omap_init_sti();
302 omap_init_audio();
230 303
231 return 0; 304 return 0;
232} 305}
233arch_initcall(omap1_init_devices); 306arch_initcall(omap1_init_devices);
234 307
308#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
309
310static struct resource wdt_resources[] = {
311 {
312 .start = 0xfffeb000,
313 .end = 0xfffeb07F,
314 .flags = IORESOURCE_MEM,
315 },
316};
317
318static struct platform_device omap_wdt_device = {
319 .name = "omap_wdt",
320 .id = -1,
321 .num_resources = ARRAY_SIZE(wdt_resources),
322 .resource = wdt_resources,
323};
324
325static int __init omap_init_wdt(void)
326{
327 if (!cpu_is_omap16xx())
328 return -ENODEV;
329
330 return platform_device_register(&omap_wdt_device);
331}
332subsys_initcall(omap_init_wdt);
333#endif
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
new file mode 100644
index 000000000000..f5a52204b89f
--- /dev/null
+++ b/arch/arm/mach-omap1/dma.c
@@ -0,0 +1,391 @@
1/*
2 * OMAP1/OMAP7xx - specific DMA driver
3 *
4 * Copyright (C) 2003 - 2008 Nokia Corporation
5 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
6 * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
7 * Graphics DMA and LCD DMA graphics tranformations
8 * by Imre Deak <imre.deak@nokia.com>
9 * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
10 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
11 *
12 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
13 * Converted DMA library into platform driver
14 * - G, Manjunath Kondaiah <manjugk@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
21#include <linux/err.h>
22#include <linux/io.h>
23#include <linux/slab.h>
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/device.h>
27
28#include <plat/dma.h>
29#include <plat/tc.h>
30#include <plat/irqs.h>
31
32#define OMAP1_DMA_BASE (0xfffed800)
33#define OMAP1_LOGICAL_DMA_CH_COUNT 17
34#define OMAP1_DMA_STRIDE 0x40
35
36static u32 errata;
37static u32 enable_1510_mode;
38static u8 dma_stride;
39static enum omap_reg_offsets dma_common_ch_start, dma_common_ch_end;
40
41static u16 reg_map[] = {
42 [GCR] = 0x400,
43 [GSCR] = 0x404,
44 [GRST1] = 0x408,
45 [HW_ID] = 0x442,
46 [PCH2_ID] = 0x444,
47 [PCH0_ID] = 0x446,
48 [PCH1_ID] = 0x448,
49 [PCHG_ID] = 0x44a,
50 [PCHD_ID] = 0x44c,
51 [CAPS_0] = 0x44e,
52 [CAPS_1] = 0x452,
53 [CAPS_2] = 0x456,
54 [CAPS_3] = 0x458,
55 [CAPS_4] = 0x45a,
56 [PCH2_SR] = 0x460,
57 [PCH0_SR] = 0x480,
58 [PCH1_SR] = 0x482,
59 [PCHD_SR] = 0x4c0,
60
61 /* Common Registers */
62 [CSDP] = 0x00,
63 [CCR] = 0x02,
64 [CICR] = 0x04,
65 [CSR] = 0x06,
66 [CEN] = 0x10,
67 [CFN] = 0x12,
68 [CSFI] = 0x14,
69 [CSEI] = 0x16,
70 [CPC] = 0x18, /* 15xx only */
71 [CSAC] = 0x18,
72 [CDAC] = 0x1a,
73 [CDEI] = 0x1c,
74 [CDFI] = 0x1e,
75 [CLNK_CTRL] = 0x28,
76
77 /* Channel specific register offsets */
78 [CSSA] = 0x08,
79 [CDSA] = 0x0c,
80 [COLOR] = 0x20,
81 [CCR2] = 0x24,
82 [LCH_CTRL] = 0x2a,
83};
84
85static struct resource res[] __initdata = {
86 [0] = {
87 .start = OMAP1_DMA_BASE,
88 .end = OMAP1_DMA_BASE + SZ_2K - 1,
89 .flags = IORESOURCE_MEM,
90 },
91 [1] = {
92 .name = "0",
93 .start = INT_DMA_CH0_6,
94 .flags = IORESOURCE_IRQ,
95 },
96 [2] = {
97 .name = "1",
98 .start = INT_DMA_CH1_7,
99 .flags = IORESOURCE_IRQ,
100 },
101 [3] = {
102 .name = "2",
103 .start = INT_DMA_CH2_8,
104 .flags = IORESOURCE_IRQ,
105 },
106 [4] = {
107 .name = "3",
108 .start = INT_DMA_CH3,
109 .flags = IORESOURCE_IRQ,
110 },
111 [5] = {
112 .name = "4",
113 .start = INT_DMA_CH4,
114 .flags = IORESOURCE_IRQ,
115 },
116 [6] = {
117 .name = "5",
118 .start = INT_DMA_CH5,
119 .flags = IORESOURCE_IRQ,
120 },
121 /* Handled in lcd_dma.c */
122 [7] = {
123 .name = "6",
124 .start = INT_1610_DMA_CH6,
125 .flags = IORESOURCE_IRQ,
126 },
127 /* irq's for omap16xx and omap7xx */
128 [8] = {
129 .name = "7",
130 .start = INT_1610_DMA_CH7,
131 .flags = IORESOURCE_IRQ,
132 },
133 [9] = {
134 .name = "8",
135 .start = INT_1610_DMA_CH8,
136 .flags = IORESOURCE_IRQ,
137 },
138 [10] = {
139 .name = "9",
140 .start = INT_1610_DMA_CH9,
141 .flags = IORESOURCE_IRQ,
142 },
143 [11] = {
144 .name = "10",
145 .start = INT_1610_DMA_CH10,
146 .flags = IORESOURCE_IRQ,
147 },
148 [12] = {
149 .name = "11",
150 .start = INT_1610_DMA_CH11,
151 .flags = IORESOURCE_IRQ,
152 },
153 [13] = {
154 .name = "12",
155 .start = INT_1610_DMA_CH12,
156 .flags = IORESOURCE_IRQ,
157 },
158 [14] = {
159 .name = "13",
160 .start = INT_1610_DMA_CH13,
161 .flags = IORESOURCE_IRQ,
162 },
163 [15] = {
164 .name = "14",
165 .start = INT_1610_DMA_CH14,
166 .flags = IORESOURCE_IRQ,
167 },
168 [16] = {
169 .name = "15",
170 .start = INT_1610_DMA_CH15,
171 .flags = IORESOURCE_IRQ,
172 },
173 [17] = {
174 .name = "16",
175 .start = INT_DMA_LCD,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
180static void __iomem *dma_base;
181static inline void dma_write(u32 val, int reg, int lch)
182{
183 u8 stride;
184 u32 offset;
185
186 stride = (reg >= dma_common_ch_start) ? dma_stride : 0;
187 offset = reg_map[reg] + (stride * lch);
188
189 __raw_writew(val, dma_base + offset);
190 if ((reg > CLNK_CTRL && reg < CCEN) ||
191 (reg > PCHD_ID && reg < CAPS_2)) {
192 u32 offset2 = reg_map[reg] + 2 + (stride * lch);
193 __raw_writew(val >> 16, dma_base + offset2);
194 }
195}
196
197static inline u32 dma_read(int reg, int lch)
198{
199 u8 stride;
200 u32 offset, val;
201
202 stride = (reg >= dma_common_ch_start) ? dma_stride : 0;
203 offset = reg_map[reg] + (stride * lch);
204
205 val = __raw_readw(dma_base + offset);
206 if ((reg > CLNK_CTRL && reg < CCEN) ||
207 (reg > PCHD_ID && reg < CAPS_2)) {
208 u16 upper;
209 u32 offset2 = reg_map[reg] + 2 + (stride * lch);
210 upper = __raw_readw(dma_base + offset2);
211 val |= (upper << 16);
212 }
213 return val;
214}
215
216static void omap1_clear_lch_regs(int lch)
217{
218 int i = dma_common_ch_start;
219
220 for (; i <= dma_common_ch_end; i += 1)
221 dma_write(0, i, lch);
222}
223
224static void omap1_clear_dma(int lch)
225{
226 u32 l;
227
228 l = dma_read(CCR, lch);
229 l &= ~OMAP_DMA_CCR_EN;
230 dma_write(l, CCR, lch);
231
232 /* Clear pending interrupts */
233 l = dma_read(CSR, lch);
234}
235
236static void omap1_show_dma_caps(void)
237{
238 if (enable_1510_mode) {
239 printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
240 } else {
241 u16 w;
242 printk(KERN_INFO "OMAP DMA hardware version %d\n",
243 dma_read(HW_ID, 0));
244 printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n",
245 dma_read(CAPS_0, 0), dma_read(CAPS_1, 0),
246 dma_read(CAPS_2, 0), dma_read(CAPS_3, 0),
247 dma_read(CAPS_4, 0));
248
249 /* Disable OMAP 3.0/3.1 compatibility mode. */
250 w = dma_read(GSCR, 0);
251 w |= 1 << 3;
252 dma_write(w, GSCR, 0);
253 }
254 return;
255}
256
257static u32 configure_dma_errata(void)
258{
259
260 /*
261 * Erratum 3.2/3.3: sometimes 0 is returned if CSAC/CDAC is
262 * read before the DMA controller finished disabling the channel.
263 */
264 if (!cpu_is_omap15xx())
265 SET_DMA_ERRATA(DMA_ERRATA_3_3);
266
267 return errata;
268}
269
270static int __init omap1_system_dma_init(void)
271{
272 struct omap_system_dma_plat_info *p;
273 struct omap_dma_dev_attr *d;
274 struct platform_device *pdev;
275 int ret;
276
277 pdev = platform_device_alloc("omap_dma_system", 0);
278 if (!pdev) {
279 pr_err("%s: Unable to device alloc for dma\n",
280 __func__);
281 return -ENOMEM;
282 }
283
284 dma_base = ioremap(res[0].start, resource_size(&res[0]));
285 if (!dma_base) {
286 pr_err("%s: Unable to ioremap\n", __func__);
287 ret = -ENODEV;
288 goto exit_device_put;
289 }
290
291 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
292 if (ret) {
293 dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n",
294 __func__, pdev->name, pdev->id);
295 goto exit_device_put;
296 }
297
298 p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
299 if (!p) {
300 dev_err(&pdev->dev, "%s: Unable to allocate 'p' for %s\n",
301 __func__, pdev->name);
302 ret = -ENOMEM;
303 goto exit_device_del;
304 }
305
306 d = kzalloc(sizeof(struct omap_dma_dev_attr), GFP_KERNEL);
307 if (!d) {
308 dev_err(&pdev->dev, "%s: Unable to allocate 'd' for %s\n",
309 __func__, pdev->name);
310 ret = -ENOMEM;
311 goto exit_release_p;
312 }
313
314 d->lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
315
316 /* Valid attributes for omap1 plus processors */
317 if (cpu_is_omap15xx())
318 d->dev_caps = ENABLE_1510_MODE;
319 enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
320
321 d->dev_caps |= SRC_PORT;
322 d->dev_caps |= DST_PORT;
323 d->dev_caps |= SRC_INDEX;
324 d->dev_caps |= DST_INDEX;
325 d->dev_caps |= IS_BURST_ONLY4;
326 d->dev_caps |= CLEAR_CSR_ON_READ;
327 d->dev_caps |= IS_WORD_16;
328
329
330 d->chan = kzalloc(sizeof(struct omap_dma_lch) *
331 (d->lch_count), GFP_KERNEL);
332 if (!d->chan) {
333 dev_err(&pdev->dev, "%s: Memory allocation failed"
334 "for d->chan!!!\n", __func__);
335 goto exit_release_d;
336 }
337
338 if (cpu_is_omap15xx())
339 d->chan_count = 9;
340 else if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
341 if (!(d->dev_caps & ENABLE_1510_MODE))
342 d->chan_count = 16;
343 else
344 d->chan_count = 9;
345 }
346
347 p->dma_attr = d;
348
349 p->show_dma_caps = omap1_show_dma_caps;
350 p->clear_lch_regs = omap1_clear_lch_regs;
351 p->clear_dma = omap1_clear_dma;
352 p->dma_write = dma_write;
353 p->dma_read = dma_read;
354 p->disable_irq_lch = NULL;
355
356 p->errata = configure_dma_errata();
357
358 ret = platform_device_add_data(pdev, p, sizeof(*p));
359 if (ret) {
360 dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n",
361 __func__, pdev->name, pdev->id);
362 goto exit_release_chan;
363 }
364
365 ret = platform_device_add(pdev);
366 if (ret) {
367 dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n",
368 __func__, pdev->name, pdev->id);
369 goto exit_release_chan;
370 }
371
372 dma_stride = OMAP1_DMA_STRIDE;
373 dma_common_ch_start = CPC;
374 dma_common_ch_end = COLOR;
375
376 return ret;
377
378exit_release_chan:
379 kfree(d->chan);
380exit_release_d:
381 kfree(d);
382exit_release_p:
383 kfree(p);
384exit_device_del:
385 platform_device_del(pdev);
386exit_device_put:
387 platform_device_put(pdev);
388
389 return ret;
390}
391arch_initcall(omap1_system_dma_init);
diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c
index 0b07a78eeaa7..1749cb37dda0 100644
--- a/arch/arm/mach-omap1/flash.c
+++ b/arch/arm/mach-omap1/flash.c
@@ -11,8 +11,9 @@
11 11
12#include <plat/io.h> 12#include <plat/io.h>
13#include <plat/tc.h> 13#include <plat/tc.h>
14#include <plat/flash.h>
14 15
15void omap1_set_vpp(struct map_info *map, int enable) 16void omap1_set_vpp(struct platform_device *pdev, int enable)
16{ 17{
17 static int count; 18 static int count;
18 u32 l; 19 u32 l;
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 5cfce1636da0..cddbf8b089ce 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -30,9 +30,9 @@
30#include <plat/fpga.h> 30#include <plat/fpga.h>
31#include <mach/gpio.h> 31#include <mach/gpio.h>
32 32
33static void fpga_mask_irq(unsigned int irq) 33static void fpga_mask_irq(struct irq_data *d)
34{ 34{
35 irq -= OMAP_FPGA_IRQ_BASE; 35 unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
36 36
37 if (irq < 8) 37 if (irq < 8)
38 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) 38 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
@@ -58,14 +58,14 @@ static inline u32 get_fpga_unmasked_irqs(void)
58} 58}
59 59
60 60
61static void fpga_ack_irq(unsigned int irq) 61static void fpga_ack_irq(struct irq_data *d)
62{ 62{
63 /* Don't need to explicitly ACK FPGA interrupts */ 63 /* Don't need to explicitly ACK FPGA interrupts */
64} 64}
65 65
66static void fpga_unmask_irq(unsigned int irq) 66static void fpga_unmask_irq(struct irq_data *d)
67{ 67{
68 irq -= OMAP_FPGA_IRQ_BASE; 68 unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
69 69
70 if (irq < 8) 70 if (irq < 8)
71 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)), 71 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
@@ -78,10 +78,10 @@ static void fpga_unmask_irq(unsigned int irq)
78 | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2); 78 | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
79} 79}
80 80
81static void fpga_mask_ack_irq(unsigned int irq) 81static void fpga_mask_ack_irq(struct irq_data *d)
82{ 82{
83 fpga_mask_irq(irq); 83 fpga_mask_irq(d);
84 fpga_ack_irq(irq); 84 fpga_ack_irq(d);
85} 85}
86 86
87void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) 87void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
@@ -105,17 +105,17 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
105 105
106static struct irq_chip omap_fpga_irq_ack = { 106static struct irq_chip omap_fpga_irq_ack = {
107 .name = "FPGA-ack", 107 .name = "FPGA-ack",
108 .ack = fpga_mask_ack_irq, 108 .irq_ack = fpga_mask_ack_irq,
109 .mask = fpga_mask_irq, 109 .irq_mask = fpga_mask_irq,
110 .unmask = fpga_unmask_irq, 110 .irq_unmask = fpga_unmask_irq,
111}; 111};
112 112
113 113
114static struct irq_chip omap_fpga_irq = { 114static struct irq_chip omap_fpga_irq = {
115 .name = "FPGA", 115 .name = "FPGA",
116 .ack = fpga_ack_irq, 116 .irq_ack = fpga_ack_irq,
117 .mask = fpga_mask_irq, 117 .irq_mask = fpga_mask_irq,
118 .unmask = fpga_unmask_irq, 118 .irq_unmask = fpga_unmask_irq,
119}; 119};
120 120
121/* 121/*
@@ -143,7 +143,7 @@ static struct irq_chip omap_fpga_irq = {
143 */ 143 */
144void omap1510_fpga_init_irq(void) 144void omap1510_fpga_init_irq(void)
145{ 145{
146 int i; 146 int i, res;
147 147
148 __raw_writeb(0, OMAP1510_FPGA_IMR_LO); 148 __raw_writeb(0, OMAP1510_FPGA_IMR_LO);
149 __raw_writeb(0, OMAP1510_FPGA_IMR_HI); 149 __raw_writeb(0, OMAP1510_FPGA_IMR_HI);
@@ -156,17 +156,17 @@ void omap1510_fpga_init_irq(void)
156 * The touchscreen interrupt is level-sensitive, so 156 * The touchscreen interrupt is level-sensitive, so
157 * we'll use the regular mask_ack routine for it. 157 * we'll use the regular mask_ack routine for it.
158 */ 158 */
159 set_irq_chip(i, &omap_fpga_irq_ack); 159 irq_set_chip(i, &omap_fpga_irq_ack);
160 } 160 }
161 else { 161 else {
162 /* 162 /*
163 * All FPGA interrupts except the touchscreen are 163 * All FPGA interrupts except the touchscreen are
164 * edge-sensitive, so we won't mask them. 164 * edge-sensitive, so we won't mask them.
165 */ 165 */
166 set_irq_chip(i, &omap_fpga_irq); 166 irq_set_chip(i, &omap_fpga_irq);
167 } 167 }
168 168
169 set_irq_handler(i, handle_edge_irq); 169 irq_set_handler(i, handle_edge_irq);
170 set_irq_flags(i, IRQF_VALID); 170 set_irq_flags(i, IRQF_VALID);
171 } 171 }
172 172
@@ -177,10 +177,12 @@ void omap1510_fpga_init_irq(void)
177 * NOTE: For general GPIO/MPUIO access and interrupts, please see 177 * NOTE: For general GPIO/MPUIO access and interrupts, please see
178 * gpio.[ch] 178 * gpio.[ch]
179 */ 179 */
180 gpio_request(13, "FPGA irq"); 180 res = gpio_request(13, "FPGA irq");
181 if (res) {
182 pr_err("%s failed to get gpio\n", __func__);
183 return;
184 }
181 gpio_direction_input(13); 185 gpio_direction_input(13);
182 set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); 186 irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
183 set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); 187 irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
184} 188}
185
186EXPORT_SYMBOL(omap1510_fpga_init_irq);
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
new file mode 100644
index 000000000000..364137c2042c
--- /dev/null
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -0,0 +1,99 @@
1/*
2 * OMAP15xx specific gpio init
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Author:
7 * Charulatha V <charu@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/gpio.h>
20
21#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
22#define OMAP1510_GPIO_BASE 0xFFFCE000
23
24/* gpio1 */
25static struct __initdata resource omap15xx_mpu_gpio_resources[] = {
26 {
27 .start = OMAP1_MPUIO_VBASE,
28 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
29 .flags = IORESOURCE_MEM,
30 },
31 {
32 .start = INT_MPUIO,
33 .flags = IORESOURCE_IRQ,
34 },
35};
36
37static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
38 .virtual_irq_start = IH_MPUIO_BASE,
39 .bank_type = METHOD_MPUIO,
40 .bank_width = 16,
41 .bank_stride = 1,
42};
43
44static struct platform_device omap15xx_mpu_gpio = {
45 .name = "omap_gpio",
46 .id = 0,
47 .dev = {
48 .platform_data = &omap15xx_mpu_gpio_config,
49 },
50 .num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources),
51 .resource = omap15xx_mpu_gpio_resources,
52};
53
54/* gpio2 */
55static struct __initdata resource omap15xx_gpio_resources[] = {
56 {
57 .start = OMAP1510_GPIO_BASE,
58 .end = OMAP1510_GPIO_BASE + SZ_2K - 1,
59 .flags = IORESOURCE_MEM,
60 },
61 {
62 .start = INT_GPIO_BANK1,
63 .flags = IORESOURCE_IRQ,
64 },
65};
66
67static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
68 .virtual_irq_start = IH_GPIO_BASE,
69 .bank_type = METHOD_GPIO_1510,
70 .bank_width = 16,
71};
72
73static struct platform_device omap15xx_gpio = {
74 .name = "omap_gpio",
75 .id = 1,
76 .dev = {
77 .platform_data = &omap15xx_gpio_config,
78 },
79 .num_resources = ARRAY_SIZE(omap15xx_gpio_resources),
80 .resource = omap15xx_gpio_resources,
81};
82
83/*
84 * omap15xx_gpio_init needs to be done before
85 * machine_init functions access gpio APIs.
86 * Hence omap15xx_gpio_init is a postcore_initcall.
87 */
88static int __init omap15xx_gpio_init(void)
89{
90 if (!cpu_is_omap15xx())
91 return -EINVAL;
92
93 platform_device_register(&omap15xx_mpu_gpio);
94 platform_device_register(&omap15xx_gpio);
95
96 gpio_bank_count = 2;
97 return 0;
98}
99postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
new file mode 100644
index 000000000000..293a246e2824
--- /dev/null
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -0,0 +1,200 @@
1/*
2 * OMAP16xx specific gpio init
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Author:
7 * Charulatha V <charu@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/gpio.h>
20
21#define OMAP1610_GPIO1_BASE 0xfffbe400
22#define OMAP1610_GPIO2_BASE 0xfffbec00
23#define OMAP1610_GPIO3_BASE 0xfffbb400
24#define OMAP1610_GPIO4_BASE 0xfffbbc00
25#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
26
27/* mpu gpio */
28static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
29 {
30 .start = OMAP1_MPUIO_VBASE,
31 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
32 .flags = IORESOURCE_MEM,
33 },
34 {
35 .start = INT_MPUIO,
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
40static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
41 .virtual_irq_start = IH_MPUIO_BASE,
42 .bank_type = METHOD_MPUIO,
43 .bank_width = 16,
44 .bank_stride = 1,
45};
46
47static struct platform_device omap16xx_mpu_gpio = {
48 .name = "omap_gpio",
49 .id = 0,
50 .dev = {
51 .platform_data = &omap16xx_mpu_gpio_config,
52 },
53 .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
54 .resource = omap16xx_mpu_gpio_resources,
55};
56
57/* gpio1 */
58static struct __initdata resource omap16xx_gpio1_resources[] = {
59 {
60 .start = OMAP1610_GPIO1_BASE,
61 .end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
62 .flags = IORESOURCE_MEM,
63 },
64 {
65 .start = INT_GPIO_BANK1,
66 .flags = IORESOURCE_IRQ,
67 },
68};
69
70static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
71 .virtual_irq_start = IH_GPIO_BASE,
72 .bank_type = METHOD_GPIO_1610,
73 .bank_width = 16,
74};
75
76static struct platform_device omap16xx_gpio1 = {
77 .name = "omap_gpio",
78 .id = 1,
79 .dev = {
80 .platform_data = &omap16xx_gpio1_config,
81 },
82 .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
83 .resource = omap16xx_gpio1_resources,
84};
85
86/* gpio2 */
87static struct __initdata resource omap16xx_gpio2_resources[] = {
88 {
89 .start = OMAP1610_GPIO2_BASE,
90 .end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
91 .flags = IORESOURCE_MEM,
92 },
93 {
94 .start = INT_1610_GPIO_BANK2,
95 .flags = IORESOURCE_IRQ,
96 },
97};
98
99static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
100 .virtual_irq_start = IH_GPIO_BASE + 16,
101 .bank_type = METHOD_GPIO_1610,
102 .bank_width = 16,
103};
104
105static struct platform_device omap16xx_gpio2 = {
106 .name = "omap_gpio",
107 .id = 2,
108 .dev = {
109 .platform_data = &omap16xx_gpio2_config,
110 },
111 .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
112 .resource = omap16xx_gpio2_resources,
113};
114
115/* gpio3 */
116static struct __initdata resource omap16xx_gpio3_resources[] = {
117 {
118 .start = OMAP1610_GPIO3_BASE,
119 .end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
120 .flags = IORESOURCE_MEM,
121 },
122 {
123 .start = INT_1610_GPIO_BANK3,
124 .flags = IORESOURCE_IRQ,
125 },
126};
127
128static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
129 .virtual_irq_start = IH_GPIO_BASE + 32,
130 .bank_type = METHOD_GPIO_1610,
131 .bank_width = 16,
132};
133
134static struct platform_device omap16xx_gpio3 = {
135 .name = "omap_gpio",
136 .id = 3,
137 .dev = {
138 .platform_data = &omap16xx_gpio3_config,
139 },
140 .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
141 .resource = omap16xx_gpio3_resources,
142};
143
144/* gpio4 */
145static struct __initdata resource omap16xx_gpio4_resources[] = {
146 {
147 .start = OMAP1610_GPIO4_BASE,
148 .end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
149 .flags = IORESOURCE_MEM,
150 },
151 {
152 .start = INT_1610_GPIO_BANK4,
153 .flags = IORESOURCE_IRQ,
154 },
155};
156
157static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
158 .virtual_irq_start = IH_GPIO_BASE + 48,
159 .bank_type = METHOD_GPIO_1610,
160 .bank_width = 16,
161};
162
163static struct platform_device omap16xx_gpio4 = {
164 .name = "omap_gpio",
165 .id = 4,
166 .dev = {
167 .platform_data = &omap16xx_gpio4_config,
168 },
169 .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
170 .resource = omap16xx_gpio4_resources,
171};
172
173static struct __initdata platform_device * omap16xx_gpio_dev[] = {
174 &omap16xx_mpu_gpio,
175 &omap16xx_gpio1,
176 &omap16xx_gpio2,
177 &omap16xx_gpio3,
178 &omap16xx_gpio4,
179};
180
181/*
182 * omap16xx_gpio_init needs to be done before
183 * machine_init functions access gpio APIs.
184 * Hence omap16xx_gpio_init is a postcore_initcall.
185 */
186static int __init omap16xx_gpio_init(void)
187{
188 int i;
189
190 if (!cpu_is_omap16xx())
191 return -EINVAL;
192
193 for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
194 platform_device_register(omap16xx_gpio_dev[i]);
195
196 gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
197
198 return 0;
199}
200postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
new file mode 100644
index 000000000000..c6ad248d63a6
--- /dev/null
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -0,0 +1,262 @@
1/*
2 * OMAP7xx specific gpio init
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Author:
7 * Charulatha V <charu@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/gpio.h>
20
21#define OMAP7XX_GPIO1_BASE 0xfffbc000
22#define OMAP7XX_GPIO2_BASE 0xfffbc800
23#define OMAP7XX_GPIO3_BASE 0xfffbd000
24#define OMAP7XX_GPIO4_BASE 0xfffbd800
25#define OMAP7XX_GPIO5_BASE 0xfffbe000
26#define OMAP7XX_GPIO6_BASE 0xfffbe800
27#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
28
29/* mpu gpio */
30static struct __initdata resource omap7xx_mpu_gpio_resources[] = {
31 {
32 .start = OMAP1_MPUIO_VBASE,
33 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
34 .flags = IORESOURCE_MEM,
35 },
36 {
37 .start = INT_7XX_MPUIO,
38 .flags = IORESOURCE_IRQ,
39 },
40};
41
42static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
43 .virtual_irq_start = IH_MPUIO_BASE,
44 .bank_type = METHOD_MPUIO,
45 .bank_width = 32,
46 .bank_stride = 2,
47};
48
49static struct platform_device omap7xx_mpu_gpio = {
50 .name = "omap_gpio",
51 .id = 0,
52 .dev = {
53 .platform_data = &omap7xx_mpu_gpio_config,
54 },
55 .num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources),
56 .resource = omap7xx_mpu_gpio_resources,
57};
58
59/* gpio1 */
60static struct __initdata resource omap7xx_gpio1_resources[] = {
61 {
62 .start = OMAP7XX_GPIO1_BASE,
63 .end = OMAP7XX_GPIO1_BASE + SZ_2K - 1,
64 .flags = IORESOURCE_MEM,
65 },
66 {
67 .start = INT_7XX_GPIO_BANK1,
68 .flags = IORESOURCE_IRQ,
69 },
70};
71
72static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
73 .virtual_irq_start = IH_GPIO_BASE,
74 .bank_type = METHOD_GPIO_7XX,
75 .bank_width = 32,
76};
77
78static struct platform_device omap7xx_gpio1 = {
79 .name = "omap_gpio",
80 .id = 1,
81 .dev = {
82 .platform_data = &omap7xx_gpio1_config,
83 },
84 .num_resources = ARRAY_SIZE(omap7xx_gpio1_resources),
85 .resource = omap7xx_gpio1_resources,
86};
87
88/* gpio2 */
89static struct __initdata resource omap7xx_gpio2_resources[] = {
90 {
91 .start = OMAP7XX_GPIO2_BASE,
92 .end = OMAP7XX_GPIO2_BASE + SZ_2K - 1,
93 .flags = IORESOURCE_MEM,
94 },
95 {
96 .start = INT_7XX_GPIO_BANK2,
97 .flags = IORESOURCE_IRQ,
98 },
99};
100
101static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
102 .virtual_irq_start = IH_GPIO_BASE + 32,
103 .bank_type = METHOD_GPIO_7XX,
104 .bank_width = 32,
105};
106
107static struct platform_device omap7xx_gpio2 = {
108 .name = "omap_gpio",
109 .id = 2,
110 .dev = {
111 .platform_data = &omap7xx_gpio2_config,
112 },
113 .num_resources = ARRAY_SIZE(omap7xx_gpio2_resources),
114 .resource = omap7xx_gpio2_resources,
115};
116
117/* gpio3 */
118static struct __initdata resource omap7xx_gpio3_resources[] = {
119 {
120 .start = OMAP7XX_GPIO3_BASE,
121 .end = OMAP7XX_GPIO3_BASE + SZ_2K - 1,
122 .flags = IORESOURCE_MEM,
123 },
124 {
125 .start = INT_7XX_GPIO_BANK3,
126 .flags = IORESOURCE_IRQ,
127 },
128};
129
130static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = {
131 .virtual_irq_start = IH_GPIO_BASE + 64,
132 .bank_type = METHOD_GPIO_7XX,
133 .bank_width = 32,
134};
135
136static struct platform_device omap7xx_gpio3 = {
137 .name = "omap_gpio",
138 .id = 3,
139 .dev = {
140 .platform_data = &omap7xx_gpio3_config,
141 },
142 .num_resources = ARRAY_SIZE(omap7xx_gpio3_resources),
143 .resource = omap7xx_gpio3_resources,
144};
145
146/* gpio4 */
147static struct __initdata resource omap7xx_gpio4_resources[] = {
148 {
149 .start = OMAP7XX_GPIO4_BASE,
150 .end = OMAP7XX_GPIO4_BASE + SZ_2K - 1,
151 .flags = IORESOURCE_MEM,
152 },
153 {
154 .start = INT_7XX_GPIO_BANK4,
155 .flags = IORESOURCE_IRQ,
156 },
157};
158
159static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = {
160 .virtual_irq_start = IH_GPIO_BASE + 96,
161 .bank_type = METHOD_GPIO_7XX,
162 .bank_width = 32,
163};
164
165static struct platform_device omap7xx_gpio4 = {
166 .name = "omap_gpio",
167 .id = 4,
168 .dev = {
169 .platform_data = &omap7xx_gpio4_config,
170 },
171 .num_resources = ARRAY_SIZE(omap7xx_gpio4_resources),
172 .resource = omap7xx_gpio4_resources,
173};
174
175/* gpio5 */
176static struct __initdata resource omap7xx_gpio5_resources[] = {
177 {
178 .start = OMAP7XX_GPIO5_BASE,
179 .end = OMAP7XX_GPIO5_BASE + SZ_2K - 1,
180 .flags = IORESOURCE_MEM,
181 },
182 {
183 .start = INT_7XX_GPIO_BANK5,
184 .flags = IORESOURCE_IRQ,
185 },
186};
187
188static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = {
189 .virtual_irq_start = IH_GPIO_BASE + 128,
190 .bank_type = METHOD_GPIO_7XX,
191 .bank_width = 32,
192};
193
194static struct platform_device omap7xx_gpio5 = {
195 .name = "omap_gpio",
196 .id = 5,
197 .dev = {
198 .platform_data = &omap7xx_gpio5_config,
199 },
200 .num_resources = ARRAY_SIZE(omap7xx_gpio5_resources),
201 .resource = omap7xx_gpio5_resources,
202};
203
204/* gpio6 */
205static struct __initdata resource omap7xx_gpio6_resources[] = {
206 {
207 .start = OMAP7XX_GPIO6_BASE,
208 .end = OMAP7XX_GPIO6_BASE + SZ_2K - 1,
209 .flags = IORESOURCE_MEM,
210 },
211 {
212 .start = INT_7XX_GPIO_BANK6,
213 .flags = IORESOURCE_IRQ,
214 },
215};
216
217static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = {
218 .virtual_irq_start = IH_GPIO_BASE + 160,
219 .bank_type = METHOD_GPIO_7XX,
220 .bank_width = 32,
221};
222
223static struct platform_device omap7xx_gpio6 = {
224 .name = "omap_gpio",
225 .id = 6,
226 .dev = {
227 .platform_data = &omap7xx_gpio6_config,
228 },
229 .num_resources = ARRAY_SIZE(omap7xx_gpio6_resources),
230 .resource = omap7xx_gpio6_resources,
231};
232
233static struct __initdata platform_device * omap7xx_gpio_dev[] = {
234 &omap7xx_mpu_gpio,
235 &omap7xx_gpio1,
236 &omap7xx_gpio2,
237 &omap7xx_gpio3,
238 &omap7xx_gpio4,
239 &omap7xx_gpio5,
240 &omap7xx_gpio6,
241};
242
243/*
244 * omap7xx_gpio_init needs to be done before
245 * machine_init functions access gpio APIs.
246 * Hence omap7xx_gpio_init is a postcore_initcall.
247 */
248static int __init omap7xx_gpio_init(void)
249{
250 int i;
251
252 if (!cpu_is_omap7xx())
253 return -EINVAL;
254
255 for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
256 platform_device_register(omap7xx_gpio_dev[i]);
257
258 gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
259
260 return 0;
261}
262postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
index 7a2df29400ca..23eed0035ed8 100644
--- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
+++ b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
@@ -31,7 +31,7 @@
31#endif 31#endif
32 32
33/* 33/*
34 * These are the offsets from the begining of the fiq_buffer. They are put here 34 * These are the offsets from the beginning of the fiq_buffer. They are put here
35 * since the buffer and header need to be accessed by drivers servicing devices 35 * since the buffer and header need to be accessed by drivers servicing devices
36 * which generate GPIO interrupts - e.g. keyboard, modem, hook switch. 36 * which generate GPIO interrupts - e.g. keyboard, modem, hook switch.
37 */ 37 */
diff --git a/arch/arm/mach-omap1/include/mach/camera.h b/arch/arm/mach-omap1/include/mach/camera.h
new file mode 100644
index 000000000000..847d00f0bb0a
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/camera.h
@@ -0,0 +1,13 @@
1#ifndef __ASM_ARCH_CAMERA_H_
2#define __ASM_ARCH_CAMERA_H_
3
4#include <media/omap1_camera.h>
5
6void omap1_camera_init(void *);
7
8static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info)
9{
10 omap1_camera_init(info);
11}
12
13#endif /* __ASM_ARCH_CAMERA_H_ */
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S
index 671408eb4ab4..62856044eb63 100644
--- a/arch/arm/mach-omap1/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -17,6 +17,9 @@
17 17
18#include <plat/serial.h> 18#include <plat/serial.h>
19 19
20#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
21#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
22
20 .pushsection .data 23 .pushsection .data
21omap_uart_phys: .word 0x0 24omap_uart_phys: .word 0x0
22omap_uart_virt: .word 0x0 25omap_uart_virt: .word 0x0
@@ -28,56 +31,58 @@ omap_uart_virt: .word 0x0
28 * the desired UART phys and virt addresses temporarily into 31 * the desired UART phys and virt addresses temporarily into
29 * the omap_uart_phys and omap_uart_virt above. 32 * the omap_uart_phys and omap_uart_virt above.
30 */ 33 */
31 .macro addruart, rx, tmp 34 .macro addruart, rp, rv
32 35
33 /* Use omap_uart_phys/virt if already configured */ 36 /* Use omap_uart_phys/virt if already configured */
349: mrc p15, 0, \rx, c1, c0 379: mrc p15, 0, \rp, c1, c0
35 tst \rx, #1 @ MMU enabled? 38 tst \rp, #1 @ MMU enabled?
36 ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address 39 ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
37 ldrne \rx, =omap_uart_virt @ virtual base 40 ldrne \rp, =omap_uart_phys @ MMU enabled
38 ldr \rx, [\rx, #0] 41 add \rv, \rp, #4 @ omap_uart_virt
39 cmp \rx, #0 @ is port configured? 42 ldr \rp, [\rp, #0]
43 ldr \rv, [\rv, #0]
44 cmp \rp, #0 @ is port configured?
45 cmpne \rv, #0
40 bne 99f @ already configured 46 bne 99f @ already configured
41 47
42 /* Check the debug UART configuration set in uncompress.h */ 48 /* Check the debug UART configuration set in uncompress.h */
43 mrc p15, 0, \rx, c1, c0 49 mrc p15, 0, \rp, c1, c0
44 tst \rx, #1 @ MMU enabled? 50 tst \rp, #1 @ MMU enabled?
45 ldreq \rx, =OMAP_UART_INFO 51 ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
46 ldrne \rx, =__phys_to_virt(OMAP_UART_INFO) 52 ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled
47 ldr \rx, [\rx, #0] 53 ldr \rp, [\rp, #0]
48 54
49 /* Select the UART to use based on the UART1 scratchpad value */ 55 /* Select the UART to use based on the UART1 scratchpad value */
5010: cmp \rx, #0 @ no port configured? 5610: cmp \rp, #0 @ no port configured?
51 beq 11f @ if none, try to use UART1 57 beq 11f @ if none, try to use UART1
52 cmp \rx, #OMAP1UART1 58 cmp \rp, #OMAP1UART1
53 beq 11f @ configure OMAP1UART1 59 beq 11f @ configure OMAP1UART1
54 cmp \rx, #OMAP1UART2 60 cmp \rp, #OMAP1UART2
55 beq 12f @ configure OMAP1UART2 61 beq 12f @ configure OMAP1UART2
56 cmp \rx, #OMAP1UART3 62 cmp \rp, #OMAP1UART3
57 beq 13f @ configure OMAP2UART3 63 beq 13f @ configure OMAP2UART3
58 64
59 /* Configure the UART offset from the phys/virt base */ 65 /* Configure the UART offset from the phys/virt base */
6011: mov \rx, #0x00fb0000 @ OMAP1UART1 6611: mov \rp, #0x00fb0000 @ OMAP1UART1
61 b 98f 67 b 98f
6212: mov \rx, #0x00fb0000 @ OMAP1UART1 6812: mov \rp, #0x00fb0000 @ OMAP1UART1
63 orr \rx, \rx, #0x00000800 @ OMAP1UART2 69 orr \rp, \rp, #0x00000800 @ OMAP1UART2
64 b 98f 70 b 98f
6513: mov \rx, #0x00fb0000 @ OMAP1UART1 7113: mov \rp, #0x00fb0000 @ OMAP1UART1
66 orr \rx, \rx, #0x00000800 @ OMAP1UART2 72 orr \rp, \rp, #0x00000800 @ OMAP1UART2
67 orr \rx, \rx, #0x00009000 @ OMAP1UART3 73 orr \rp, \rp, #0x00009000 @ OMAP1UART3
68 74
69 /* Store both phys and virt address for the uart */ 75 /* Store both phys and virt address for the uart */
7098: add \rx, \rx, #0xff000000 @ phys base 7698: add \rp, \rp, #0xff000000 @ phys base
71 mrc p15, 0, \tmp, c1, c0 77 mrc p15, 0, \rv, c1, c0
72 tst \tmp, #1 @ MMU enabled? 78 tst \rv, #1 @ MMU enabled?
73 ldreq \tmp, =__virt_to_phys(omap_uart_phys) 79 ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
74 ldrne \tmp, =omap_uart_phys 80 ldrne \rv, =omap_uart_phys @ MMU enabled
75 str \rx, [\tmp, #0] 81 str \rp, [\rv, #0]
76 sub \rx, \rx, #0xff000000 @ phys base 82 sub \rp, \rp, #0xff000000 @ phys base
77 add \rx, \rx, #0xfe000000 @ virt base 83 add \rp, \rp, #0xfe000000 @ virt base
78 ldreq \tmp, =__virt_to_phys(omap_uart_virt) 84 add \rv, \rv, #4 @ omap_uart_lsr
79 ldrne \tmp, =omap_uart_virt 85 str \rp, [\rv, #0]
80 str \rx, [\tmp, #0]
81 b 9b 86 b 9b
8299: 8799:
83 .endm 88 .endm
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index df9060edda28..bfb4fb1d7382 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -14,20 +14,6 @@
14#include <mach/irqs.h> 14#include <mach/irqs.h>
15#include <asm/hardware/gic.h> 15#include <asm/hardware/gic.h>
16 16
17#if (defined(CONFIG_ARCH_OMAP730)||defined(CONFIG_ARCH_OMAP850)) && \
18 (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
19#error "FIXME: OMAP7XX doesn't support multiple-OMAP"
20#elif defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
21#define INT_IH2_IRQ INT_7XX_IH2_IRQ
22#elif defined(CONFIG_ARCH_OMAP15XX)
23#define INT_IH2_IRQ INT_1510_IH2_IRQ
24#elif defined(CONFIG_ARCH_OMAP16XX)
25#define INT_IH2_IRQ INT_1610_IH2_IRQ
26#else
27#warning "IH2 IRQ defaulted"
28#define INT_IH2_IRQ INT_1510_IH2_IRQ
29#endif
30
31 .macro disable_fiq 17 .macro disable_fiq
32 .endm 18 .endm
33 19
@@ -47,9 +33,11 @@
47 beq 1510f 33 beq 1510f
48 34
49 ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] 35 ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
36 ldr \tmp, =omap_irq_flags @ irq flags address
37 ldr \tmp, [\tmp, #0] @ irq flags value
50 cmp \irqnr, #0 38 cmp \irqnr, #0
51 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] 39 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
52 cmpeq \irqnr, #INT_IH2_IRQ 40 cmpeq \irqnr, \tmp
53 ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE) 41 ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
54 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] 42 ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
55 addeqs \irqnr, \irqnr, #32 43 addeqs \irqnr, \irqnr, #32
diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h
index 1b2af14df151..22ec4a479577 100644
--- a/arch/arm/mach-omap1/include/mach/vmalloc.h
+++ b/arch/arm/mach-omap1/include/mach/vmalloc.h
@@ -17,4 +17,4 @@
17 * along with this program; if not, write to the Free Software 17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20#define VMALLOC_END (PAGE_OFFSET + 0x18000000) 20#define VMALLOC_END 0xd8000000UL
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 0ce3fec2d257..870886a29594 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -142,3 +142,42 @@ void __init omap1_init_common_hw(void)
142 omap1_mux_init(); 142 omap1_mux_init();
143} 143}
144 144
145/*
146 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
147 */
148
149u8 omap_readb(u32 pa)
150{
151 return __raw_readb(OMAP1_IO_ADDRESS(pa));
152}
153EXPORT_SYMBOL(omap_readb);
154
155u16 omap_readw(u32 pa)
156{
157 return __raw_readw(OMAP1_IO_ADDRESS(pa));
158}
159EXPORT_SYMBOL(omap_readw);
160
161u32 omap_readl(u32 pa)
162{
163 return __raw_readl(OMAP1_IO_ADDRESS(pa));
164}
165EXPORT_SYMBOL(omap_readl);
166
167void omap_writeb(u8 v, u32 pa)
168{
169 __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
170}
171EXPORT_SYMBOL(omap_writeb);
172
173void omap_writew(u16 v, u32 pa)
174{
175 __raw_writew(v, OMAP1_IO_ADDRESS(pa));
176}
177EXPORT_SYMBOL(omap_writew);
178
179void omap_writel(u32 v, u32 pa)
180{
181 __raw_writel(v, OMAP1_IO_ADDRESS(pa));
182}
183EXPORT_SYMBOL(omap_writel);
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index db913c34d1fe..5d3da7a63af3 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -57,6 +57,7 @@ struct omap_irq_bank {
57 unsigned long wake_enable; 57 unsigned long wake_enable;
58}; 58};
59 59
60u32 omap_irq_flags;
60static unsigned int irq_bank_count; 61static unsigned int irq_bank_count;
61static struct omap_irq_bank *irq_banks; 62static struct omap_irq_bank *irq_banks;
62 63
@@ -70,48 +71,48 @@ static inline void irq_bank_writel(unsigned long value, int bank, int offset)
70 omap_writel(value, irq_banks[bank].base_reg + offset); 71 omap_writel(value, irq_banks[bank].base_reg + offset);
71} 72}
72 73
73static void omap_ack_irq(unsigned int irq) 74static void omap_ack_irq(struct irq_data *d)
74{ 75{
75 if (irq > 31) 76 if (d->irq > 31)
76 omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET); 77 omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET);
77 78
78 omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET); 79 omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET);
79} 80}
80 81
81static void omap_mask_irq(unsigned int irq) 82static void omap_mask_irq(struct irq_data *d)
82{ 83{
83 int bank = IRQ_BANK(irq); 84 int bank = IRQ_BANK(d->irq);
84 u32 l; 85 u32 l;
85 86
86 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); 87 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
87 l |= 1 << IRQ_BIT(irq); 88 l |= 1 << IRQ_BIT(d->irq);
88 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); 89 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
89} 90}
90 91
91static void omap_unmask_irq(unsigned int irq) 92static void omap_unmask_irq(struct irq_data *d)
92{ 93{
93 int bank = IRQ_BANK(irq); 94 int bank = IRQ_BANK(d->irq);
94 u32 l; 95 u32 l;
95 96
96 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); 97 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
97 l &= ~(1 << IRQ_BIT(irq)); 98 l &= ~(1 << IRQ_BIT(d->irq));
98 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); 99 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
99} 100}
100 101
101static void omap_mask_ack_irq(unsigned int irq) 102static void omap_mask_ack_irq(struct irq_data *d)
102{ 103{
103 omap_mask_irq(irq); 104 omap_mask_irq(d);
104 omap_ack_irq(irq); 105 omap_ack_irq(d);
105} 106}
106 107
107static int omap_wake_irq(unsigned int irq, unsigned int enable) 108static int omap_wake_irq(struct irq_data *d, unsigned int enable)
108{ 109{
109 int bank = IRQ_BANK(irq); 110 int bank = IRQ_BANK(d->irq);
110 111
111 if (enable) 112 if (enable)
112 irq_banks[bank].wake_enable |= IRQ_BIT(irq); 113 irq_banks[bank].wake_enable |= IRQ_BIT(d->irq);
113 else 114 else
114 irq_banks[bank].wake_enable &= ~IRQ_BIT(irq); 115 irq_banks[bank].wake_enable &= ~IRQ_BIT(d->irq);
115 116
116 return 0; 117 return 0;
117} 118}
@@ -168,10 +169,10 @@ static struct omap_irq_bank omap1610_irq_banks[] = {
168 169
169static struct irq_chip omap_irq_chip = { 170static struct irq_chip omap_irq_chip = {
170 .name = "MPU", 171 .name = "MPU",
171 .ack = omap_mask_ack_irq, 172 .irq_ack = omap_mask_ack_irq,
172 .mask = omap_mask_irq, 173 .irq_mask = omap_mask_irq,
173 .unmask = omap_unmask_irq, 174 .irq_unmask = omap_unmask_irq,
174 .set_wake = omap_wake_irq, 175 .irq_set_wake = omap_wake_irq,
175}; 176};
176 177
177void __init omap_init_irq(void) 178void __init omap_init_irq(void)
@@ -180,22 +181,26 @@ void __init omap_init_irq(void)
180 181
181#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 182#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
182 if (cpu_is_omap7xx()) { 183 if (cpu_is_omap7xx()) {
184 omap_irq_flags = INT_7XX_IH2_IRQ;
183 irq_banks = omap7xx_irq_banks; 185 irq_banks = omap7xx_irq_banks;
184 irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks); 186 irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks);
185 } 187 }
186#endif 188#endif
187#ifdef CONFIG_ARCH_OMAP15XX 189#ifdef CONFIG_ARCH_OMAP15XX
188 if (cpu_is_omap1510()) { 190 if (cpu_is_omap1510()) {
191 omap_irq_flags = INT_1510_IH2_IRQ;
189 irq_banks = omap1510_irq_banks; 192 irq_banks = omap1510_irq_banks;
190 irq_bank_count = ARRAY_SIZE(omap1510_irq_banks); 193 irq_bank_count = ARRAY_SIZE(omap1510_irq_banks);
191 } 194 }
192 if (cpu_is_omap310()) { 195 if (cpu_is_omap310()) {
196 omap_irq_flags = INT_1510_IH2_IRQ;
193 irq_banks = omap310_irq_banks; 197 irq_banks = omap310_irq_banks;
194 irq_bank_count = ARRAY_SIZE(omap310_irq_banks); 198 irq_bank_count = ARRAY_SIZE(omap310_irq_banks);
195 } 199 }
196#endif 200#endif
197#if defined(CONFIG_ARCH_OMAP16XX) 201#if defined(CONFIG_ARCH_OMAP16XX)
198 if (cpu_is_omap16xx()) { 202 if (cpu_is_omap16xx()) {
203 omap_irq_flags = INT_1510_IH2_IRQ;
199 irq_banks = omap1610_irq_banks; 204 irq_banks = omap1610_irq_banks;
200 irq_bank_count = ARRAY_SIZE(omap1610_irq_banks); 205 irq_bank_count = ARRAY_SIZE(omap1610_irq_banks);
201 } 206 }
@@ -225,8 +230,8 @@ void __init omap_init_irq(void)
225 irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j); 230 irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j);
226 omap_irq_set_cfg(j, 0, 0, irq_trigger); 231 omap_irq_set_cfg(j, 0, 0, irq_trigger);
227 232
228 set_irq_chip(j, &omap_irq_chip); 233 irq_set_chip_and_handler(j, &omap_irq_chip,
229 set_irq_handler(j, handle_level_irq); 234 handle_level_irq);
230 set_irq_flags(j, IRQF_VALID); 235 set_irq_flags(j, IRQF_VALID);
231 } 236 }
232 } 237 }
@@ -234,9 +239,9 @@ void __init omap_init_irq(void)
234 /* Unmask level 2 handler */ 239 /* Unmask level 2 handler */
235 240
236 if (cpu_is_omap7xx()) 241 if (cpu_is_omap7xx())
237 omap_unmask_irq(INT_7XX_IH2_IRQ); 242 omap_unmask_irq(irq_get_irq_data(INT_7XX_IH2_IRQ));
238 else if (cpu_is_omap15xx()) 243 else if (cpu_is_omap15xx())
239 omap_unmask_irq(INT_1510_IH2_IRQ); 244 omap_unmask_irq(irq_get_irq_data(INT_1510_IH2_IRQ));
240 else if (cpu_is_omap16xx()) 245 else if (cpu_is_omap16xx())
241 omap_unmask_irq(INT_1610_IH2_IRQ); 246 omap_unmask_irq(irq_get_irq_data(INT_1610_IH2_IRQ));
242} 247}
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index 3be11af687bb..453809359ba6 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -37,7 +37,7 @@ int omap_lcd_dma_running(void)
37 * On OMAP1510, internal LCD controller will start the transfer 37 * On OMAP1510, internal LCD controller will start the transfer
38 * when it gets enabled, so assume DMA running if LCD enabled. 38 * when it gets enabled, so assume DMA running if LCD enabled.
39 */ 39 */
40 if (cpu_is_omap1510()) 40 if (cpu_is_omap15xx())
41 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN) 41 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
42 return 1; 42 return 1;
43 43
@@ -95,7 +95,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
95 95
96void omap_set_lcd_dma_b1_rotation(int rotate) 96void omap_set_lcd_dma_b1_rotation(int rotate)
97{ 97{
98 if (cpu_is_omap1510()) { 98 if (cpu_is_omap15xx()) {
99 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n"); 99 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
100 BUG(); 100 BUG();
101 return; 101 return;
@@ -106,7 +106,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
106 106
107void omap_set_lcd_dma_b1_mirror(int mirror) 107void omap_set_lcd_dma_b1_mirror(int mirror)
108{ 108{
109 if (cpu_is_omap1510()) { 109 if (cpu_is_omap15xx()) {
110 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n"); 110 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
111 BUG(); 111 BUG();
112 } 112 }
@@ -116,7 +116,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
116 116
117void omap_set_lcd_dma_b1_vxres(unsigned long vxres) 117void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
118{ 118{
119 if (cpu_is_omap1510()) { 119 if (cpu_is_omap15xx()) {
120 printk(KERN_ERR "DMA virtual resulotion is not supported " 120 printk(KERN_ERR "DMA virtual resulotion is not supported "
121 "in 1510 mode\n"); 121 "in 1510 mode\n");
122 BUG(); 122 BUG();
@@ -127,7 +127,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
127 127
128void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) 128void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
129{ 129{
130 if (cpu_is_omap1510()) { 130 if (cpu_is_omap15xx()) {
131 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n"); 131 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
132 BUG(); 132 BUG();
133 } 133 }
@@ -177,7 +177,7 @@ static void set_b1_regs(void)
177 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); 177 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
178 /* 1510 DMA requires the bottom address to be 2 more 178 /* 1510 DMA requires the bottom address to be 2 more
179 * than the actual last memory access location. */ 179 * than the actual last memory access location. */
180 if (cpu_is_omap1510() && 180 if (cpu_is_omap15xx() &&
181 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32) 181 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
182 bottom += 2; 182 bottom += 2;
183 ei = PIXSTEP(0, 0, 1, 0); 183 ei = PIXSTEP(0, 0, 1, 0);
@@ -241,7 +241,7 @@ static void set_b1_regs(void)
241 return; /* Suppress warning about uninitialized vars */ 241 return; /* Suppress warning about uninitialized vars */
242 } 242 }
243 243
244 if (cpu_is_omap1510()) { 244 if (cpu_is_omap15xx()) {
245 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U); 245 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
246 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L); 246 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
247 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U); 247 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
@@ -343,7 +343,7 @@ void omap_free_lcd_dma(void)
343 BUG(); 343 BUG();
344 return; 344 return;
345 } 345 }
346 if (!cpu_is_omap1510()) 346 if (!cpu_is_omap15xx())
347 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1, 347 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
348 OMAP1610_DMA_LCD_CCR); 348 OMAP1610_DMA_LCD_CCR);
349 lcd_dma.reserved = 0; 349 lcd_dma.reserved = 0;
@@ -360,7 +360,7 @@ void omap_enable_lcd_dma(void)
360 * connected. Otherwise the OMAP internal controller will 360 * connected. Otherwise the OMAP internal controller will
361 * start the transfer when it gets enabled. 361 * start the transfer when it gets enabled.
362 */ 362 */
363 if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) 363 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
364 return; 364 return;
365 365
366 w = omap_readw(OMAP1610_DMA_LCD_CTRL); 366 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
@@ -378,14 +378,14 @@ EXPORT_SYMBOL(omap_enable_lcd_dma);
378void omap_setup_lcd_dma(void) 378void omap_setup_lcd_dma(void)
379{ 379{
380 BUG_ON(lcd_dma.active); 380 BUG_ON(lcd_dma.active);
381 if (!cpu_is_omap1510()) { 381 if (!cpu_is_omap15xx()) {
382 /* Set some reasonable defaults */ 382 /* Set some reasonable defaults */
383 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR); 383 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
384 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP); 384 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
385 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL); 385 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
386 } 386 }
387 set_b1_regs(); 387 set_b1_regs();
388 if (!cpu_is_omap1510()) { 388 if (!cpu_is_omap15xx()) {
389 u16 w; 389 u16 w;
390 390
391 w = omap_readw(OMAP1610_DMA_LCD_CCR); 391 w = omap_readw(OMAP1610_DMA_LCD_CCR);
@@ -407,7 +407,7 @@ void omap_stop_lcd_dma(void)
407 u16 w; 407 u16 w;
408 408
409 lcd_dma.active = 0; 409 lcd_dma.active = 0;
410 if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) 410 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
411 return; 411 return;
412 412
413 w = omap_readw(OMAP1610_DMA_LCD_CCR); 413 w = omap_readw(OMAP1610_DMA_LCD_CCR);
@@ -424,6 +424,9 @@ static int __init omap_init_lcd_dma(void)
424{ 424{
425 int r; 425 int r;
426 426
427 if (!cpu_class_is_omap1())
428 return -ENODEV;
429
427 if (cpu_is_omap16xx()) { 430 if (cpu_is_omap16xx()) {
428 u16 w; 431 u16 w;
429 432
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index 277f356d4cd0..22eb11dde9e7 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -17,6 +17,9 @@
17static int __init 17static int __init
18omap_leds_init(void) 18omap_leds_init(void)
19{ 19{
20 if (!cpu_class_is_omap1())
21 return -ENODEV;
22
20 if (machine_is_omap_innovator()) 23 if (machine_is_omap_innovator())
21 leds_event = innovator_leds_event; 24 leds_event = innovator_leds_event;
22 25
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c
index 1a85a421007f..c0e1f48aa119 100644
--- a/arch/arm/mach-omap1/mailbox.c
+++ b/arch/arm/mach-omap1/mailbox.c
@@ -133,19 +133,18 @@ static struct omap_mbox1_priv omap1_mbox_dsp_priv = {
133 }, 133 },
134}; 134};
135 135
136struct omap_mbox mbox_dsp_info = { 136static struct omap_mbox mbox_dsp_info = {
137 .name = "dsp", 137 .name = "dsp",
138 .ops = &omap1_mbox_ops, 138 .ops = &omap1_mbox_ops,
139 .priv = &omap1_mbox_dsp_priv, 139 .priv = &omap1_mbox_dsp_priv,
140}; 140};
141 141
142struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL }; 142static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL };
143 143
144static int __devinit omap1_mbox_probe(struct platform_device *pdev) 144static int __devinit omap1_mbox_probe(struct platform_device *pdev)
145{ 145{
146 struct resource *mem; 146 struct resource *mem;
147 int ret; 147 int ret;
148 int i;
149 struct omap_mbox **list; 148 struct omap_mbox **list;
150 149
151 list = omap1_mboxes; 150 list = omap1_mboxes;
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index b3a796a6da03..d9af9811dedd 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -10,6 +10,7 @@
10 * 10 *
11 * Multichannel mode not supported. 11 * Multichannel mode not supported.
12 */ 12 */
13#include <linux/ioport.h>
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/init.h> 15#include <linux/init.h>
15#include <linux/clk.h> 16#include <linux/clk.h>
@@ -78,114 +79,307 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
78}; 79};
79 80
80#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 81#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
82struct resource omap7xx_mcbsp_res[][6] = {
83 {
84 {
85 .start = OMAP7XX_MCBSP1_BASE,
86 .end = OMAP7XX_MCBSP1_BASE + SZ_256,
87 .flags = IORESOURCE_MEM,
88 },
89 {
90 .name = "rx",
91 .start = INT_7XX_McBSP1RX,
92 .flags = IORESOURCE_IRQ,
93 },
94 {
95 .name = "tx",
96 .start = INT_7XX_McBSP1TX,
97 .flags = IORESOURCE_IRQ,
98 },
99 {
100 .name = "rx",
101 .start = OMAP_DMA_MCBSP1_RX,
102 .flags = IORESOURCE_DMA,
103 },
104 {
105 .name = "tx",
106 .start = OMAP_DMA_MCBSP1_TX,
107 .flags = IORESOURCE_DMA,
108 },
109 },
110 {
111 {
112 .start = OMAP7XX_MCBSP2_BASE,
113 .end = OMAP7XX_MCBSP2_BASE + SZ_256,
114 .flags = IORESOURCE_MEM,
115 },
116 {
117 .name = "rx",
118 .start = INT_7XX_McBSP2RX,
119 .flags = IORESOURCE_IRQ,
120 },
121 {
122 .name = "tx",
123 .start = INT_7XX_McBSP2TX,
124 .flags = IORESOURCE_IRQ,
125 },
126 {
127 .name = "rx",
128 .start = OMAP_DMA_MCBSP3_RX,
129 .flags = IORESOURCE_DMA,
130 },
131 {
132 .name = "tx",
133 .start = OMAP_DMA_MCBSP3_TX,
134 .flags = IORESOURCE_DMA,
135 },
136 },
137};
138
139#define omap7xx_mcbsp_res_0 omap7xx_mcbsp_res[0]
140
81static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = { 141static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
82 { 142 {
83 .phys_base = OMAP7XX_MCBSP1_BASE,
84 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
85 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
86 .rx_irq = INT_7XX_McBSP1RX,
87 .tx_irq = INT_7XX_McBSP1TX,
88 .ops = &omap1_mcbsp_ops, 143 .ops = &omap1_mcbsp_ops,
89 }, 144 },
90 { 145 {
91 .phys_base = OMAP7XX_MCBSP2_BASE,
92 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
93 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
94 .rx_irq = INT_7XX_McBSP2RX,
95 .tx_irq = INT_7XX_McBSP2TX,
96 .ops = &omap1_mcbsp_ops, 146 .ops = &omap1_mcbsp_ops,
97 }, 147 },
98}; 148};
99#define OMAP7XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap7xx_mcbsp_pdata) 149#define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1])
100#define OMAP7XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) 150#define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res)
101#else 151#else
152#define omap7xx_mcbsp_res_0 NULL
102#define omap7xx_mcbsp_pdata NULL 153#define omap7xx_mcbsp_pdata NULL
103#define OMAP7XX_MCBSP_PDATA_SZ 0 154#define OMAP7XX_MCBSP_RES_SZ 0
104#define OMAP7XX_MCBSP_REG_NUM 0 155#define OMAP7XX_MCBSP_COUNT 0
105#endif 156#endif
106 157
107#ifdef CONFIG_ARCH_OMAP15XX 158#ifdef CONFIG_ARCH_OMAP15XX
159struct resource omap15xx_mcbsp_res[][6] = {
160 {
161 {
162 .start = OMAP1510_MCBSP1_BASE,
163 .end = OMAP1510_MCBSP1_BASE + SZ_256,
164 .flags = IORESOURCE_MEM,
165 },
166 {
167 .name = "rx",
168 .start = INT_McBSP1RX,
169 .flags = IORESOURCE_IRQ,
170 },
171 {
172 .name = "tx",
173 .start = INT_McBSP1TX,
174 .flags = IORESOURCE_IRQ,
175 },
176 {
177 .name = "rx",
178 .start = OMAP_DMA_MCBSP1_RX,
179 .flags = IORESOURCE_DMA,
180 },
181 {
182 .name = "tx",
183 .start = OMAP_DMA_MCBSP1_TX,
184 .flags = IORESOURCE_DMA,
185 },
186 },
187 {
188 {
189 .start = OMAP1510_MCBSP2_BASE,
190 .end = OMAP1510_MCBSP2_BASE + SZ_256,
191 .flags = IORESOURCE_MEM,
192 },
193 {
194 .name = "rx",
195 .start = INT_1510_SPI_RX,
196 .flags = IORESOURCE_IRQ,
197 },
198 {
199 .name = "tx",
200 .start = INT_1510_SPI_TX,
201 .flags = IORESOURCE_IRQ,
202 },
203 {
204 .name = "rx",
205 .start = OMAP_DMA_MCBSP2_RX,
206 .flags = IORESOURCE_DMA,
207 },
208 {
209 .name = "tx",
210 .start = OMAP_DMA_MCBSP2_TX,
211 .flags = IORESOURCE_DMA,
212 },
213 },
214 {
215 {
216 .start = OMAP1510_MCBSP3_BASE,
217 .end = OMAP1510_MCBSP3_BASE + SZ_256,
218 .flags = IORESOURCE_MEM,
219 },
220 {
221 .name = "rx",
222 .start = INT_McBSP3RX,
223 .flags = IORESOURCE_IRQ,
224 },
225 {
226 .name = "tx",
227 .start = INT_McBSP3TX,
228 .flags = IORESOURCE_IRQ,
229 },
230 {
231 .name = "rx",
232 .start = OMAP_DMA_MCBSP3_RX,
233 .flags = IORESOURCE_DMA,
234 },
235 {
236 .name = "tx",
237 .start = OMAP_DMA_MCBSP3_TX,
238 .flags = IORESOURCE_DMA,
239 },
240 },
241};
242
243#define omap15xx_mcbsp_res_0 omap15xx_mcbsp_res[0]
244
108static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { 245static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
109 { 246 {
110 .phys_base = OMAP1510_MCBSP1_BASE,
111 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
112 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
113 .rx_irq = INT_McBSP1RX,
114 .tx_irq = INT_McBSP1TX,
115 .ops = &omap1_mcbsp_ops, 247 .ops = &omap1_mcbsp_ops,
116 }, 248 },
117 { 249 {
118 .phys_base = OMAP1510_MCBSP2_BASE,
119 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
120 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
121 .rx_irq = INT_1510_SPI_RX,
122 .tx_irq = INT_1510_SPI_TX,
123 .ops = &omap1_mcbsp_ops, 250 .ops = &omap1_mcbsp_ops,
124 }, 251 },
125 { 252 {
126 .phys_base = OMAP1510_MCBSP3_BASE,
127 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
128 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
129 .rx_irq = INT_McBSP3RX,
130 .tx_irq = INT_McBSP3TX,
131 .ops = &omap1_mcbsp_ops, 253 .ops = &omap1_mcbsp_ops,
132 }, 254 },
133}; 255};
134#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) 256#define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1])
135#define OMAP15XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) 257#define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res)
136#else 258#else
259#define omap15xx_mcbsp_res_0 NULL
137#define omap15xx_mcbsp_pdata NULL 260#define omap15xx_mcbsp_pdata NULL
138#define OMAP15XX_MCBSP_PDATA_SZ 0 261#define OMAP15XX_MCBSP_RES_SZ 0
139#define OMAP15XX_MCBSP_REG_NUM 0 262#define OMAP15XX_MCBSP_COUNT 0
140#endif 263#endif
141 264
142#ifdef CONFIG_ARCH_OMAP16XX 265#ifdef CONFIG_ARCH_OMAP16XX
266struct resource omap16xx_mcbsp_res[][6] = {
267 {
268 {
269 .start = OMAP1610_MCBSP1_BASE,
270 .end = OMAP1610_MCBSP1_BASE + SZ_256,
271 .flags = IORESOURCE_MEM,
272 },
273 {
274 .name = "rx",
275 .start = INT_McBSP1RX,
276 .flags = IORESOURCE_IRQ,
277 },
278 {
279 .name = "tx",
280 .start = INT_McBSP1TX,
281 .flags = IORESOURCE_IRQ,
282 },
283 {
284 .name = "rx",
285 .start = OMAP_DMA_MCBSP1_RX,
286 .flags = IORESOURCE_DMA,
287 },
288 {
289 .name = "tx",
290 .start = OMAP_DMA_MCBSP1_TX,
291 .flags = IORESOURCE_DMA,
292 },
293 },
294 {
295 {
296 .start = OMAP1610_MCBSP2_BASE,
297 .end = OMAP1610_MCBSP2_BASE + SZ_256,
298 .flags = IORESOURCE_MEM,
299 },
300 {
301 .name = "rx",
302 .start = INT_1610_McBSP2_RX,
303 .flags = IORESOURCE_IRQ,
304 },
305 {
306 .name = "tx",
307 .start = INT_1610_McBSP2_TX,
308 .flags = IORESOURCE_IRQ,
309 },
310 {
311 .name = "rx",
312 .start = OMAP_DMA_MCBSP2_RX,
313 .flags = IORESOURCE_DMA,
314 },
315 {
316 .name = "tx",
317 .start = OMAP_DMA_MCBSP2_TX,
318 .flags = IORESOURCE_DMA,
319 },
320 },
321 {
322 {
323 .start = OMAP1610_MCBSP3_BASE,
324 .end = OMAP1610_MCBSP3_BASE + SZ_256,
325 .flags = IORESOURCE_MEM,
326 },
327 {
328 .name = "rx",
329 .start = INT_McBSP3RX,
330 .flags = IORESOURCE_IRQ,
331 },
332 {
333 .name = "tx",
334 .start = INT_McBSP3TX,
335 .flags = IORESOURCE_IRQ,
336 },
337 {
338 .name = "rx",
339 .start = OMAP_DMA_MCBSP3_RX,
340 .flags = IORESOURCE_DMA,
341 },
342 {
343 .name = "tx",
344 .start = OMAP_DMA_MCBSP3_TX,
345 .flags = IORESOURCE_DMA,
346 },
347 },
348};
349
350#define omap16xx_mcbsp_res_0 omap16xx_mcbsp_res[0]
351
143static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { 352static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
144 { 353 {
145 .phys_base = OMAP1610_MCBSP1_BASE,
146 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
147 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
148 .rx_irq = INT_McBSP1RX,
149 .tx_irq = INT_McBSP1TX,
150 .ops = &omap1_mcbsp_ops, 354 .ops = &omap1_mcbsp_ops,
151 }, 355 },
152 { 356 {
153 .phys_base = OMAP1610_MCBSP2_BASE,
154 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
155 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
156 .rx_irq = INT_1610_McBSP2_RX,
157 .tx_irq = INT_1610_McBSP2_TX,
158 .ops = &omap1_mcbsp_ops, 357 .ops = &omap1_mcbsp_ops,
159 }, 358 },
160 { 359 {
161 .phys_base = OMAP1610_MCBSP3_BASE,
162 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
163 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
164 .rx_irq = INT_McBSP3RX,
165 .tx_irq = INT_McBSP3TX,
166 .ops = &omap1_mcbsp_ops, 360 .ops = &omap1_mcbsp_ops,
167 }, 361 },
168}; 362};
169#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) 363#define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1])
170#define OMAP16XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) 364#define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res)
171#else 365#else
366#define omap16xx_mcbsp_res_0 NULL
172#define omap16xx_mcbsp_pdata NULL 367#define omap16xx_mcbsp_pdata NULL
173#define OMAP16XX_MCBSP_PDATA_SZ 0 368#define OMAP16XX_MCBSP_RES_SZ 0
174#define OMAP16XX_MCBSP_REG_NUM 0 369#define OMAP16XX_MCBSP_COUNT 0
175#endif 370#endif
176 371
177int __init omap1_mcbsp_init(void) 372static int __init omap1_mcbsp_init(void)
178{ 373{
179 if (cpu_is_omap7xx()) { 374 if (!cpu_class_is_omap1())
180 omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ; 375 return -ENODEV;
181 omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16); 376
182 } else if (cpu_is_omap15xx()) { 377 if (cpu_is_omap7xx())
183 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; 378 omap_mcbsp_count = OMAP7XX_MCBSP_COUNT;
184 omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16); 379 else if (cpu_is_omap15xx())
185 } else if (cpu_is_omap16xx()) { 380 omap_mcbsp_count = OMAP15XX_MCBSP_COUNT;
186 omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ; 381 else if (cpu_is_omap16xx())
187 omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16); 382 omap_mcbsp_count = OMAP16XX_MCBSP_COUNT;
188 }
189 383
190 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), 384 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
191 GFP_KERNEL); 385 GFP_KERNEL);
@@ -193,16 +387,22 @@ int __init omap1_mcbsp_init(void)
193 return -ENOMEM; 387 return -ENOMEM;
194 388
195 if (cpu_is_omap7xx()) 389 if (cpu_is_omap7xx())
196 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata, 390 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0,
197 OMAP7XX_MCBSP_PDATA_SZ); 391 OMAP7XX_MCBSP_RES_SZ,
392 omap7xx_mcbsp_pdata,
393 OMAP7XX_MCBSP_COUNT);
198 394
199 if (cpu_is_omap15xx()) 395 if (cpu_is_omap15xx())
200 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata, 396 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res_0,
201 OMAP15XX_MCBSP_PDATA_SZ); 397 OMAP15XX_MCBSP_RES_SZ,
398 omap15xx_mcbsp_pdata,
399 OMAP15XX_MCBSP_COUNT);
202 400
203 if (cpu_is_omap16xx()) 401 if (cpu_is_omap16xx())
204 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata, 402 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res_0,
205 OMAP16XX_MCBSP_PDATA_SZ); 403 OMAP16XX_MCBSP_RES_SZ,
404 omap16xx_mcbsp_pdata,
405 OMAP16XX_MCBSP_COUNT);
206 406
207 return omap_mcbsp_init(); 407 return omap_mcbsp_init();
208} 408}
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 7835add00344..5fdef7a34828 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -343,7 +343,7 @@ MUX_CFG("Y14_1610_CCP_DATAM", 9, 21, 6, 2, 3, 1, 2, 0, 0)
343#define OMAP1XXX_PINS_SZ 0 343#define OMAP1XXX_PINS_SZ 0
344#endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */ 344#endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */
345 345
346int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) 346static int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
347{ 347{
348 static DEFINE_SPINLOCK(mux_spin_lock); 348 static DEFINE_SPINLOCK(mux_spin_lock);
349 unsigned long flags; 349 unsigned long flags;
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index b1d3f9fade23..98ba9784aa15 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -647,7 +647,7 @@ static struct irqaction omap_wakeup_irq = {
647 647
648 648
649 649
650static struct platform_suspend_ops omap_pm_ops ={ 650static const struct platform_suspend_ops omap_pm_ops = {
651 .prepare = omap_pm_prepare, 651 .prepare = omap_pm_prepare,
652 .enter = omap_pm_enter, 652 .enter = omap_pm_enter,
653 .finish = omap_pm_finish, 653 .finish = omap_pm_finish,
@@ -661,6 +661,9 @@ static int __init omap_pm_init(void)
661 int error; 661 int error;
662#endif 662#endif
663 663
664 if (!cpu_class_is_omap1())
665 return -ENODEV;
666
664 printk("Power Management for TI OMAP.\n"); 667 printk("Power Management for TI OMAP.\n");
665 668
666 /* 669 /*
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h
index 56a647986ae9..cd926dcb5e7f 100644
--- a/arch/arm/mach-omap1/pm.h
+++ b/arch/arm/mach-omap1/pm.h
@@ -123,9 +123,9 @@ extern void allow_idle_sleep(void);
123extern void omap1_pm_idle(void); 123extern void omap1_pm_idle(void);
124extern void omap1_pm_suspend(void); 124extern void omap1_pm_suspend(void);
125 125
126extern void omap7xx_cpu_suspend(unsigned short, unsigned short); 126extern void omap7xx_cpu_suspend(unsigned long, unsigned long);
127extern void omap1510_cpu_suspend(unsigned short, unsigned short); 127extern void omap1510_cpu_suspend(unsigned long, unsigned long);
128extern void omap1610_cpu_suspend(unsigned short, unsigned short); 128extern void omap1610_cpu_suspend(unsigned long, unsigned long);
129extern void omap7xx_idle_loop_suspend(void); 129extern void omap7xx_idle_loop_suspend(void);
130extern void omap1510_idle_loop_suspend(void); 130extern void omap1510_idle_loop_suspend(void);
131extern void omap1610_idle_loop_suspend(void); 131extern void omap1610_idle_loop_suspend(void);
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
new file mode 100644
index 000000000000..334fb8871bc3
--- /dev/null
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -0,0 +1,79 @@
1/*
2 * Runtime PM support code for OMAP1
3 *
4 * Author: Kevin Hilman, Deep Root Systems, LLC
5 *
6 * Copyright (C) 2010 Texas Instruments, Inc.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/io.h>
15#include <linux/pm_runtime.h>
16#include <linux/platform_device.h>
17#include <linux/mutex.h>
18#include <linux/clk.h>
19#include <linux/err.h>
20
21#include <plat/omap_device.h>
22#include <plat/omap-pm.h>
23
24#ifdef CONFIG_PM_RUNTIME
25static int omap1_pm_runtime_suspend(struct device *dev)
26{
27 int ret;
28
29 dev_dbg(dev, "%s\n", __func__);
30
31 ret = pm_generic_runtime_suspend(dev);
32 if (ret)
33 return ret;
34
35 ret = pm_runtime_clk_suspend(dev);
36 if (ret) {
37 pm_generic_runtime_resume(dev);
38 return ret;
39 }
40
41 return 0;
42}
43
44static int omap1_pm_runtime_resume(struct device *dev)
45{
46 dev_dbg(dev, "%s\n", __func__);
47
48 pm_runtime_clk_resume(dev);
49 return pm_generic_runtime_resume(dev);
50}
51
52static struct dev_power_domain default_power_domain = {
53 .ops = {
54 .runtime_suspend = omap1_pm_runtime_suspend,
55 .runtime_resume = omap1_pm_runtime_resume,
56 USE_PLATFORM_PM_SLEEP_OPS
57 },
58};
59#define OMAP1_PWR_DOMAIN (&default_power_domain)
60#else
61#define OMAP1_PWR_DOMAIN NULL
62#endif /* CONFIG_PM_RUNTIME */
63
64static struct pm_clk_notifier_block platform_bus_notifier = {
65 .pwr_domain = OMAP1_PWR_DOMAIN,
66 .con_ids = { "ick", "fck", NULL, },
67};
68
69static int __init omap1_pm_runtime_init(void)
70{
71 if (!cpu_class_is_omap1())
72 return -ENODEV;
73
74 pm_runtime_clk_add_notifier(&platform_bus_type, &platform_bus_notifier);
75
76 return 0;
77}
78core_initcall(omap1_pm_runtime_init);
79
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
new file mode 100644
index 000000000000..ad951ee69205
--- /dev/null
+++ b/arch/arm/mach-omap1/reset.c
@@ -0,0 +1,25 @@
1/*
2 * OMAP1 reset support
3 */
4#include <linux/kernel.h>
5#include <linux/io.h>
6
7#include <mach/hardware.h>
8#include <mach/system.h>
9#include <plat/prcm.h>
10
11void omap1_arch_reset(char mode, const char *cmd)
12{
13 /*
14 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
15 * "Global Software Reset Affects Traffic Controller Frequency".
16 */
17 if (cpu_is_omap5912()) {
18 omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL);
19 omap_writew(0x8, ARM_RSTCT1);
20 }
21
22 omap_writew(1, ARM_RSTCT1);
23}
24
25void (*arch_reset)(char, const char *) = omap1_arch_reset;
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index b78d0749f13d..550ca9d9991d 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -27,6 +27,8 @@
27#include <mach/gpio.h> 27#include <mach/gpio.h>
28#include <plat/fpga.h> 28#include <plat/fpga.h>
29 29
30#include "pm.h"
31
30static struct clk * uart1_ck; 32static struct clk * uart1_ck;
31static struct clk * uart2_ck; 33static struct clk * uart2_ck;
32static struct clk * uart3_ck; 34static struct clk * uart3_ck;
@@ -52,9 +54,11 @@ static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
52 */ 54 */
53static void __init omap_serial_reset(struct plat_serial8250_port *p) 55static void __init omap_serial_reset(struct plat_serial8250_port *p)
54{ 56{
55 omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */ 57 omap_serial_outp(p, UART_OMAP_MDR1,
58 UART_OMAP_MDR1_DISABLE); /* disable UART */
56 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ 59 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
57 omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ 60 omap_serial_outp(p, UART_OMAP_MDR1,
61 UART_OMAP_MDR1_16X_MODE); /* enable UART */
58 62
59 if (!cpu_is_omap15xx()) { 63 if (!cpu_is_omap15xx()) {
60 omap_serial_outp(p, UART_OMAP_SYSC, 0x01); 64 omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
@@ -254,6 +258,9 @@ late_initcall(omap_serial_wakeup_init);
254 258
255static int __init omap_init(void) 259static int __init omap_init(void)
256{ 260{
261 if (!cpu_class_is_omap1())
262 return -ENODEV;
263
257 return platform_device_register(&serial_device); 264 return platform_device_register(&serial_device);
258} 265}
259arch_initcall(omap_init); 266arch_initcall(omap_init);
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index ef771ce8b030..c875bdc902c5 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -58,6 +58,7 @@
58 */ 58 */
59 59
60#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 60#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
61 .align 3
61ENTRY(omap7xx_cpu_suspend) 62ENTRY(omap7xx_cpu_suspend)
62 63
63 @ save registers on stack 64 @ save registers on stack
@@ -137,6 +138,7 @@ ENTRY(omap7xx_cpu_suspend_sz)
137#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */ 138#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */
138 139
139#ifdef CONFIG_ARCH_OMAP15XX 140#ifdef CONFIG_ARCH_OMAP15XX
141 .align 3
140ENTRY(omap1510_cpu_suspend) 142ENTRY(omap1510_cpu_suspend)
141 143
142 @ save registers on stack 144 @ save registers on stack
@@ -211,6 +213,7 @@ ENTRY(omap1510_cpu_suspend_sz)
211#endif /* CONFIG_ARCH_OMAP15XX */ 213#endif /* CONFIG_ARCH_OMAP15XX */
212 214
213#if defined(CONFIG_ARCH_OMAP16XX) 215#if defined(CONFIG_ARCH_OMAP16XX)
216 .align 3
214ENTRY(omap1610_cpu_suspend) 217ENTRY(omap1610_cpu_suspend)
215 218
216 @ save registers on stack 219 @ save registers on stack
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
index 7724e520d07c..692587d07ea5 100644
--- a/arch/arm/mach-omap1/sram.S
+++ b/arch/arm/mach-omap1/sram.S
@@ -18,6 +18,7 @@
18/* 18/*
19 * Reprograms ULPD and CKCTL. 19 * Reprograms ULPD and CKCTL.
20 */ 20 */
21 .align 3
21ENTRY(omap1_sram_reprogram_clock) 22ENTRY(omap1_sram_reprogram_clock)
22 stmfd sp!, {r0 - r12, lr} @ save registers on stack 23 stmfd sp!, {r0 - r12, lr} @ save registers on stack
23 24
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 1be6a214d88d..03e1e1062ad4 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -49,9 +49,14 @@
49#include <mach/hardware.h> 49#include <mach/hardware.h>
50#include <asm/leds.h> 50#include <asm/leds.h>
51#include <asm/irq.h> 51#include <asm/irq.h>
52#include <asm/sched_clock.h>
53
52#include <asm/mach/irq.h> 54#include <asm/mach/irq.h>
53#include <asm/mach/time.h> 55#include <asm/mach/time.h>
54 56
57#include <plat/common.h>
58
59#ifdef CONFIG_OMAP_MPU_TIMER
55 60
56#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE 61#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
57#define OMAP_MPU_TIMER_OFFSET 0x100 62#define OMAP_MPU_TIMER_OFFSET 0x100
@@ -63,49 +68,50 @@ typedef struct {
63} omap_mpu_timer_regs_t; 68} omap_mpu_timer_regs_t;
64 69
65#define omap_mpu_timer_base(n) \ 70#define omap_mpu_timer_base(n) \
66((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ 71((omap_mpu_timer_regs_t __iomem *)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
67 (n)*OMAP_MPU_TIMER_OFFSET)) 72 (n)*OMAP_MPU_TIMER_OFFSET))
68 73
69static inline unsigned long omap_mpu_timer_read(int nr) 74static inline unsigned long notrace omap_mpu_timer_read(int nr)
70{ 75{
71 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); 76 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
72 return timer->read_tim; 77 return readl(&timer->read_tim);
73} 78}
74 79
75static inline void omap_mpu_set_autoreset(int nr) 80static inline void omap_mpu_set_autoreset(int nr)
76{ 81{
77 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); 82 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
78 83
79 timer->cntl = timer->cntl | MPU_TIMER_AR; 84 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl);
80} 85}
81 86
82static inline void omap_mpu_remove_autoreset(int nr) 87static inline void omap_mpu_remove_autoreset(int nr)
83{ 88{
84 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); 89 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
85 90
86 timer->cntl = timer->cntl & ~MPU_TIMER_AR; 91 writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl);
87} 92}
88 93
89static inline void omap_mpu_timer_start(int nr, unsigned long load_val, 94static inline void omap_mpu_timer_start(int nr, unsigned long load_val,
90 int autoreset) 95 int autoreset)
91{ 96{
92 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); 97 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
93 unsigned int timerflags = (MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_ST); 98 unsigned int timerflags = MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_ST;
94 99
95 if (autoreset) timerflags |= MPU_TIMER_AR; 100 if (autoreset)
101 timerflags |= MPU_TIMER_AR;
96 102
97 timer->cntl = MPU_TIMER_CLOCK_ENABLE; 103 writel(MPU_TIMER_CLOCK_ENABLE, &timer->cntl);
98 udelay(1); 104 udelay(1);
99 timer->load_tim = load_val; 105 writel(load_val, &timer->load_tim);
100 udelay(1); 106 udelay(1);
101 timer->cntl = timerflags; 107 writel(timerflags, &timer->cntl);
102} 108}
103 109
104static inline void omap_mpu_timer_stop(int nr) 110static inline void omap_mpu_timer_stop(int nr)
105{ 111{
106 volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr); 112 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
107 113
108 timer->cntl &= ~MPU_TIMER_ST; 114 writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl);
109} 115}
110 116
111/* 117/*
@@ -184,55 +190,47 @@ static __init void omap_init_mpu_timer(unsigned long rate)
184 * --------------------------------------------------------------------------- 190 * ---------------------------------------------------------------------------
185 */ 191 */
186 192
187static unsigned long omap_mpu_timer2_overflows; 193static DEFINE_CLOCK_DATA(cd);
188 194
189static irqreturn_t omap_mpu_timer2_interrupt(int irq, void *dev_id) 195static inline unsigned long long notrace _omap_mpu_sched_clock(void)
190{ 196{
191 omap_mpu_timer2_overflows++; 197 u32 cyc = ~omap_mpu_timer_read(1);
192 return IRQ_HANDLED; 198 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
193} 199}
194 200
195static struct irqaction omap_mpu_timer2_irq = { 201#ifndef CONFIG_OMAP_32K_TIMER
196 .name = "mpu_timer2", 202unsigned long long notrace sched_clock(void)
197 .flags = IRQF_DISABLED, 203{
198 .handler = omap_mpu_timer2_interrupt, 204 return _omap_mpu_sched_clock();
199}; 205}
200 206#else
201static cycle_t mpu_read(struct clocksource *cs) 207static unsigned long long notrace omap_mpu_sched_clock(void)
202{ 208{
203 return ~omap_mpu_timer_read(1); 209 return _omap_mpu_sched_clock();
204} 210}
211#endif
205 212
206static struct clocksource clocksource_mpu = { 213static void notrace mpu_update_sched_clock(void)
207 .name = "mpu_timer2", 214{
208 .rating = 300, 215 u32 cyc = ~omap_mpu_timer_read(1);
209 .read = mpu_read, 216 update_sched_clock(&cd, cyc, (u32)~0);
210 .mask = CLOCKSOURCE_MASK(32), 217}
211 .shift = 24,
212 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
213};
214 218
215static void __init omap_init_clocksource(unsigned long rate) 219static void __init omap_init_clocksource(unsigned long rate)
216{ 220{
221 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(1);
217 static char err[] __initdata = KERN_ERR 222 static char err[] __initdata = KERN_ERR
218 "%s: can't register clocksource!\n"; 223 "%s: can't register clocksource!\n";
219 224
220 clocksource_mpu.mult
221 = clocksource_khz2mult(rate/1000, clocksource_mpu.shift);
222
223 setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
224 omap_mpu_timer_start(1, ~0, 1); 225 omap_mpu_timer_start(1, ~0, 1);
226 init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
225 227
226 if (clocksource_register(&clocksource_mpu)) 228 if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
227 printk(err, clocksource_mpu.name); 229 300, 32, clocksource_mmio_readl_down))
230 printk(err, "mpu_timer2");
228} 231}
229 232
230/* 233static void __init omap_mpu_timer_init(void)
231 * ---------------------------------------------------------------------------
232 * Timer initialization
233 * ---------------------------------------------------------------------------
234 */
235static void __init omap_timer_init(void)
236{ 234{
237 struct clk *ck_ref = clk_get(NULL, "ck_ref"); 235 struct clk *ck_ref = clk_get(NULL, "ck_ref");
238 unsigned long rate; 236 unsigned long rate;
@@ -249,6 +247,66 @@ static void __init omap_timer_init(void)
249 omap_init_clocksource(rate); 247 omap_init_clocksource(rate);
250} 248}
251 249
250#else
251static inline void omap_mpu_timer_init(void)
252{
253 pr_err("Bogus timer, should not happen\n");
254}
255#endif /* CONFIG_OMAP_MPU_TIMER */
256
257#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
258static unsigned long long (*preferred_sched_clock)(void);
259
260unsigned long long notrace sched_clock(void)
261{
262 if (!preferred_sched_clock)
263 return 0;
264
265 return preferred_sched_clock();
266}
267
268static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
269{
270 if (use_32k_sched_clock)
271 preferred_sched_clock = omap_32k_sched_clock;
272 else
273 preferred_sched_clock = omap_mpu_sched_clock;
274}
275#else
276static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
277{
278}
279#endif
280
281static inline int omap_32k_timer_usable(void)
282{
283 int res = false;
284
285 if (cpu_is_omap730() || cpu_is_omap15xx())
286 return res;
287
288#ifdef CONFIG_OMAP_32K_TIMER
289 res = omap_32k_timer_init();
290#endif
291
292 return res;
293}
294
295/*
296 * ---------------------------------------------------------------------------
297 * Timer initialization
298 * ---------------------------------------------------------------------------
299 */
300static void __init omap_timer_init(void)
301{
302 if (omap_32k_timer_usable()) {
303 preferred_sched_clock_init(1);
304 } else {
305 omap_mpu_timer_init();
306 preferred_sched_clock_init(0);
307 }
308}
309
252struct sys_timer omap_timer = { 310struct sys_timer omap_timer = {
253 .init = omap_timer_init, 311 .init = omap_timer_init,
254}; 312};
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 20cfbcc6c60c..13d7b8f145bd 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,10 +52,9 @@
52#include <asm/irq.h> 52#include <asm/irq.h>
53#include <asm/mach/irq.h> 53#include <asm/mach/irq.h>
54#include <asm/mach/time.h> 54#include <asm/mach/time.h>
55#include <plat/common.h>
55#include <plat/dmtimer.h> 56#include <plat/dmtimer.h>
56 57
57struct sys_timer omap_timer;
58
59/* 58/*
60 * --------------------------------------------------------------------------- 59 * ---------------------------------------------------------------------------
61 * 32KHz OS timer 60 * 32KHz OS timer
@@ -181,14 +180,14 @@ static __init void omap_init_32k_timer(void)
181 * Timer initialization 180 * Timer initialization
182 * --------------------------------------------------------------------------- 181 * ---------------------------------------------------------------------------
183 */ 182 */
184static void __init omap_timer_init(void) 183bool __init omap_32k_timer_init(void)
185{ 184{
185 omap_init_clocksource_32k();
186
186#ifdef CONFIG_OMAP_DM_TIMER 187#ifdef CONFIG_OMAP_DM_TIMER
187 omap_dm_timer_init(); 188 omap_dm_timer_init();
188#endif 189#endif
189 omap_init_32k_timer(); 190 omap_init_32k_timer();
190}
191 191
192struct sys_timer omap_timer = { 192 return true;
193 .init = omap_timer_init, 193}
194};