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authorAlistair Buxton <a.j.buxton@gmail.com>2009-09-22 01:41:09 -0400
committerAlistair Buxton <a.j.buxton@gmail.com>2009-10-07 18:14:03 -0400
commit4b9100dde2820296003940ffd81e006c33c9bf5d (patch)
tree34ee6b86c8741ed976ee2ece2fd89705c34a743b /arch/arm/mach-omap1
parent559663b980c8293b3624b4d91d08efc71f6fae82 (diff)
OMAP7XX: PM: Add omap850 support
This patch is part of a series which unifies all duplicated code between omap730 and omap850. All cpu checks are converted to cpu_is_omap7xx() and CONFIG_ARCH_OMAP850 is added to all CONFIG_ARCH_OMAP730 checks. This file had no omap850 specific code. Original omap850 support in Linwizard was done by cloning the omap730 code. That work was done by Zebediah C. McClure. Signed-off-by: Alistair Buxton <a.j.buxton@gmail.com> Reviewed-by: Zebediah C. McClure <zmc@lurian.net>
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r--arch/arm/mach-omap1/pm.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 5218943c91c0..12f246e3cdca 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -183,7 +183,7 @@ static void omap_pm_wakeup_setup(void)
183 * drivers must still separately call omap_set_gpio_wakeup() to 183 * drivers must still separately call omap_set_gpio_wakeup() to
184 * wake up to a GPIO interrupt. 184 * wake up to a GPIO interrupt.
185 */ 185 */
186 if (cpu_is_omap730()) 186 if (cpu_is_omap7xx())
187 level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) | 187 level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) |
188 OMAP_IRQ_BIT(INT_730_IH2_IRQ); 188 OMAP_IRQ_BIT(INT_730_IH2_IRQ);
189 else if (cpu_is_omap15xx()) 189 else if (cpu_is_omap15xx())
@@ -195,7 +195,7 @@ static void omap_pm_wakeup_setup(void)
195 195
196 omap_writel(~level1_wake, OMAP_IH1_MIR); 196 omap_writel(~level1_wake, OMAP_IH1_MIR);
197 197
198 if (cpu_is_omap730()) { 198 if (cpu_is_omap7xx()) {
199 omap_writel(~level2_wake, OMAP_IH2_0_MIR); 199 omap_writel(~level2_wake, OMAP_IH2_0_MIR);
200 omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) | 200 omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) |
201 OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)), 201 OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)),
@@ -253,7 +253,7 @@ void omap1_pm_suspend(void)
253 * Save interrupt, MPUI, ARM and UPLD control registers. 253 * Save interrupt, MPUI, ARM and UPLD control registers.
254 */ 254 */
255 255
256 if (cpu_is_omap730()) { 256 if (cpu_is_omap7xx()) {
257 MPUI730_SAVE(OMAP_IH1_MIR); 257 MPUI730_SAVE(OMAP_IH1_MIR);
258 MPUI730_SAVE(OMAP_IH2_0_MIR); 258 MPUI730_SAVE(OMAP_IH2_0_MIR);
259 MPUI730_SAVE(OMAP_IH2_1_MIR); 259 MPUI730_SAVE(OMAP_IH2_1_MIR);
@@ -306,7 +306,7 @@ void omap1_pm_suspend(void)
306 omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); 306 omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1);
307 307
308 /* shut down dsp_ck */ 308 /* shut down dsp_ck */
309 if (!cpu_is_omap730()) 309 if (!cpu_is_omap7xx())
310 omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); 310 omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
311 311
312 /* temporarily enabling api_ck to access DSP registers */ 312 /* temporarily enabling api_ck to access DSP registers */
@@ -383,7 +383,7 @@ void omap1_pm_suspend(void)
383 ULPD_RESTORE(ULPD_CLOCK_CTRL); 383 ULPD_RESTORE(ULPD_CLOCK_CTRL);
384 ULPD_RESTORE(ULPD_STATUS_REQ); 384 ULPD_RESTORE(ULPD_STATUS_REQ);
385 385
386 if (cpu_is_omap730()) { 386 if (cpu_is_omap7xx()) {
387 MPUI730_RESTORE(EMIFS_CONFIG); 387 MPUI730_RESTORE(EMIFS_CONFIG);
388 MPUI730_RESTORE(EMIFF_SDRAM_CONFIG); 388 MPUI730_RESTORE(EMIFF_SDRAM_CONFIG);
389 MPUI730_RESTORE(OMAP_IH1_MIR); 389 MPUI730_RESTORE(OMAP_IH1_MIR);
@@ -461,7 +461,7 @@ static int omap_pm_read_proc(
461 ULPD_SAVE(ULPD_DPLL_CTRL); 461 ULPD_SAVE(ULPD_DPLL_CTRL);
462 ULPD_SAVE(ULPD_POWER_CTRL); 462 ULPD_SAVE(ULPD_POWER_CTRL);
463 463
464 if (cpu_is_omap730()) { 464 if (cpu_is_omap7xx()) {
465 MPUI730_SAVE(MPUI_CTRL); 465 MPUI730_SAVE(MPUI_CTRL);
466 MPUI730_SAVE(MPUI_DSP_STATUS); 466 MPUI730_SAVE(MPUI_DSP_STATUS);
467 MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); 467 MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG);
@@ -517,7 +517,7 @@ static int omap_pm_read_proc(
517 ULPD_SHOW(ULPD_STATUS_REQ), 517 ULPD_SHOW(ULPD_STATUS_REQ),
518 ULPD_SHOW(ULPD_POWER_CTRL)); 518 ULPD_SHOW(ULPD_POWER_CTRL));
519 519
520 if (cpu_is_omap730()) { 520 if (cpu_is_omap7xx()) {
521 my_buffer_offset += sprintf(my_base + my_buffer_offset, 521 my_buffer_offset += sprintf(my_base + my_buffer_offset,
522 "MPUI730_CTRL_REG 0x%-8x \n" 522 "MPUI730_CTRL_REG 0x%-8x \n"
523 "MPUI730_DSP_STATUS_REG: 0x%-8x \n" 523 "MPUI730_DSP_STATUS_REG: 0x%-8x \n"
@@ -668,7 +668,7 @@ static int __init omap_pm_init(void)
668 * These routines need to be in SRAM as that's the only 668 * These routines need to be in SRAM as that's the only
669 * memory the MPU can see when it wakes up. 669 * memory the MPU can see when it wakes up.
670 */ 670 */
671 if (cpu_is_omap730()) { 671 if (cpu_is_omap7xx()) {
672 omap_sram_suspend = omap_sram_push(omap730_cpu_suspend, 672 omap_sram_suspend = omap_sram_push(omap730_cpu_suspend,
673 omap730_cpu_suspend_sz); 673 omap730_cpu_suspend_sz);
674 } else if (cpu_is_omap15xx()) { 674 } else if (cpu_is_omap15xx()) {
@@ -686,7 +686,7 @@ static int __init omap_pm_init(void)
686 686
687 pm_idle = omap1_pm_idle; 687 pm_idle = omap1_pm_idle;
688 688
689 if (cpu_is_omap730()) 689 if (cpu_is_omap7xx())
690 setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq); 690 setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq);
691 else if (cpu_is_omap16xx()) 691 else if (cpu_is_omap16xx())
692 setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); 692 setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq);
@@ -700,7 +700,7 @@ static int __init omap_pm_init(void)
700 omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); 700 omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL);
701 701
702 /* Configure IDLECT3 */ 702 /* Configure IDLECT3 */
703 if (cpu_is_omap730()) 703 if (cpu_is_omap7xx())
704 omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3); 704 omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3);
705 else if (cpu_is_omap16xx()) 705 else if (cpu_is_omap16xx())
706 omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); 706 omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3);