diff options
author | Tony Lindgren <tony@atomide.com> | 2012-10-02 15:39:09 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-10-17 14:36:37 -0400 |
commit | 4c98dc6b8ef2f73bdbfa78186db9a76507ba9ea3 (patch) | |
tree | 2f9f897dc9f4b8c0923e955008460d9516f7dd00 /arch/arm/mach-omap1/board-perseus2.c | |
parent | 6832c95599e1a04f4b56b533718d1cda4689aec2 (diff) |
ARM: OMAP: Make plat/fpga.h local to arch/arm/plat-omap
There's no need to have this file in plat/fpga.h. We can
make it local to plat-omap replacing fpga_read/write
functions directly with readb/writeb as that's how
they are already defined in fpga.h.
Note that 2420 based H4 is also using the fpga, so let's
keep the led support around in plat-omap until we flip
over mach-omap2 to device tree.
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: linux-fbdev@vger.kernel.org
Cc: Felipe Balbi <balbi@ti.com>
Cc: linux-usb@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap1/board-perseus2.c')
-rw-r--r-- | arch/arm/mach-omap1/board-perseus2.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 198b05417bfc..a1cdeeb43f46 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -30,7 +30,7 @@ | |||
30 | 30 | ||
31 | #include <plat/tc.h> | 31 | #include <plat/tc.h> |
32 | #include <mach/mux.h> | 32 | #include <mach/mux.h> |
33 | #include <plat/fpga.h> | 33 | #include <../plat-omap/fpga.h> |
34 | #include <mach/flash.h> | 34 | #include <mach/flash.h> |
35 | 35 | ||
36 | #include <mach/hardware.h> | 36 | #include <mach/hardware.h> |
@@ -231,9 +231,9 @@ static struct omap_lcd_config perseus2_lcd_config __initdata = { | |||
231 | 231 | ||
232 | static void __init perseus2_init_smc91x(void) | 232 | static void __init perseus2_init_smc91x(void) |
233 | { | 233 | { |
234 | fpga_write(1, H2P2_DBG_FPGA_LAN_RESET); | 234 | __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET); |
235 | mdelay(50); | 235 | mdelay(50); |
236 | fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1, | 236 | __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1, |
237 | H2P2_DBG_FPGA_LAN_RESET); | 237 | H2P2_DBG_FPGA_LAN_RESET); |
238 | mdelay(50); | 238 | mdelay(50); |
239 | } | 239 | } |