diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2012-01-05 20:11:40 -0500 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2012-01-26 22:47:37 -0500 |
commit | 845da6bf65b1ebff700c1e9a8c17f5df303792c1 (patch) | |
tree | 6609fb85408765cb22965738b2a5706f8ce4b24d /arch/arm/mach-mxs | |
parent | dcd6c92267155e70a94b3927bce681ce74b80d1f (diff) |
ARM: mxs: detect SoC by checking CHIPID register
Both imx23 and imx28 have CHIPID register at address 0x8001c310, which
can be used to identify the SoC. This patch changes cpu_is_xxx and
__arch_decomp_setup to use this CHIPID register than machine type to
detect the chip between imx23 and imx28, so that we do not need to
change these functions whenever a new board/machine gets added.
Suggested-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mxs')
-rw-r--r-- | arch/arm/mach-mxs/include/mach/digctl.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-mxs/include/mach/mxs.h | 29 | ||||
-rw-r--r-- | arch/arm/mach-mxs/include/mach/uncompress.h | 13 |
3 files changed, 23 insertions, 20 deletions
diff --git a/arch/arm/mach-mxs/include/mach/digctl.h b/arch/arm/mach-mxs/include/mach/digctl.h index 49a888c65d6d..17964066303f 100644 --- a/arch/arm/mach-mxs/include/mach/digctl.h +++ b/arch/arm/mach-mxs/include/mach/digctl.h | |||
@@ -18,4 +18,5 @@ | |||
18 | #define HW_DIGCTL_CTRL 0x0 | 18 | #define HW_DIGCTL_CTRL 0x0 |
19 | #define BP_DIGCTL_CTRL_SAIF_CLKMUX 10 | 19 | #define BP_DIGCTL_CTRL_SAIF_CLKMUX 10 |
20 | #define BM_DIGCTL_CTRL_SAIF_CLKMUX (0x3 << 10) | 20 | #define BM_DIGCTL_CTRL_SAIF_CLKMUX (0x3 << 10) |
21 | #define HW_DIGCTL_CHIPID 0x310 | ||
21 | #endif | 22 | #endif |
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h index bde5f6634747..7d4fb6d0afda 100644 --- a/arch/arm/mach-mxs/include/mach/mxs.h +++ b/arch/arm/mach-mxs/include/mach/mxs.h | |||
@@ -23,22 +23,10 @@ | |||
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #endif | 24 | #endif |
25 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
26 | #include <mach/digctl.h> | ||
26 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
27 | 28 | ||
28 | /* | 29 | /* |
29 | * MXS CPU types | ||
30 | */ | ||
31 | #define cpu_is_mx23() ( \ | ||
32 | machine_is_mx23evk() || \ | ||
33 | machine_is_stmp378x() || \ | ||
34 | 0) | ||
35 | #define cpu_is_mx28() ( \ | ||
36 | machine_is_mx28evk() || \ | ||
37 | machine_is_m28evk() || \ | ||
38 | machine_is_tx28() || \ | ||
39 | 0) | ||
40 | |||
41 | /* | ||
42 | * IO addresses common to MXS-based | 30 | * IO addresses common to MXS-based |
43 | */ | 31 | */ |
44 | #define MXS_IO_BASE_ADDR 0x80000000 | 32 | #define MXS_IO_BASE_ADDR 0x80000000 |
@@ -109,6 +97,21 @@ static inline void __mxs_togl(u32 mask, void __iomem *reg) | |||
109 | { | 97 | { |
110 | __raw_writel(mask, reg + MXS_TOG_ADDR); | 98 | __raw_writel(mask, reg + MXS_TOG_ADDR); |
111 | } | 99 | } |
100 | |||
101 | /* | ||
102 | * MXS CPU types | ||
103 | */ | ||
104 | #define MXS_CHIPID (MXS_IO_ADDRESS(MXS_DIGCTL_BASE_ADDR) + HW_DIGCTL_CHIPID) | ||
105 | |||
106 | static inline int cpu_is_mx23(void) | ||
107 | { | ||
108 | return ((__raw_readl(MXS_CHIPID) >> 16) == 0x3780); | ||
109 | } | ||
110 | |||
111 | static inline int cpu_is_mx28(void) | ||
112 | { | ||
113 | return ((__raw_readl(MXS_CHIPID) >> 16) == 0x2800); | ||
114 | } | ||
112 | #endif | 115 | #endif |
113 | 116 | ||
114 | #endif /* __MACH_MXS_H__ */ | 117 | #endif /* __MACH_MXS_H__ */ |
diff --git a/arch/arm/mach-mxs/include/mach/uncompress.h b/arch/arm/mach-mxs/include/mach/uncompress.h index 67776746f143..ef2811495446 100644 --- a/arch/arm/mach-mxs/include/mach/uncompress.h +++ b/arch/arm/mach-mxs/include/mach/uncompress.h | |||
@@ -18,8 +18,6 @@ | |||
18 | #ifndef __MACH_MXS_UNCOMPRESS_H__ | 18 | #ifndef __MACH_MXS_UNCOMPRESS_H__ |
19 | #define __MACH_MXS_UNCOMPRESS_H__ | 19 | #define __MACH_MXS_UNCOMPRESS_H__ |
20 | 20 | ||
21 | #include <asm/mach-types.h> | ||
22 | |||
23 | unsigned long mxs_duart_base; | 21 | unsigned long mxs_duart_base; |
24 | 22 | ||
25 | #define MXS_DUART(x) (*(volatile unsigned long *)(mxs_duart_base + (x))) | 23 | #define MXS_DUART(x) (*(volatile unsigned long *)(mxs_duart_base + (x))) |
@@ -55,16 +53,17 @@ static inline void flush(void) | |||
55 | 53 | ||
56 | #define MX23_DUART_BASE_ADDR 0x80070000 | 54 | #define MX23_DUART_BASE_ADDR 0x80070000 |
57 | #define MX28_DUART_BASE_ADDR 0x80074000 | 55 | #define MX28_DUART_BASE_ADDR 0x80074000 |
56 | #define MXS_DIGCTL_CHIPID 0x8001c310 | ||
58 | 57 | ||
59 | static inline void __arch_decomp_setup(unsigned long arch_id) | 58 | static inline void __arch_decomp_setup(unsigned long arch_id) |
60 | { | 59 | { |
61 | switch (arch_id) { | 60 | u16 chipid = (*(volatile unsigned long *) MXS_DIGCTL_CHIPID) >> 16; |
62 | case MACH_TYPE_MX23EVK: | 61 | |
62 | switch (chipid) { | ||
63 | case 0x3780: | ||
63 | mxs_duart_base = MX23_DUART_BASE_ADDR; | 64 | mxs_duart_base = MX23_DUART_BASE_ADDR; |
64 | break; | 65 | break; |
65 | case MACH_TYPE_MX28EVK: | 66 | case 0x2800: |
66 | case MACH_TYPE_M28EVK: | ||
67 | case MACH_TYPE_TX28: | ||
68 | mxs_duart_base = MX28_DUART_BASE_ADDR; | 67 | mxs_duart_base = MX28_DUART_BASE_ADDR; |
69 | break; | 68 | break; |
70 | default: | 69 | default: |