diff options
| author | Shawn Guo <shawn.guo@freescale.com> | 2011-03-05 11:40:19 -0500 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-03-07 13:29:45 -0500 |
| commit | db63a493838473e3ae87e0db06bb6ddd817f20a2 (patch) | |
| tree | 47e3d8783c42934719334e405c227388a4615a36 /arch/arm/mach-mxs/mach-mx28evk.c | |
| parent | 65e7a3222fd9f47eafa908ef3e350ce4f953914e (diff) | |
ARM: mxs: add helper macro for pad control
This patch is to add pad control helper macro to make the code easy
to read. The need is being seen when adding pad definitions for
LCDIF which gets ~30 pads to define.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mxs/mach-mx28evk.c')
| -rw-r--r-- | arch/arm/mach-mxs/mach-mx28evk.c | 82 |
1 files changed, 28 insertions, 54 deletions
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index 1f0b708138fe..987e3d54280c 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c | |||
| @@ -33,68 +33,42 @@ | |||
| 33 | 33 | ||
| 34 | static const iomux_cfg_t mx28evk_pads[] __initconst = { | 34 | static const iomux_cfg_t mx28evk_pads[] __initconst = { |
| 35 | /* duart */ | 35 | /* duart */ |
| 36 | MX28_PAD_PWM0__DUART_RX | | 36 | MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, |
| 37 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | 37 | MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL, |
| 38 | MX28_PAD_PWM1__DUART_TX | | ||
| 39 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | ||
| 40 | 38 | ||
| 41 | /* auart0 */ | 39 | /* auart0 */ |
| 42 | MX28_PAD_AUART0_RX__AUART0_RX | | 40 | MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL, |
| 43 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | 41 | MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL, |
| 44 | MX28_PAD_AUART0_TX__AUART0_TX | | 42 | MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL, |
| 45 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | 43 | MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL, |
| 46 | MX28_PAD_AUART0_CTS__AUART0_CTS | | ||
| 47 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | ||
| 48 | MX28_PAD_AUART0_RTS__AUART0_RTS | | ||
| 49 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | ||
| 50 | /* auart3 */ | 44 | /* auart3 */ |
| 51 | MX28_PAD_AUART3_RX__AUART3_RX | | 45 | MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL, |
| 52 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | 46 | MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL, |
| 53 | MX28_PAD_AUART3_TX__AUART3_TX | | 47 | MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL, |
| 54 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | 48 | MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL, |
| 55 | MX28_PAD_AUART3_CTS__AUART3_CTS | | ||
| 56 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | ||
| 57 | MX28_PAD_AUART3_RTS__AUART3_RTS | | ||
| 58 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | ||
| 59 | 49 | ||
| 50 | #define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP) | ||
| 60 | /* fec0 */ | 51 | /* fec0 */ |
| 61 | MX28_PAD_ENET0_MDC__ENET0_MDC | | 52 | MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC, |
| 62 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 53 | MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC, |
| 63 | MX28_PAD_ENET0_MDIO__ENET0_MDIO | | 54 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC, |
| 64 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 55 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC, |
| 65 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | | 56 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC, |
| 66 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 57 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC, |
| 67 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 | | 58 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC, |
| 68 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 59 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC, |
| 69 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 | | 60 | MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC, |
| 70 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
| 71 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | | ||
| 72 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
| 73 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 | | ||
| 74 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
| 75 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 | | ||
| 76 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
| 77 | MX28_PAD_ENET_CLK__CLKCTRL_ENET | | ||
| 78 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
| 79 | /* fec1 */ | 61 | /* fec1 */ |
| 80 | MX28_PAD_ENET0_CRS__ENET1_RX_EN | | 62 | MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC, |
| 81 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 63 | MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC, |
| 82 | MX28_PAD_ENET0_RXD2__ENET1_RXD0 | | 64 | MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC, |
| 83 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 65 | MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC, |
| 84 | MX28_PAD_ENET0_RXD3__ENET1_RXD1 | | 66 | MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC, |
| 85 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 67 | MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC, |
| 86 | MX28_PAD_ENET0_COL__ENET1_TX_EN | | ||
| 87 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
| 88 | MX28_PAD_ENET0_TXD2__ENET1_TXD0 | | ||
| 89 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
| 90 | MX28_PAD_ENET0_TXD3__ENET1_TXD1 | | ||
| 91 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
| 92 | /* phy power line */ | 68 | /* phy power line */ |
| 93 | MX28_PAD_SSP1_DATA3__GPIO_2_15 | | 69 | MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL, |
| 94 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | ||
| 95 | /* phy reset line */ | 70 | /* phy reset line */ |
| 96 | MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | | 71 | MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL, |
| 97 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | ||
| 98 | }; | 72 | }; |
| 99 | 73 | ||
| 100 | /* fec */ | 74 | /* fec */ |