diff options
author | Eric Bénard <eric@eukrea.com> | 2010-07-21 08:46:11 -0400 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-07-26 09:05:21 -0400 |
commit | aa8721431909c9afa611373c7edfb7f514a6ad83 (patch) | |
tree | 4202813835b9f9a151ffd961748cdff1db30752a /arch/arm/mach-mx5 | |
parent | 5055d1efc0cb4bd612c78af8fa61316ae49755a9 (diff) |
i.MX51: handle IRQ for gpio 16..31
The i.MX51 generates 2 IRQ for each GPIO bank : one for gpio 0 to 15
and one for gpio 16 to 31.
Actually only the lower IRQ is registered so register the second one.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r-- | arch/arm/mach-mx5/devices.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index aafa61c6cec5..1920ff4963b2 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c | |||
@@ -250,24 +250,28 @@ static struct mxc_gpio_port mxc_gpio_ports[] = { | |||
250 | .chip.label = "gpio-0", | 250 | .chip.label = "gpio-0", |
251 | .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR), | 251 | .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR), |
252 | .irq = MX51_MXC_INT_GPIO1_LOW, | 252 | .irq = MX51_MXC_INT_GPIO1_LOW, |
253 | .irq_high = MX51_MXC_INT_GPIO1_HIGH, | ||
253 | .virtual_irq_start = MXC_GPIO_IRQ_START | 254 | .virtual_irq_start = MXC_GPIO_IRQ_START |
254 | }, | 255 | }, |
255 | { | 256 | { |
256 | .chip.label = "gpio-1", | 257 | .chip.label = "gpio-1", |
257 | .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR), | 258 | .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR), |
258 | .irq = MX51_MXC_INT_GPIO2_LOW, | 259 | .irq = MX51_MXC_INT_GPIO2_LOW, |
260 | .irq_high = MX51_MXC_INT_GPIO2_HIGH, | ||
259 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 | 261 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 |
260 | }, | 262 | }, |
261 | { | 263 | { |
262 | .chip.label = "gpio-2", | 264 | .chip.label = "gpio-2", |
263 | .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR), | 265 | .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR), |
264 | .irq = MX51_MXC_INT_GPIO3_LOW, | 266 | .irq = MX51_MXC_INT_GPIO3_LOW, |
267 | .irq_high = MX51_MXC_INT_GPIO3_HIGH, | ||
265 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 | 268 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 |
266 | }, | 269 | }, |
267 | { | 270 | { |
268 | .chip.label = "gpio-3", | 271 | .chip.label = "gpio-3", |
269 | .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR), | 272 | .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR), |
270 | .irq = MX51_MXC_INT_GPIO4_LOW, | 273 | .irq = MX51_MXC_INT_GPIO4_LOW, |
274 | .irq_high = MX51_MXC_INT_GPIO4_HIGH, | ||
271 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 | 275 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 |
272 | }, | 276 | }, |
273 | }; | 277 | }; |