diff options
author | Dinh Nguyen <Dinh.Nguyen@freescale.com> | 2011-01-15 14:40:12 -0500 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-01-21 05:32:45 -0500 |
commit | 816ad741b6a168e1d0c182d10999c298fc281d17 (patch) | |
tree | 2b84c5507f95a9675e9127026d260e0791e65d73 /arch/arm/mach-mx5 | |
parent | 00c89c1d1831225bb89b0627e02d0d3f875ec0a4 (diff) |
ARM: i.MX53: Add full iomux support for mx53
This iomux file contains all the available pins that are iomux
capable.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r-- | arch/arm/mach-mx5/board-mx53_evk.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index caee04c08238..eba9df081194 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. | 2 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. |
3 | * Copyright (C) 2010 Yong Shen. <Yong.Shen@linaro.org> | 3 | * Copyright (C) 2010 Yong Shen. <Yong.Shen@linaro.org> |
4 | */ | 4 | */ |
5 | 5 | ||
@@ -42,28 +42,28 @@ | |||
42 | #include "devices-imx53.h" | 42 | #include "devices-imx53.h" |
43 | 43 | ||
44 | static iomux_v3_cfg_t mx53_evk_pads[] = { | 44 | static iomux_v3_cfg_t mx53_evk_pads[] = { |
45 | MX53_PAD_CSI0_D10__UART1_TXD, | 45 | MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, |
46 | MX53_PAD_CSI0_D11__UART1_RXD, | 46 | MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, |
47 | MX53_PAD_ATA_DIOW__UART1_TXD, | 47 | MX53_PAD_PATA_DIOW__UART1_TXD_MUX, |
48 | MX53_PAD_ATA_DMACK__UART1_RXD, | 48 | MX53_PAD_PATA_DMACK__UART1_RXD_MUX, |
49 | 49 | ||
50 | MX53_PAD_ATA_BUFFER_EN__UART2_RXD, | 50 | MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX, |
51 | MX53_PAD_ATA_DMARQ__UART2_TXD, | 51 | MX53_PAD_PATA_DMARQ__UART2_TXD_MUX, |
52 | MX53_PAD_ATA_DIOR__UART2_RTS, | 52 | MX53_PAD_PATA_DIOR__UART2_RTS, |
53 | MX53_PAD_ATA_INTRQ__UART2_CTS, | 53 | MX53_PAD_PATA_INTRQ__UART2_CTS, |
54 | 54 | ||
55 | MX53_PAD_ATA_CS_0__UART3_TXD, | 55 | MX53_PAD_PATA_CS_0__UART3_TXD_MUX, |
56 | MX53_PAD_ATA_CS_1__UART3_RXD, | 56 | MX53_PAD_PATA_CS_1__UART3_RXD_MUX, |
57 | MX53_PAD_ATA_DA_1__UART3_CTS, | 57 | MX53_PAD_PATA_DA_1__UART3_CTS, |
58 | MX53_PAD_ATA_DA_2__UART3_RTS, | 58 | MX53_PAD_PATA_DA_2__UART3_RTS, |
59 | 59 | ||
60 | MX53_PAD_EIM_D16__CSPI1_SCLK, | 60 | MX53_PAD_EIM_D16__ECSPI1_SCLK, |
61 | MX53_PAD_EIM_D17__CSPI1_MISO, | 61 | MX53_PAD_EIM_D17__ECSPI1_MISO, |
62 | MX53_PAD_EIM_D18__CSPI1_MOSI, | 62 | MX53_PAD_EIM_D18__ECSPI1_MOSI, |
63 | 63 | ||
64 | /* ecspi chip select lines */ | 64 | /* ecspi chip select lines */ |
65 | MX53_PAD_EIM_EB2__GPIO_2_30, | 65 | MX53_PAD_EIM_EB2__GPIO2_30, |
66 | MX53_PAD_EIM_D19__GPIO_3_19, | 66 | MX53_PAD_EIM_D19__GPIO3_19, |
67 | }; | 67 | }; |
68 | 68 | ||
69 | static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { | 69 | static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { |