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authorJason Liu <jason.hui@linaro.org>2011-09-09 05:17:49 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-09-20 03:55:06 -0400
commit4c54239058772160da123167de89603830815a88 (patch)
tree48d31a9b008f19e8fcfd25feb819eb4a581e5704 /arch/arm/mach-mx5/mm.c
parent281e10da20dcae1730a1aa37356da0688bde989e (diff)
ARM: mx5/mm: consolidate TZIC map code
Use a static mapping for TZIC to get rid of the duplicated code for ioremap and the corresponding error handling. This is already done on i.MX50. This patch also removes TZIC mapping for i.mx51 TO1 since there is no support for TO1 now since the following commit: 9ab4650 (ARM: imx: Get the silicon version from the IIM module) Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx5/mm.c')
-rw-r--r--arch/arm/mach-mx5/mm.c27
1 files changed, 4 insertions, 23 deletions
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 0002b6815b0d..80998b0d3222 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -35,6 +35,7 @@ static struct map_desc mx50_io_desc[] __initdata = {
35 * Define the MX51 memory map. 35 * Define the MX51 memory map.
36 */ 36 */
37static struct map_desc mx51_io_desc[] __initdata = { 37static struct map_desc mx51_io_desc[] __initdata = {
38 imx_map_entry(MX51, TZIC, MT_DEVICE),
38 imx_map_entry(MX51, IRAM, MT_DEVICE), 39 imx_map_entry(MX51, IRAM, MT_DEVICE),
39 imx_map_entry(MX51, AIPS1, MT_DEVICE), 40 imx_map_entry(MX51, AIPS1, MT_DEVICE),
40 imx_map_entry(MX51, SPBA0, MT_DEVICE), 41 imx_map_entry(MX51, SPBA0, MT_DEVICE),
@@ -45,6 +46,7 @@ static struct map_desc mx51_io_desc[] __initdata = {
45 * Define the MX53 memory map. 46 * Define the MX53 memory map.
46 */ 47 */
47static struct map_desc mx53_io_desc[] __initdata = { 48static struct map_desc mx53_io_desc[] __initdata = {
49 imx_map_entry(MX53, TZIC, MT_DEVICE),
48 imx_map_entry(MX53, AIPS1, MT_DEVICE), 50 imx_map_entry(MX53, AIPS1, MT_DEVICE),
49 imx_map_entry(MX53, SPBA0, MT_DEVICE), 51 imx_map_entry(MX53, SPBA0, MT_DEVICE),
50 imx_map_entry(MX53, AIPS2, MT_DEVICE), 52 imx_map_entry(MX53, AIPS2, MT_DEVICE),
@@ -98,33 +100,12 @@ void __init mx50_init_irq(void)
98 100
99void __init mx51_init_irq(void) 101void __init mx51_init_irq(void)
100{ 102{
101 unsigned long tzic_addr; 103 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
102 void __iomem *tzic_virt;
103
104 if (mx51_revision() < IMX_CHIP_REVISION_2_0)
105 tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
106 else
107 tzic_addr = MX51_TZIC_BASE_ADDR;
108
109 tzic_virt = ioremap(tzic_addr, SZ_16K);
110 if (!tzic_virt)
111 panic("unable to map TZIC interrupt controller\n");
112
113 tzic_init_irq(tzic_virt);
114} 104}
115 105
116void __init mx53_init_irq(void) 106void __init mx53_init_irq(void)
117{ 107{
118 unsigned long tzic_addr; 108 tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR));
119 void __iomem *tzic_virt;
120
121 tzic_addr = MX53_TZIC_BASE_ADDR;
122
123 tzic_virt = ioremap(tzic_addr, SZ_16K);
124 if (!tzic_virt)
125 panic("unable to map TZIC interrupt controller\n");
126
127 tzic_init_irq(tzic_virt);
128} 109}
129 110
130static struct sdma_script_start_addrs imx51_sdma_script __initdata = { 111static struct sdma_script_start_addrs imx51_sdma_script __initdata = {